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Amorphous thin Ge 2 Sb 2 Te 5 films were deposited by MOCVD (metal organic chemical vapor deposition) on three-dimensional structures. Ammonium gas, used as a reactant, reduced the deposition temperature to 150 °C, which is lower than that of metal-organic precursors. Introducing nitrogen and hydrogen radicals made by decomposition of the ammonium gas further reduced the growth temperature. The lowest growth temperature producing a realistic growth rate was 100 °C. Phase-change memory cells made of MOCVD-grown films were confirmed to have operation and reliability characteristics as good as those of conventional cells made of sputter-deposited films.

In this article, emerging new semiconductor non-volatile memories are reviewed. We are reaching the integration limit of Flash memories and new types of memories replacing Flash have been actively proposed. Each type of memory is briefly introduced and the possibility of replacing Flash is discussed. FeRAMs, MRAMs, and PCRAMs are already in production and the physics behind the operations and reliabilities are well understood. ReRAMs are now approaching to practical use. However, the operation mechanisms of the other memories have not been understood perfectly. Therefore, it is not fruitful to compare the superiority of each technology at this moment because some innovative idea might enhance a specific technology that happened from time to time.

A resistive-switching solid-state brain-neocortex-like device for advanced non-volatile logic applications was developed. This device can be used as a reconfigurable logic device that is operated by electrically connecting and disconnecting pairs of electrodes. This paper reports for the first time the experimental evaluation results of a three-terminal test element group as the unit for a solid state brain neocortex-like device. The solid-state brain-neocortex-like device was experimentally evaluated as unit in a three-terminal test element group. The evaluation results show that the neocortex-like reconfigurable switching, in particular, fringe-electric-field-induced switching is possible in the device.

Ferroelectric field effect transistors (FeFETs) composed of P(VDF-TrFE) (Poly(Vinylidenefluoride-Tirfluoroethylene)) thin films and semiconductor substrates show excellent ferroelectric transistor characteristics. Since P(VDF-TrFE) has the ferroelectric polarization as large as those of oxide ferroelectric materials with much lower dielectric constant, it is an ideal material to build FeFETs with the combination to inorganic semiconductor materials. In addition, the process condition to form P(VDF-TrFE) is much milder to underlying semiconducting material compared to oxide ferroelectrics. Therefore, the improvement on the retention characteristics is expected by employing P(VDF-TrFE) ferroelectrics in FeFET instead of oxide ferroelectrics. The potential of P(VDF-TrFE) FeFET is discussed in this chapter.

A high-programming-throughput three-dimensional (3D) vertical chain-cell-type phase-change memory (VCCPCM) array for a next-generation storage device was fabricated. To increase the number of write cells at one time by reducing resistance of bit and source lines, the VCCPCM array includes plate electrodes and double-gate vertical-chain-selection MOSs with 5-nm-thick poly-Si channels. In addition, CO 2 laser annealing enhances the drivability of a poly-Si cell MOS to 680 µA/µm to suppress energy loss in the cell MOS. In addition to write throughput, erase throughput is increased by erasing memory cells in a “bundle” by channel heating (called “bundle erase”). GeSbTe CVD with high uniformity is also developed.

The effects of post-annealing on the properties of Ru films formed by metalorganic chemical vapor deposition were investigated, aiming to the application to the bottom electrode of ferroelectric capacitors. Ruthenium films were deposited at a temperature of 350°C using a liquid-type source of Ru[EtCp]2 without introducing O2. Post-annealing was performed in vacuum at a temperature of 400°C. Surface morphology and crystallinity of Ru were very similar between as-deposited and post-annealed Ru films. In addition, the Pt/BLT/Ru structure exhibits similar polarization hysteresis loops regardless of the annealing duration. However, leakage current density was drastically decreased as the annealing duration was increased. It is presumed from the thermal desorption spectroscopy that decrease of out-diffused gas from Ru film by post-annealing is a main reason for the improvement of leakage current characteristics.

Ruthenium films formed by metalorganic chemical vapor deposition were investigated, taking account of the application to the bottom electrode of ferroelectric capacitors. Ruthenium films were deposited using a liquid-type source of Ru[EtCp]2 in a cold-wall type reactor with infrared lamps. A smooth and flat Ru film was successfully formed on a SiO2-covered Si substrate without a seed layer. As the deposition temperature increased to 400°C, the crystallinity of the Ru film improved and the film exhibited high c-axis orientation. After forming a Bi4 − x La x Ti3O12 (BLT) film by a sol-gel technique, a Pt/BLT/Ru capacitor was fabricated on the Ru film. Good hysteresis loops with 2P r = 20 μC/cm2 and 2V c = 3.4 V were successfully obtained and the ferroelectric property did not depend on the deposition temperature of Ru in the temperature range from 325°C to 400°C. On the contrary, the leakage current density was significantly suppressed down to 1/100 as the deposition temperature of Ru increased from 325°C t...

We developed high-performance metal-ferro-electric-insulator-semiconductor (MFIS) structures with a thin Al 2 O 3 layer deposited on Si 3 N 4 buffer layer. The Al 2 O 3 were deposited by atomic layer deposition technique and the Si 3 N 4 were made by the direct nitridation of Si substrate using atomic nitrogen radicals. Since the buffer Si 3 N 4 was made perfectly damage-free and hydrogen-free, we can perform high temperature oxidation to eliminate defects in Al 2 O 3 and ferroelectric films down to the negligible level. On the stacked buffer layer, we deposited highly c-axis oriented Bi 3.25 La 0.75 Ti 3 O 12 film and fabricated MFIS structure. With the help of the high insulating property of a buffer layer and a highly c-axis oriented ferroelectric film, we succeeded to realize the large memory windows together with the long retention characters in the Pt/Bi 3.25 La 0.75 Ti 3 O 12 /Al 2 O 3 /Si 3 N 4 /Si MFIS structure.

Microstructures (texture and grain size) dependence of PZT thin films on the oxidation state of lead, heating rate of crystallization annealing, and the quality of bottom electrode was discussed. The spatial variations of the switching charge for a PZT capacitor is mainly determined by the texture of PZT thin film. Switching charge variation less than ±2% is achieved by making a film highly [111] textured.

Antireduction characteristics of IrO2/Pb(ZrxTi1−x)O3(PZT)/Pt ferroelectric capacitors are improved by post annealing. When an as-processed capacitor receives a 3% hydrogen annealing at 300 °C (a process condition for fabricating the interlayer dielectric), capacitor characteristics are heavily degraded. This is because Ir that is produced by IrO2 reduction plays a catalytic role in PZT reduction. By contrast, if the IrO2/PZT/Pt capacitor is post annealed in O2 atmosphere at 600 °C for 1 h, the capacitor characteristics can be maintained even if it undergoes the hydrogen annealing. The O2 annealing improves the crystallinity of the IrO2 top electrode and excess PbOx in sol-gel derived PZT diffuses into the IrO2 film. As a result, antireduction characteristics of the IrO2 top electrode itself are drastically improved and the PZT film becomes stoichiometric at the same time. Exclusion of excess PbOx in PZT results in an increase in spontaneous polarization of the IrO2/PZT/Pt ferroelectric capacitor. Furtherm...

In the stacked structure of PbZr1-xTixO3(PZT)/Pt/TiN/poly-Si for a ferroelectric random access memory (RAM), the mechanism of TiN barrier-metal oxidation was investigated by transmission electron microscopy (TEM). In the cross-sectional TEM images of PZTyPtyTiNySi, titanium oxide was observed beneath the Pt grain boundary. The oxygen was diffused through the Pt grain boundary during the heat treatment in an oxygen atmosphere for crystallization of PZT films. The annealing of the TiN film in ammonia resulted in the suppression of the oxidation during the crystallization annealing of PZT. The minimum required Pt film thickness to protect TiN from oxidation can be reduced from 200 nm to 100 nm.

Degradation of ferroelectricity in PZT (Pb(Zr0.52, Ti0.48)O3) thin-film capacitors caused by heat treatment in a reductive ambience is investigated. We have found that the degradation of ferroelectricity depends upon the metal used for the top electrode of the PZT capacitor. The increased degradation in the case of a PZT capacitor with Pt electrodes can be explained by a catalytic reaction on the Pt surface. With the use of an IrO2 non-catalytic top electrode, we have made the ferroelectricity of an IrO2/PZT/Pt capacitor retained even after the H2 annealing at 400°C, or above. This IrO2/PZT/Pt capacitor is a useful structure to avoid H2 damage in actual LSI fabrication processes.

The role of ozone in the reactive coevaporation of the lead zirconate titanate thin film was investigated by depositing films at various growth rates with various ozone fluxes or molecular oxygen fluxes on unheated substrates and then crystallizing them using rapid thermal annealing. The oxidation state of lead in the as-deposited film was determined from the ratio of the ozone to the total metal fluxes. The amount of atomic oxygen supplied to the surface of the film was at least 103 times larger when the deposition was done using ozone rather than molecular oxygen. When the ozone flux was more than one-third of the total metal flux, well-oxidized films were obtained. To ensure obtaining well-oxidized film, the ozone flax should be more than twice as much.

A one-mask-patterned ferroelectric capacitor test structure designed with a 0.5-μm feature size was fabricated. Oxygen plasma treatment after dry etching decreased the leakage current to as low as that of as-deposited film. These one-mask-patterned ferroelectric capacitors, with switching charge almost equal to as-deposited film, were successfully fabricated. Ferroelectric memories as dense as dynamic random access memories will become possible with this technology. However, the leakage current density for micron-sized capacitors is 2 to 10 times that of large capacitors. The leakage current in small capacitors is increased due to perimeter leakage that runs through the damaged region on the capacitor sidewall. © Scripta Technica, Inc. Electr Eng Jpn, 121(1): 43–50, 1997

The disappearance of ferroelectricity in Pb(Zr0.52,Ti0.48)O3 (PZT) thin-film capacitors, which is caused by heat treatment in a reductive ambience, is investigated. Bare PZT films are not damaged by annealing in a hydrogen-containing atmosphere (H2 annealing) up to 400 °C, whereas a PZT capacitor with Pt electrodes loses its ferroelectricity during annealing at less than 300 °C. We have found that the degradation of ferroelectricity depends upon the metal used for the top electrode of the PZT capacitor. The increased degradation in the case of a PZT capacitor with Pt electrodes can be explained by a catalytic reaction on the Pt surface. We have made the ferroelectricity of a Pt/PZT/Pt capacitor retained even after the H2 annealing at 300 °C, or above, simply by oxidizing it before the H2 annealing.

Alcohol treatment may make it difficult to get clean Si surfaces terminated by hydrogen in the fabrication of semiconductor devices because alcohol remains as carbon contamination on a Si surface. To prevent this problem, the replacement of alcohol adsorbents on a Si surface with hydrogen by exposure to B 2 H 6 gas is proposed. This process must be carried out at temperatures below 400°C to avoid hydrogen desorption and boron adsorption. Because the gas phase reaction of B 2 H 6 and alcohol has been reported to occur at 300 to 350°C, the activation energy of the hydrogen substitution reaction must be less than that of the gas phase reaction. To compare these activation energies, the reaction pathways and activation energies of the BH 3 and CH 3 OH reaction, and of the BH 3 and CH 3 O adsorbed on a Si surface are calculated using an ab-initio molecular orbital method. Calculation results show that these reactions occur via an intermediate product, CH 3 OH · BH 3 and CH 3 O(BH 3 ) · Si-surface, respectively. The activation energy of the gas phase reaction from the intermediate product to CH 3 OBH 2 was calculated to be 1.16 eV. However, the activation energy of the surface reaction was calculated to be 0.77 eV, about two-thirds that of the gas phase reaction. Thus, it appears that alcohol adsorbents on a Si surface can be displaced by hydrogen during B 2 H 6 gas exposure without boron adsorption or hydrogen desorption occurring. The reaction mechanism of these reactions is also analyzed. The main mechanism of the reactions is suggested to be the transition of electrons of the BH bonding orbital to the SiO anti-bonding orbital in the case of the surface reaction, and to the OH anti-bonding orbital in the case of the gas phase reaction. The lower activation energy in the surface reaction results in the electron movement from the substituent OBH 3 to the Si surface; that is, a catalysis of the Si surface.

A one-mask-patterned ferroelectric capacitor memory cell structures designed with a 0.5-μm feature size were fabricated. Oxygen plasma treatment after dry etching decreased the leakage current to as low as as-deposited film. The one-mask-patterned ferroelectric capacitors with switching charge almost equal to as-deposited film were achieved. Ferroelectric memories as dense as dynamic random access memories will become possible with this technology.

Lead zirconate titanate (PZT) thin films were prepared by reactive coevaporation with high-concentration ozone. PZT thin films that demonstrate the highest charge storage density (280 fC/μm2 at 1.5 V for 75-nm-thick film) yet reported have been fabricated. No fatigue was observed after 1011 polarization switching cycles even though a Pt electrode is used. A low leakage current of

Chemical states and structures of thin degenerated layers grown on the surface of PZT(Pb(Zr, Ti)O 3 ) films are investigated by X-ray photo-electron spectroscopy (XPS) and RHEED (reflection of high energy electron diffraction). A careful study of the Ti 2p peak in the XPS spectrum reveals that PZT films easily absorb moisture from the air and decompose into their component oxides. This creates a degenerated layer that can be removed by the nitric acid treatment. After this treatment, the PZT surface becomes more resistant to humidity than the original surface.

The mechanism of TiN barrier metal oxidation of Pt/TiN electrodes are investigated for planarized stacked memory utilizing lead zirconate titanate (PZT). Thinner (

We developed Al2O3/Si3N4 stacked insulators suitable for the advanced metal–oxide–semiconductor (MOS) devices. Ultrathin Si3N4 was prepared by direct nitridation of Si substrate using atomic nitrogen radicals. With this process, the film obtained was less defective compared to conventional Si3N4. Al2O3 was then deposited by atomic layer deposition on Si3N4 and oxidized to eliminate defects in the film. Since the buffer Si3N4 does not contain a large amount of hydrogen, we could perform high-temperature oxidation without any additional interfacial layer formation in the Si substrate. We achieved high capacitance density and low leakage current that are acceptable for the gate insulator in advanced MOS devices with a 0.1 μm gate length by exploiting this buffering technique.

The ferroelectricity of sol-gel derived 80-nm Bi3.45La0.75Ti3O12 (BLT) films was significantly enhanced by low-pressure baking during the sol-gel process. The ferroelectricity enhancement was caused by the low-pressure baking after the drying process in air and before the crystallization of the dried gel. The maximum remanent polarization (Pr) was 27.2 µC/cm2, which was achieved after baking at 1.3 kPa oxygen pressure. The coercive field of 54.3 kV/cm was also achieved at the same time. This Pr value is 2.3 times larger than the value attainable with the usual 1-atm baking process. The saturation property of the same capacitor proved that +/-2 V operation is possible. It was also found that the enhanced polarization is fatigue-free up to 1010 switching cycles.

A three-dimensional (3-D) vertical chain-cell-type phase-change memory (VCCPCM) for next-generation large-capacity storage was developed. The VCCPCM features formation of memory holes in multi-layered stacked gates by using a single mask and a memory array without a selection transistor. As a result of this configuration, the number of process steps for fabricating the VCCPCM is reduced. The excellent scalability of the VCCPCM's new phase-change material makes it possible to reduce the cell size beyond the scaling limit of flash memory. In addition, a poly-silicon selection diode makes it possible to reduce the cell factor to 4F2. Consequently, relative cost of the VCCPCM compared to 3-D flash memory is reduced to 0.2.

The microscopic fluctuations of nonstoichiometry were investigated in relation to crystal growth conditions. Striation patterns on undoped semi-insulating GaAs wafers are found to have strong correlations with nonstoichiometry fluctuations. Taking into account the compositional dependence of implanted Si activity, excess arsenic is shown to be incorporated into solid GaAs according to the impurity segregation theory. Consequently, striation patterns were made uniform by suppressing the unstable convection flow in the melt during crystal growth. As a result, the microscopic inhomogeneity of FET (field effect transistor) threshold voltages was greatly reduced to less than two thirds of the conventional value.

We developed high-performance metal–ferroelectric–insulator–semiconductor (MFIS) structures with a damage-free and hydrogen-free Si3N4 buffer layer as an insulator. We fabricated Si3N4 films by nitriding Si substrates with N2 and/or atomic N radicals generated by an rf radical cell. In contrast to conventional Si3N4 films, the radical-nitride Si3N4 films showed no hysteresis or flat-band shift in the capacitance–voltage (C–V) characteristics even after high-temperature treatments, such as crystallization annealing of ferroelectric thin films deposited on the buffer Si3N4. Using this radical nitride Si3N4 as a buffer layer, we fabricated MFIS diodes with a Pt/Bi3.25La0.75Ti3O12/Si3N4/Si structure. These diodes had good hysteresis in their C–V characteristics, resulting from remnant polarization of the ferroelectric films. However, no other parasitic effects originating in charge trapping and/or detrapping were observed.

Optical properties of GaAs quantum-wire crystals are investigated by means of time-resolved photoluminescence measurements. Recombination dynamics of carriers in the quantum-wire crystals are characterized on the basis of a rate equation which includes surface recombination and effect of depletion layer. Surface treatment with sulphur solution decreases significantly the surface charge density and surface recombination. Reduction in radiative life time is observed after the surface treatment. This implies that the modification of spatial profile of carrier wave functions is caused by a change in band bending at the surface.

We have investigated the KrF-excimer-laser-photolysis (248 nm) of the bishexafluoroacetylacetonates (hfa) of platinum and palladium in the gas phase. Fluorescence spectra of the reaction products have been monitored between 200 and 400 nm initially after the photolyzing excimer-laser-pulse. The most intensive atomic lines of Pt and Pd situated on top of broad structureless bands could be identified

Strain imaging is used to measure and image piezoelectric properties by detecting electric-field-induced strains using a scanning probe microscope. In this letter, we present ferroelectric domain imaging under an electrode in a lead-zirconate-titanate (PZT) film. The imaging has been achieved by detecting the surface force modulation caused by the electrode displacements. Observation through the electrode suppresses the effect of space charges and enables us to investigate the PZT film in the same situation in devices. We observed the freezing of polarization of a PZT film deoxidized by atomic hydrogen produced by catalysis of platinum upper electrodes due to hydrogen annealing.

We report a novel resistive switching ion-plug memory (IPM) with a dual-layered structure containing a solid electrolyte layer (supply layer) that has Cu ions and a resistive switching layer (memory layer). By adopting this structure, IPM achieved higher endurance and longer retention time compared to previously reported solid electrolyte memory because excess Cu deposition was prevented. The conductive path of Cu with a 20 nm was observed by a cross sectional transmission electron microscope analysis. Generation/rupture of the path enables local resistance switching at diameters smaller than 32 nm. A set/reset operation that takes 30 ns and an endurance of 109 cycles were presented. IPM is a promising candidate for high-density memory for 32-nm technology node and beyond.

Phase-change memory is promising because it has a simple structure and has scalability that originates from its unique operating mechanism. However, the programming current should be reduced in accordance with the scaling of cell size [1,2]. We previously reported PCM (Phase Change Memory) cells that operate under 1.5-V/100-μA writing pulses [3, 4]. This PCM had a cell structure composed of 180-nm-W (tungsten) bottom contact to an O-GST (Oxygen-doped GeSbTe) film. Its low-power characteristic is suitable for 0.13-μm generation embedded applications. In the present study, we introduced a new W/O-GST/TaO/W cell structure and found further decrease of programming current the improved stability in the fabrication process. We analyzed the mechanism by which oxygen in GST and the additional TaO layer reduce the power consumption during SET/RESET operations.

with platinum electrodes subjected to hydrogen annealing using strain imaging. The polarization remains downward, when the applied voltage is below 3Vpp. This is caused by a positive internal electric field produced by space charges created in areas with upper platinum electrodes. The freezing of polarization induces a significant reduction in remanent polarization but does not cause large changes in permittivity.

A novel memory cell for phase-change memories (PCMs) that enables low-power operation has been developed. Power (i.e., current and voltage) for the cell is significantly reduced by inserting a very thin Ta2O5 film between GeSbTe (GST) and a W plug. The Ta2O5 interfacial layer works not only as a heat insulator enabling effective heat generation in GST but also as an adhesion layer between GST and SiO2 underneath. Nonetheless, sufficient current flows through the interfacial layer due to direct tunneling. A low programming power of 1.5 V/100 muA can therefore be obtained even on a W plug with a diameter of 180 nm fabricated using standard 0.13-mum CMOS technology. In addition, the uniformity and repeatability of cell resistance are excellent because of the inherently stable Ta2O5 film properties

We demonstrated the operation of phase-change memory cells that enabled 1.5-V/100-muA programming through a tungsten-bottom-electrode contact with a diameter of 180 nm. This is the lowest power ever reported. This was achieved with oxygen-doped GeSbTe, and resulted from the high electric resistance of the germanium oxides in this material. Germanium oxides were also estimated to restrain the growth of crystal in GeSbTe, and our cells maintained a 10-year thermal lifetime at 100 degC

This paper presents a measurement method for 1 transistor-1 resistance (1T1R), phase-change memory (PCM) devices. We fabricated a novel PCM test structure with an internal voltage measurement point, and we monitored the voltage drop between 1T and 1R. The voltage drop was accurately converted to the PCM programming current. This test structure enabled us to measure programming current of less than 100/spl mu/A with a width of 100ns. This method is essential for measuring the low-power operation of PCMs and other nonvolatile memories.

One of the most serious forms of damage that occurs during the integration of Pt/PZT/Pt ferroelectric capacitors [where PZT is Pb(ZrxTi1−x)O3] is the disappearance of polarization hysteresis characteristics during the passivation process. The hydrogen content of the atmosphere during this process affects the ferroelectric capacitor characteristics. However, the PZT film itself is not damaged by annealing in a hydrogen‐containing atmosphere even at 400 °C, whereas the Pt/PZT/Pt ferroelectric capacitor loses its polarization hysteresis characteristics at 300 °C. The top Pt electrode was found to induce this damage. Possible mechanisms such as stress and a chemical reaction with the Pt catalyst are discussed.

Flash memories are now widely spread and conveniently used in mobile devices such as cellular phones, pagers, PDAs (Personal Digital Assistants), digital cameras and so on. And in the coming ubiquitous era, nonvolatile solid-state memories are expected to be more and more important for these mobile devices. However, Flash memories are not perfectly suitable for these mobile devices since their power consumptions are too high, writing speeds are two slow, programming endurances are limited up to 106 cycles. To resolve these problems, numbers of new nonvolatile solid-state memories are proposed and some of them are now under development. Among these newly emerging nonvolatile memories, FeRAMs (Ferroelectric Random Access Memories) are the only ones that are now in production. However, the process and materials to produce FeRAMs have not matured yet to support the ubiquitous technologies.In this study, we explore the process technologies and materials required for the future FeRAMs and obtained the result that the requirements can be satisfied by the known technologies at present.

We introduced high-k Al2O3/Si3N4 buffer layer in MFIS (Metal-Ferroelectric-Insulator-Semiconductor) devices to reduce the leakage current though the buffer (I) layer. We prepared the buffer layer by nitridizing Si substrate by atomic nitrogen radicals and then deposited Al2O3 film using ALD (Atomic Layer Deposition) technique. The interface state density between the ALD-Al2O3/Radical-Si3N4 stacked insulator and a Si substrate is as low as 1011 cm-2eV-1. The current density less than 10-9 A/cm2 is realized under the 1V bias application using films with the capacitance density of 12fF/μm2. The c-axis oriented Bi3.45La0.75Ti3O12 (BLT) ferroelectric films were deposited to make MFIS structure. With this structure, we obtained the retention time as long as 1.5×106 sec (about 17 days). This excellent retention character is attributable to the high insulating property of the ALD-Al2O3/Radical-Si3N4 stacked insulator and also attributable to the perfect elimination of defects at the interfaces in the MFIS structure.

A single-transistor/single-capacitor ferroelectric random access memory (FeRAM) cell having a cell size of 4.5 /spl mu/m/sup 2/ has been developed using 0.5-/spl mu/m technology. This cell features a stacked capacitor structure with a poly-Si plug and an angled-capacitor layout. This unique capacitor layout increases the alignment tolerance between the plate contact and the individual capacitor electrodes without increasing the cell area. O/sub 2/ annealing was applied after the plate-contact formation to restore the remanent polarization degradation. Favorable ferroelectric capacitor characteristics were observed when this cell was used in an experimental 4-Kbit memory-cell array.

Pt/Bi/sub 3.25/La/sub 0.75/Ti/sub 3/O/sub 12//Bi/sub 2/SiO/sub 5//Si/sub 3/N/sub 4//Si MFIS (Metal/Ferroelectric/Insulator/Semiconductor) structures were prepared by sol-gel method. Bi/sub 3.25/La/sub 0.75/Ti/sub 3/O/sub 12/ and Bi/sub 2/SiO/sub 5/ films were deposited at 800/spl deg/C. The Si/sub 3/N/sub 4/ was made by exposing N/sub 2/ radicals to a Si substrate from a radical gun in a vacuum chamber at temperatures from 800/spl deg/C. The MIS diode with this Si/sub 3/N/sub 4/ showed no hysteresis after any thermal treatment. 200 nm-thick Bi/sub 3.25/La/sub 0.75/Ti/sub 3/O/sub 12/ and 10 nm-thick Bi/sub 2/SiO/sub 5/ buffer films were formed by sol-gel method on a 1.8 nm thick Si/sub 3/N/sub 4/ layer. The capacitance-vs-voltage (C-V) characteristic of the MFIS diode showed 1.4 V memory window for the +/-5V voltage scan. The memory window width agreed well with the polarization characteristics (remanent polarization Pr=0.9 /spl mu/ C/cm/sup 2/ and coercive field Ec=40 kV/cm) of a Bi/sub 3.25/La/sub 0.75/Ti/sub 3/O/sub 12/ film, which were measured using a Pt/c-axis-oriented 100 mn-thick Bi/sub 3.25/La/sub 0.75/Ti/sub 3/O/sub 12//Pt capacitor. Moreover, two capacitance values at zero-bias were kept constant for over 24 h, which indicates the retention characteristic of the diode is excellent.

The Al2O3 thin films were deposited on the Si3N4 (radical- Si3N4) prepared by the direct nitridation of a Si substrate using atomic nitrogen radicals. Because the radical- Si3N4 is highly resistive against the oxidation process, we can completely eliminate the metal phase in Al2O3 that degrades the insulating properties of Al2O3. The 1.3nm thick Al2O3 film was found to have a permittivity of 9.76 in this stacked Al2O3/Si3N4 structure. It was also found that no oxidation took place at the interface of Si3N4 and the Si substrate during the deposition and post-oxidation of the Al2O3 film on the radical-Si3N4/Si substrates. As a result, highly capacitive MIS (Metal-Insulator-Semiconductor) structures were realized using the Al2O3/Si3N4 stacked insulator. The MIS diode with Al2O3/Si3N4 is found to have 105 times less leakage current compared to the diode with Si3N4 insulator film with similar capacitance density. We have shown that the insulating properties of the Al2O3/radical-Si3N4 stack are suitable for the MFIS (Metal-Ferroelectric-Insulator-Semiconductor) transistors.

The well c-axis-oriented Bi3.25La0.75Ti3O12 films with good crystallinity and good surface morphology were obtained at temperatures higher than 600°C It was also found in a Pt / 100nm-Bi3.25La0.75Ti3O12 / 3nm-Si3N4 / Si ( metal / ferroelectric / insulator / semiconductor ) structure that C-V characteristics showed a hysteresis loop with a memory window of about 1V and both the high and low capacitance values kept at zero bias voltage did not change for more than 3 hours.

The hillock growth mechanism at the surface of Pt/TiN electrodes is investigated. TEM and SEM observations confirm that local delamination occurs at the Pt/TiN interface first, and then, plastic deformation of the Pt films under compressive stress forms hollow domes, which result in hillocks. Hillocks always start to grow when the internal stress in the Pt films reaches about −1000 MPa during annealing in N2/O2 ambient. Since the initial internal stress of Pt thin films varies from −500 to 500 MPa, depending on their deposition temperature, the hillock growth temperature strongly depends on the deposition temperature of the Pt films. It is very important, therefore, to control the initial internal stress in Pt films in order to eliminate hillock growth at the surface of Pt/TiN electrodes.

The integration limit of flash memories is approaching, and many new types of memory to replace conventional flash memories have been proposed. Unlike flash memories, new nonvolatile memories do not require storage of electric charges. The possibility of phase-change random-access memories (PCRAMs) or resistive-change RAMs (ReRAMs) replacing ultrahigh-density NAND flash memories has been investigated; however, many issues remain to be overcome, making the replacement difficult. Nonetheless, ferroelectric RAMs (FeRAMs) and magnetoresistive RAMs (MRAMs) are gradually penetrating into fields where the shortcomings of flash memories, such as high operating voltage, slow rewriting speed, and limited number of rewrites, make their use inconvenient. For instance, FeRAMs are widely used in ICs that require low power consumption such as smart cards and wireless tags. MRAMs are used in many kinds of controllers in industrial equipment that require high speed and unlimited rewrite operations. For successful application of new non-volatile semiconductor memories, such memories must be practically utilized in new fields in which flash memories are not applicable, and their technologies must be further developed.

An indium-incorporated germanium–antimony–telluride material, In20Ge15Sb10Te55 (IGST), was investigated as a recording material for phase change memory. The crystallization temperature of IGST was 226 °C, which is 75 °C higher than that of conventional GST. The reset current of the device using IGST was about 10 mA for a plug 180 nm in diameter, which enabled a low-power operation, compared with the GST-based device. A cycle endurance of up to 1.5×104 was achieved. The data retention was estimated to be 10 years at 145 °C. These data clearly show that IGST exhibits promising characteristics as a recording material for phase change memory.