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This paper presents a hybrid power supply system for robot actuators that has multiple voltage buses and hybrid energy storage including a supercapacitor. The proposed system utilizes a multi-tasking control scheme to reduce the component count. To improve the system response of mobile robots, a supercapacitor is employed in the proposed architecture along with a battery. The proposed circuit offers two higher voltage buses than the main battery voltage in order to employ higher voltage actuators with a lower current for a higher power density. To manage the DC buses and the supercapacitor’s bidirectional power flow, three switching devices are used in the proposed structure, reducing a switching device and an inductor. A control structure using a mixed switching strategy has been developed to regulate the higher-voltage buses and the supercapacitor’s power flow simultaneously. The proposed control and circuit structure are validated by hardware experiments.

A series arc produces both light and heat, which results in a risk of fire. Hence, its prompt detection is very important. The series arc has different frequency characteristics depending on the operating conditions of the inverter and the line impedance. As a result, it is difficult to detect with conventional methods that use specific frequency bands. In this study, series arcs generated by three-phase pulse-width-modulated and three-phase model-predictive-control inverter loads, operating under various conditions, were detected using a deep-learning algorithm. To detect a series arc fault, the frequency characteristics were analyzed using all the frequency bands of a fast Fourier transform (FFT) result. To use all the frequency bands, a deep neural network (DNN), which is a deep-learning algorithm, was used. DNNs can learn quickly from large amounts of data and model complex nonlinear relationships. The DNN model proposed in this paper was designed to use all the frequency bands, and three cases were tested by changing the current magnitude and switching frequency. The arc current detection accuracy was calculated for three test cases and the obtained results were analyzed in detail based on the percentages of true/false and mean absolute error metrics. The analysis confirmed that the arc current was accurately detected, which validates the suitability of the DNN for series arc detection.

Various studies on arc detection methods are described. Series AC arc is detected based on the characteristics extracted from arc voltage, frequency, and time domain of the current. Methods of arc detection using artificial intelligence have been studied previously. In the present study, the performance of multiple methods is analyzed by comparing different input parameters and artificial neural networks. In addition to the input parameters presented in the literature, the performance is compared and analyzed using the following parameters: zero-crossing period, frequency average, instantaneous frequency, entropy, combination of fast Fourier transform (FFT) and maximum slip difference, and combination of FFT and frequency average. These parameters and different neural networks are studied in the bounded and unbounded case, and the performance is compared. For different combinations of neural networks and input parameters, another research question is to identify the input parameters to be used if the number of training data is limited. Moreover, this study investigates the change in detection rate depending on the number of training samples. As a result, the minimum dataset size required to obtain the final detection rate is identified.

This paper presents a computational reduction algorithm for applying model predictive control to a three-level four-leg converter. An optimal switching state is selected by only considering 7 voltage vectors located near the reference voltage vector, rather than using 81 voltage vectors in every sampling period, as in the conventional method. The sector, prism, and tetrahedron are sequentially selected using the position of the reference voltage vector. In addition, the seven voltage vectors selected in advance are the vectors constituting the selected tetrahedron. Thus, the proposed method reduces the computational cost and provides an improved model predictive control that does not affect the performance. The proposed method comprises an experimental setup of the proposed three-level four-leg converter to compare its performance with that of the conventional method.

This paper proposes a novel, degradation-sensitive, adaptive SST controller for cascode GaN-FETs. Unlike in traditional transformers, a semiconductor switch’s degradation and failure can compromise its robustness and integrity. It is vital to continuously monitor a switch’s health condition to adapt it to mission-critical applications. The current state-of-the-art degradation monitoring methods for power electronics systems are computationally intensive, have limited capacity to accurately identify the severity of degradation, and can be challenging to implement in real time. These methods primarily focus on conducting accelerated life testing (ALT) of individual switches and are not typically implemented for online monitoring. The proposed controller uses accelerated life testing (ALT)-based switch degradation mapping for degradation severity assessment. This controller intelligently derates the SST to (1) ensure robust operation over the SST’s lifetime and (2) achieve the optimal degradation-sensitive function. Additionally, a fast behavioral switch loss model for cascode GaN-FETs is used. This proposed fast model estimates the loss accurately without proprietary switch parasitic information. Finally, the proposed method is experimentally validated using a 5 kW cascode GaN-FET-based SST platform.

Series arc faults are becoming more dangerous in DC systems. Without detecting in time and separation correctly, these fault events can cause electrical fires or explosions, creating a massive threat to people’s safety and properties. This paper presents an analysis and comparison of DC series arc fault detection using various artificial intelligence (AI) algorithms in DC systems. The combinations of six feature parameters in both time and frequency domains with various AI techniques are recommended to detect DC series arc fault effectively. The performance and effectiveness of different combinations between feature parameters and learning techniques are summarized and discussed. Finally, practical challenges are identified, and suitable combinations of feature parameters and learning techniques are recommended for different operation conditions.

Owing to the low number of submodules (SMs) in modular multilevel converters (MMCs), especially in medium-voltage applications, the output current and voltage generated by conventional nearest-level control (NLC) methods contain evident distortions. Previously, various hybrid and level-increased NLC methods have been proposed to improve the output voltage quality, but such measures wither increased the complexity or did not regulate all the control objectives simultaneously. To further enhance the output performances of MMCs containing low numbers of SMs, an improved predictive NLC (I-PNLC) method combining NLC and model predictive control (MPC) is proposed, where the output and circulating currents are regulated with the corresponding predicted references, and the output voltage is controlled by the added voltage correction. The proposed I-PNLC not only reduces the output current and voltage total harmonic distortion (THD) considerably but also avoids additional complexity in the control system design. The results of simulations and an experiment are presented to verify the proposed approach, in addition to a comparison of the evaluations of conventional NLC methods.

This paper proposes a DC series arc detection algorithm in a photovoltaic (PV) system using an adaptive moving average (AMA). The proposed algorithm uses two moving averages of $F_{av}$ which is the average of 5 kHz to 40 kHz frequency band. One is ${MA}_{small}$ which is the moving average highly affected by recent $F_{av}$ . The other is ${MA}_{large}$ which is the moving average heavily affected by past $F_{av}$ . There is a little difference between ${MA}_{small}$ and ${MA}_{large}$ before arcing because $F_{av}$ is approximately constant. However, this difference increases when the arc occurs because ${MA}_{large}$ slowly follows ${MA}_{small}$ . This difference is used as an arc detection indicator (ADI) in this study. Additionally, AMA is proposed to avoid nuisance tripping in the normal transient state. The proposed method determines the arc occurrence using the relative magnitudes of the two moving averages. Therefore, it is less affected by the shape of the frequency fluctuations caused by the load inverter. Hence, the proposed algorithm is effective in the centralized and spread-type of frequency fluctuations. These results were verified through an arc detection test and nuisance tripping test using arc experimental data and MATLAB.

The wide variety of arc faults induced by different load types renders residential series arc fault detection complicated and challenging. Series dc arc faults could cause fire accidents and adversely affect power systems if not promptly detected. However, in practical power systems, they are difficult to detect because of a low arc current, absence of a zero-crossing period, and various abnormal behavior based on different types of power loads and controllers. In particular, conventional protection fuses may not be activated when they occur. Undetected arc faults could cause false operation of power systems and potentially lead to damage to property and human casualties. Therefore, it is imperative to develop a detection system for series arc faults in DC systems for the reliable and efficient operation of such systems. In this study, several typical loads, especially nonlinear and complex loads such as power electronic loads, were chosen and analyzed, and five time-domain parameters of the current—average value, median value, variance value, RMS value, and distance of the maximum and minimum values—were chosen for arc fault detection. Various machine learning algorithms were used for arc fault detection and their detection accuracies were compared.

48 V electric system architecture has been recently introduced to accommodate an increasing number of electric components in mild hybrid electric vehicles. In this study, two additional DC buses are added for electric machines including 36 and 24 V AC- and DC-motor/actuator loads, in a 48/12 V power supply system. This structure can yield significant benefits, especially for electrified vehicles that have more electric machines and actuators. A single-inductor multi-output structure is employed, with a control strategy that produces linear transfer functions and is less sensitive to load variation, to accommodate multiple-bus motor/actuator drives. The proposed structure and control strategy can offer options for selecting proper bus voltages, optimising the electric machine's power density. Both simulations and experiments have been performed to verify the system structure and control schemes using 36 and 24 V electric machines connected to the additional dual-output buses on top of the existing 12/48 V bus structure.

This paper presents switch fault detection and compensation control schemes for a modified dc-dc converter that relocates a diode location. The proposed fault detection and compensation control schemes are applicable to various energy generation systems that include energy storage. A fault detection index has been introduced to detect an open switch fault in the modified converter structure, and a compensation control method based on a mixed switching strategy has been developed. The fault-tolerant control method along with the detection scheme can make a system return to work even under a switch fault. The proposed schemes have been tested and verified both by the simulations and by experiments using a TMS320F28335 DSP. The results will significantly improve the reliability of alternative energy generation systems against open switch faults.

This paper proposes a novel input power factor control method based on a concept of virtual capacitors to provide unity input power factor for three-phase matrix rectifiers. The proposed algorithm introduces, at the input terminal of the matrix rectifier, an imaginary input capacitor generated by modifying a reference vector of the space vector modulation method. The virtual input capacitor, which is fictitiously built in parallel with an input LC filter, successfully compensates for the leading power factor of the LC filter of the matrix rectifier. Thus, the proposed method yields a unity power factor operation despite the presence of the LC filter of the three-phase matrix rectifier. In addition, under a condition when the unity power factor operation cannot be realized, the proposed algorithm adjusts a virtual capacitance to obtain a maximum achievable power factor operation. Because the proposed technique yields the input power factor control by introducing the virtual capacitor and adjusting a reference space vector, the proposed algorithm can be easily incorporated with conventional space vector modulation algorithms for the three-phase matrix rectifiers. Thus, the proposed method can control input power factor without employing proportional-integral controllers used in conventional power factor control methods for the matrix rectifiers, leading to simple control structure and straightforward tuning process for power factor control.

This paper proposes a direct power control (DPC) method with a minimum reactive power reference for ac-to-dc matrix rectifiers using space vector modulation. Based on the calculated active and reactive power reference values, the developed DPC algorithm directly controls both the active and reactive power components of the source by operating the three-phase matrix rectifiers, thereby obtaining the sinusoidal input currents and output dc voltage/current of the rectifier. The proposed DPC method instantaneously determines a source reactive power reference command to achieve a unity input power factor or maximum achievable power factor on given input and output conditions, because ac-to-dc matrix rectifiers cannot always attain a unity power factor due to the existence of the input capacitors. In addition, the developed algorithm calculates the minimum reactive power reference without using any circuit parameters. Thus, the proposed algorithm is free from any inevitable parameter uncertainty, resulting in a more robust and accurate power factor control for the rectifier. Based on the minimum reactive power reference, the proposed algorithm enables matrix rectifiers to operate at an input power factor that can be maximally obtained at all times. The effectiveness of the proposed method was verified by the simulations and experiments.

Capacitors are critical components of power converter systems as they influence the cost, size, performance, and scale of such systems. However, capacitors exhibit the highest degeneration and breakdown rates among all power converter components due to their wear-out failures and short lifespans. Therefore, condition monitoring is a vital process to estimate the health status of capacitors and to provide predictive maintenance for ensuring stability in the operation of power converter systems. The equivalent series resistance (ESR) and the capacitance of the capacitor are two widely used parameters for evaluating the health status of capacitors. Unlike the ESR, the capacitance of a capacitor is suitable for the health monitoring of various types of capacitors; therefore, it is more preferable for large-scale systems. This paper presents an overview of previous research addressing this aspect of capacitors and provides a better understanding of the capacitance monitoring of capacitors utilized in power converter systems.

In order to apply the model predictive control to the power converter, a study on the calculation amount reduction algorithm was performed in various topologies such as 2-level, 3-level, multi-level converter. Similarly, in order to apply the model predictive control to the 3-level 4-leg converter, it is necessary to study the calculation amount reduction algorithm. In this paper, instead of considering 81 candidate voltage vectors for every sampling period as in the conventional model predictive control, the optimal switching state is selected considering only 7 candidate voltage vectors located near the reference voltage vector. The sector, prism, and tetrahedron are selected sequentially by using the position of the reference voltage vector, and the preselected 7 candidate voltage vectors are the vectors constituting the tetrahedron. The proposed method represents an improved model predictive control which reduces the amount of computation and does not affect performance. This method constructs the 3-level 4-leg NPC inverter simulation and experimental setup to compare the performance with the conventional method.

Model predictive control (MPC) for modular multilevel converter (MMC) systems has drawn attention among researchers in recent years due to its straightforward implementation, ability to control multiple objectives in a single cost function, and excellent dynamic response. Even though MPC seems promising for the MMC, it suffers from an excessive increase in computational complexity when the number of submodules (SMs) per arm ( N ) is increased. The computational load can be reduced by decoupling the SM capacitor voltage control from the cost function and balancing them in an external voltage sorting algorithm. In this paper, a further reduction of computations in the MPC is achieved by the preselection of control options that can satisfy the control objectives in the next sampling time. The preselection algorithm generates a greatly reduced number of control options to be computed by a straightforward MPC loop at each sampling time. In addition, the MPC together with the preselection algorithm can generate $2N+ 1$ output voltage levels in the MMC while maintaining a low $dv/ dt$ in the output voltage and suppressing the circulating currents in MMCs with considerable number of SMs. The steady-state and dynamic performance of the MMC operating with the proposed method is verified by simulation and experimental results.

Demand for modular multilevel converters (MMCs) has been steadily increasing for utilization in medium- to high-power applications because of qualities such as high modularity, easy scalability, and superior harmonic performance. Furthermore, there has been a growing trend toward utilizing model predictive control for MMCs due to its simplicity, good dynamic response, and ease of multi-objective control. However, the rise in computational load leads to a great drawback when increasing the number of submodules (SMs). This paper presents an approach to reducing the computational load and using on-state SMs and circulating currents, by preselecting the number of SMs inserted in the upper and lower arms. This approach is based on using the number of on-state SMs and the circulating current, to compute the number of SMs inserted in the upper and lower arms, which is evaluated in the next sampling instant. This facilitates a significant reduction in the number of control options and the computational load. A sorting algorithm is used to retain the balancing capacitor voltages in each SM, while the cost function guarantees the regulation of the ac-side currents, arm voltages, and MMC circulating currents. Simulation and experiment results validate the performance of the proposed approach.

A predictive direct power control (PDPC) technique to decrease switching loss by injecting offset voltage is proposed for three-phase voltage source converters. The active and reactive power elements of the converter are directly controlled by using three-phase future converter input voltages, which are modified for lowering switching losses by injecting a future offset voltage. Switching operations, generated by the developed PDPC algorithm with modified converter voltage, stop switching operation in one of the converter phases exposed to the highest input current. The non-switching period and the non-switching phase in the proposed technique is automatically adjusted by the reactive power reference, which leads to high efficiency, irrespective of varying input power factor angle condition. The proposed algorithm chooses one optimal voltage vector enabling future active and reactive power to approach closest to the future power references and prohibiting switching of one converter phase conducting the highest current at each step. Therefore, the developed technique can directly control power components and increase converter efficiency, which is proven by simulation and experimental verification.

This paper presents a direct model-based predictive control scheme for voltage source inverters (VSIs) with reduced common-mode voltages (CMVs). The developed method directly finds optimal vectors without using repetitive calculation of a cost function. To adjust output currents with the CMVs in the range of –Vdc/6 to +Vdc/6, the developed method uses voltage vectors, as finite control resources, excluding zero voltage vectors which produce the CMVs in the VSI within ±Vdc/2. In a model-based predictive control (MPC), not using zero voltage vectors increases the output current ripples and the current errors. To alleviate these problems, the developed method uses two non-zero voltage vectors in one sampling step. In addition, the voltage vectors scheduled to be used are directly selected at every sampling step once the developed method calculates the future reference voltage vector, saving the efforts of repeatedly calculating the cost function. And the two non-zero voltage vectors are optimally all...

Three model predictive current control methods based on two-vector utilisation are proposed and compared voltage source inverters (VSIs) to regulate the load currents and achieve a low current ripple and error. In the three methods, selecting and dividing two voltage vectors for a next sampling interval are determined by an optimisation. However, the procedure of determining two vectors and their durations differ for each method. The first method considers all 49 possible combinations obtained by two vectors. In the second method, the prior vector is selected beforehand using the conventional method, and then, the latter vector is selected among seven vectors along with durations. The second scheme has the advantage of lower computational complexity; however, it suffers from an increase in current error, relative to the first scheme. The least computationally complex approach is achieved using the third method choosing two vectors in the same manner as the conventional method but suffering from the largest current errors among the proposed methods. As a result of the optimisation procedure involved in selecting and partitioning two vectors, all three proposed methods result in a reduced total harmonic distortion and smaller current errors in comparison to the conventional method with half sampling period.

In this paper, a design and optimization method of ferrite core is proposed for wireless charging system of plug-in hybrid electric vehicle to improve its misalignment tolerance and minimize the core loss. While optimizing for higher misalignment tolerance, the primary focus is given to maintain uniform flux density in the core to minimize the core loss. An excessive use of core increases the weight and loss of the system, which need to be minimized through optimal design. Moreover, the flux density changes with misalignment, and the misalignment probability for car parking could be different in different direction. Hence the directional probability of misalignment needs to be considered during core design. In this paper, a core structure is proposed for a circular and bar-shaped core to achieve uniform flux density and an optimization method is proposed based on sequential nonlinear programming algorithm in FEA. Compared to typical uniform thickness core structure, in an optimized core, the core loss per unit volume is reduced by 30% for circular core and by 39% for bar-shaped core and the core volume per unit core loss is reduced by 17.5% in optimized circular shaped core.

Due to an increasing in-vehicle electric load demand, a new 48-V electric system architecture proposed by German premier car manufacturers has been gaining increasing attention recently for electrified vehicles. In this paper, a multiple-voltage bus converter for the 48-V and existing 12-V dual supply system, providing additional flexible dc bus voltages, is proposed. The proposed converter can provide a dual flexible dc voltage bus and an additional dependent voltage bus while simultaneously managing the 12-V supply net using only one single-leg switch pole and a diode. The additional dc voltage buses will provide more options to accommodate variable electric load components in a vehicle, improving their power density. Due to the multiple control objectives, the single-leg pole requires a multimode switching strategy to regulate the additional bus voltages. To improve the onboard vehicle system reliability and performance, an impedance network structure is implemented in the converter to obtain a dead-time-free pulsewidth modulation (PWM). Simulation and experimental results are presented to verify the feasibility and effectiveness of the proposed structure and control method.

In this paper, a predictive direct power control (DPC) method based on a Kalman filter is presented for three-phase pulse-width modulation (PWM) rectifiers to improve the performance of rectifiers with source voltages that are distorted with harmonic components. This method can eliminate the most significant harmonic components of the source voltage using a Kalman filter algorithm. In the process of predicting the future real and reactive power to select an optimal voltage vector in the predictive DPC, the proposed method utilizes source voltages filtered by a Kalman filter, which can mitigate the adverse effects of distorted source voltages on control performance. As a result, the quality of the source currents synthesized using the PWM rectifier is improved, and the total harmonic distortion (THD) values are reduced, even under distorted source voltages.

Six-phase Interior Permanent Magnet Synchronous Machine(IPMSM) is adopted for lower torque ripple, reduced phase current, and higher fault tolerance. For the high tolerant operation such as traction systems, six-phase machine enables converting to three-phase operation and lower torque ripple than five-phase is generated when one phase is in open fault state. In this paper, six-phase machine was analyzed to identify the variation of generated torque, copper loss and iron loss in three-phase operation. And also, the comparison with the results of normal six-phase operation is represented to verify trade-off.