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Core (r/a < 0.5) toroidal rotation from argon (Ar17+, 40 AMU) and molybdenum (Mo32+, 96 AMU) ions has been compared in C-Mod tokamak plasmas over a wide range of operating conditions and confinement schemes, including Ohmic L-mode in the linear and saturated regimes, ion cyclotron range of frequencies heated I-mode and H-mode, as well as in discharges with induced locked modes and with external current and rotation drive. In all cases the velocities of the two impurities are identical within about 5%, for a range between −60 and +80 km s−1. This is in general agreement with the predictions of neo-classical theory.

To attribute authorship (author identification) means to identify the true author of a sample of work among many candidates. Author identification is an important research field in natural language. Machine learning approaches are widely used in natural language analysis, and previous research has shown that similar techniques can be applied in the analysis of computer programming (artificial) languages. This paper focuses on the use of machine learning techniques in the identification of authors of computer programs. We focus on identifying which features capture the writing style of authors in the classification of a computer program according to the author's identity. We then propose a novel approach for computer program author identification. In this method, features from source code of the programs are combined with authors' sociological features (gender and region) to develop the classification model. Several experiments were conducted on two datasets composed of computer programs written in C++. Our models are able to predict an author's identity with a 75% accuracy rate.

The SPARC tokamak project, currently in engineering design, aims to achieve breakeven and burning plasma conditions in a compact device, thanks to new developments in high-temperature superconductor technology. With a magnetic field of 12.2 T on axis and 8.7 MA of plasma current, SPARC is predicted to produce 140 MW of fusion power with a plasma gain of Q ≈ 11, providing ample margin with respect to its mission of Q > 2. All tokamak systems are being designed to produce this landmark plasma discharge, thus enabling the study of burning plasma physics and tokamak operations in reactor relevant conditions to pave the way for the design and construction of a compact, high-field fusion power plant. Construction of SPARC is planned to begin by mid-2021.

This paper presents a quantum-level realization and synthesis approach using SWAP and Fredkin (SF) gates. Our quantum realization of negative-controlled Fredkin gate requires five 2-qubit elementary quantum gates, the same as that required for realizing a positive-controlled Fredkin gate. We also propose and evaluate the performance of a synthesis approach using SF gates for realizing conservative reversible functions. Our result shows that circuit realization for conservative function using SF gates is more efficient than Toffoli gates. We achieve up to \(87\%\) improvement in gate count and quantum cost for \((4 \times 4)\) conservative reversible functions.

We present an overview and analysis of existing work in the design of online testable reversible logic circuits, as well as propose new approaches for the design of such circuits. We explain how previously proposed approaches are unnecessarily high in overhead and in many cases do not provide adequate fault coverage. Proofs of the correctness of our approaches are provided, and discussions of the advantages and disadvantages of each design approach are given. Experimental results comparing our approaches to existing work are presented as well. Both approaches that we propose have better fault coverage and significantly lower overheads than previous approaches.

Ternary reversible logic functions are generally represented as ternary Galois field sum of products (TGFSOP) expressions and the TGFSOP expressions are mapped to reversible circuits using cascades of Feynman and Toffoli gates. Although a ternary logic function with a large number of variables can be minimized as a TGFSOP expression, the process is computationally expensive and the resulting reversible circuit tends to have a high quantum cost and ancilla in puts. To overcome these limitations, in this work we propose a new method of representing ternary reversible logic functions as Max of Min-terms (Max-Min) expressions, which can be mapped to a reversible circuit using multiple-controlled unary gates requiring lower quantum cost and fewer ancilla inputs. We propose a map-based minimization method for Max-Min expressions of up to four variables focusing on restrictions of the reversible circuit mapping technique.

Synthesis of reversible sequential circuits is a very new research area. It has been shown that such circuits can be implemented using emerging technologies such as quantum dot cellular automata. Earlier work uses traditional designs for sequential circuits and replaces the flip-flops and the gates with their reversible counterparts. Our earlier work used a direct feedback method without any flip-flops, which proved to be better than the replacement technique in terms of both quantum cost and ancilla inputs. This work is an improved version of our direct feedback method, which uses a different approach to the reversible mapping of sequential circuits. Design examples show that the proposed method produces better results than our earlier method in terms of both quantum cost and ancilla inputs.

Ternary reversible circuits are normally realized as Toffoli cascades using ternary Galois field sum of products (TGFSOP) expressions. In this work we propose a new method for realization of ternary reversible circuits using ternary Max-Min expressions. The proposed method uses ternary multiple-controlled unary gates to map Max-Min expression into reversible circuit. We also present techniques for realizations of multiple-controlled unary gates using M-S gates at the quantum level. Preliminary results show that the proposed method produces better results than TGFSOP-based method in terms of both quantum cost and ancilla inputs.

Tungsten will be an important element in nearly all future fusion reactors because of its presence in plasma facing components. This makes tungsten a good candidate for a diagnostic element for ion temperature and toroidal velocity measurement, and it makes understanding tungsten emissions important for tokamak power balance. The effect of tungsten on tokamak plasmas is investigated at the Alcator C-Mod tokamak using VUV, bolometry, and soft X-ray spectroscopy. Tungsten was present in Alcator C-Mod as a plasma facing component and through laser blow-off impurity injection. Quasi-continuum emission previously seen at other tokamaks has been identified. Theoretical predictions are presented of tungsten emission that could be expected in future Alcator C-Mod measurements. Furthermore, spectra of highly charged tungsten ions have been studied at the SuperEBIT electron beam ion trap. This emission could prove useful for spectroscopic diagnostics of future high-temperature fusion reactor plasmas.

Reversible logic is being suggested as a possibility for overcoming potential power loss and heat dissipation problems that the computing industry may soon be at a loss to overcome. However, for reversible logic to be a solution we must have techniques for synthesizing function descriptions to reversible circuits. This paper presents an improved ESOP-based reversible logic synthesis approach which leverages situations where cubes are shared by multiple outputs and ensures that the implementation of each cube requires just one Toffoli gate. It has the potential to minimize both gate count and quantum cost, and in fact our experimental results show that this technique can reduce the quantum cost up to 75% compared to results from the existing work.

A variety of mathematical transforms have traditionally been used in various logic synthesis applications. This paper investigates the use of the autocorrelation transform: C(τ) = f (v) ∞ f (v ⊕ τ) v=0 2 n −1 ∑ Properties of the coefficient resulting from the application of this transform to switching functions are examined and detailed, including properties to identify symmetries and decompositions. The potential uses in logic synthesis of these properties and other observations based on the autocorrelation coefficients are explored, with emphasis on proofs as mathematical justification of the theorems relating the observed properties of the coefficients to properties of the underlying switching functions. We first present the definition and an explanation of the autocorrelation transform. We then introduce several theorems relating the values of the resulting autocorrelation coefficients to properties of the underlying switching function. A number of potential applications for these theorems are presented, and future directions for this work are discussed.

Reversible logic has been suggested as one solution to the problem of power consumption in today's electronic devices. This paper addresses the issue of designing reversible latches and provides an overview and analysis of some proposed designs.

The understanding and predictive capability of transport physics and plasma confinement is reviewed from the perspective of achieving reactor-scale burning plasmas in the ITER tokamak, for both core and edge plasma regions. Very considerable progress has been made in understanding, controlling and predicting tokamak transport across a wide variety of plasma conditions and regimes since the publication of the ITER Physics Basis (IPB) document (1999 Nucl. Fusion 39 2137-2664). Major areas of progress considered here follow. (1) Substantial improvement in the physics content, capability and reliability of transport simulation and modelling codes, leading to much increased theory/experiment interaction as these codes are increasingly used to interpret and predict experiment. (2) Remarkable progress has been made in developing and understanding regimes of improved core confinement. Internal transport barriers and other forms of reduced core transport are now routinely obtained in all the leading tokamak devices worldwide. (3) The importance of controlling the H-mode edge pedestal is now generally recognized. Substantial progress has been made in extending high confinement H-mode operation to the Greenwald density, the demonstration of Type I ELM mitigation and control techniques and systematic explanation of Type I ELM stability. Theory-based predictive capability has also shown progress by integrating the plasma and neutral transport with MHD stability. (4) Transport projections to ITER are now made using three complementary approaches: empirical or global scaling, theory-based transport modelling and dimensionless parameter scaling (previously, empirical scaling was the dominant approach). For the ITER base case or the reference scenario of conventional ELMy H-mode operation, all three techniques predict that ITER will have sufficient confinement to meet its design target of Q = 10 operation, within similar uncertainties.

An overview of the diagnostics installed on the Alcator C-Mod tokamak is presented. Approximately 25 diagnostic systems are being operated on C-Mod. The compact design of the machine and the cryostat enclosing the vacuum vessel and magnetic field coils make access challenging. Diagnostics are used to study four focus areas: transport, plasma boundary, waves, and macrostability. There is significant overlap between these topics, and they all contribute toward the burning plasma and advanced tokamak thrusts. Several advanced and novel diagnostics contribute to the investigation of C-Mod plasmas, e.g., electron cyclotron emission, phase-contrast imaging, gas puff imaging, probe measurements, and active magnetohydrodynamic antennas.

The Rydberg series (1s2 to 1snp) up to n = 14 of helium-like argon (Z = 18) has been observed from Alcator C-Mod plasmas using a high-resolution X-ray spectrometer array. High-n satellites to these...

Global and local transport experiments in ohmic, L-mode and H-mode regimes on the Alcator C-Mod tokamak are summarized. For ohmic plasmas, earlier results derived for energy confinement scaling in ...

H-mode research on Alcator C-Mod is described, with a focus on the edge transport barrier (ETB). ETB pedestals are characterized using several diagnostics, leading to a thorough description of prof...

Reversible computing has been theoretically shown to be an efficient approach over conventional computing. This is due to the property of virtually zero power dissipation in reversible circuits. A major concern in reversible circuits is the number of circuit lines which corresponds with qubits. Qubits are a limited resource. There are various reversible logic synthesis algorithms which require a significant number of additional constant lines. In this paper we explore the line reduction problem using a synthesis approach based on decision diagrams. We have added a sub-circuit for a positive Davio node structure to the existing node structures given in [1] with a shared node ordering in OKFDDs. OKFDDs are a combination of OBDDs and OFDDs, thus exhibiting the advantages of both. Our approach shows that the number of circuit lines and quantum cost can be reduced using OKFDDs with our new sub-circuit and shared node ordering.

This paper focuses on the use of machine learning techniques for the analysis of computer programs in order to acquire information about an author's gender. There are few existing studies that address the relationship between linguistics and programming; however, in many areas where language is analyzed it is possible to mine important information about the users of that language associated with set of attribute or coding style. In this work we use open source implementations of machine learning algorithms, specifically, nearest neighbor (K*), decision tree (J48), and Bayes classifier (Naive Bayes). These algorithms were applied to C++ programs which were associated with sociolinguistic information about the program authors. Our goal was to classify the programs according to the gender of the author. As indicated by our initial results we have been able to achieve precision of 72.3%, recall of 72%, and f-measure of 71.9% which demonstrates that we can predict the gender of the authors of C++ programs.

In this paper we propose an approach for the design of online testable reversible circuits. A reversible circuit composed of Toffoli gates can be made online testable by adding two sets of CNOT gates and a single parity line. The performance of the proposed approach for detecting a single bit fault, a cross point fault and the family of missing gate faults has been observed. Discussion around the correctness of our approach and the overhead is also provided.

Plasma profiles and flows in the low- and high-field side scrape-off-layer (SOL) regions in Alcator C-Mod are found to be remarkably sensitive to magnetic separatrix topologies (upper-, lower- and double-null) and to impose topology-dependent flow boundary conditions on the confined plasma. Near-sonic plasma flows along magnetic field lines are observed in the high-field SOL, with magnitude and direction clearly dependent on X-point location. The principal drive mechanism for the flows is a strong ballooning-like poloidal transport asymmetry: parallel flows arise so as to re-symmetrize the resulting poloidal pressure variation in the SOL. Secondary flows involving a combination of toroidal rotation and Pfirsch–Schluter ion currents are also evident. As a result of the transport-driven parallel flows, the SOL exhibits a net co-current (counter-current) volume-averaged toroidal momentum when B × ∇B is towards (away from) the X-point. Depending on the discharge conditions, flow momentum can couple across the separatrix and affect the toroidal rotation of the confined plasma. This mechanism accounts for a positive (negative) increment in central plasma co-rotation seen in L-mode discharges when B × ∇B is towards (away from) the X-point. Experiments in ion-cyclotron range-of-frequency-heated discharges suggest that topology-dependent flow boundary conditions may also play a role in the sensitivity of the L–H power threshold to X-point location: in a set of otherwise similar discharges, the L–H transition is seen to be coincident with central rotation achieving roughly the same value, independent of magnetic topology. For discharges with B × ∇B pointing away from the X-point (i.e. with the SOL flow boundary condition impeding co-current rotation), the same characteristic rotation can only be achieved with higher input power.

Phosphorus slag containing elevated concentrations of radionuclides in the uranium series with radium-226 ranging from 750 to 1100 Bq/kg has been used in Southeastern Idaho communities as a construction material. An exposure study was conducted in the region to identify residences that incorporated phosphorus slag in the construction material, to determine the dose from the slag to residents, and to find slag in public structures and roads. Measurements were made with calibrated, commercial “Micro Rem” instruments and with commercial Al2O3 TL dosimeters. A total of 1472 residences were surveyed, and we estimate that less than 12% of the residences in Soda Springs contain slag; while no houses in Pocatello or Fort Hall were found to have slag in the construction. Individual dose estimates for nine individuals in this study exceeded 1 mSv/year above background, while the highest estimated individual dose was 1.32 mSv/year. Few of the public structures surveyed were found to contain slag. A significant fraction of the public roads, however, contained slag: 27% in Pocatello, 23% in Soda Springs, and 20% in Fort Hall.

This paper proposes templates for positive and negative control Toffoli gates for post synthesis optimization of reversible circuits. Templates 1 − 5 can be applied to two adjacent Toffoli gates T 1(C 1,t 1) and T 2(C 2,t 2) where C i is the set of controls, |C 1| = |C 2|, and |t 1| = |t 2|. Templates 6 − 7 can be applied to two different size Toffoli gates T 1(C 1,t 1) and T 2(C 2,t 2) where C i is the set of controls, |C 1| = |C 2| and t i is the target, |t 1| = |t 2|. When applying our templates to circuits generated by the improved shared cube synthesis approach [14] a reduction in quantum cost was achieved for 98 of the 122 circuits. On average a 16.82% reduction in quantum cost was achieved, and in some cases up to 49.60% reduction was obtained.

Trace non-recycling impurities have been injected into Alcator C-Mod [I. H. Hutchinson et al., Phys. Plasmas 1, 1511 (1994)] plasmas in order to determine impurity transport coefficients. Subsequent impurity emission has been observed with spatially scanning x-ray and Vacuum Ultra-Violet (VUV) spectrometer systems. Measured time-resolved brightness profiles of helium- and lithium-like transitions have been compared with those calculated from a transport code which includes impurity diffusion and convection in conjunction with an atomic physics package for individual line emission. During Low-Confinement-Mode (L-mode) plasmas, the transport can be characterized by pure diffusion, with coefficients ∼5000 cm2/s, reflecting the ∼20 ms decay in the x-ray and VUV line brightnesses. During High-Confinement-Modes (H-modes), the impurity confinement times are much longer, and the modelling requires that there be a strong inward convection (of order 1000 cm/s) near the plasma edge, with greatly reduced diffusion (o...

Application of lower hybrid current drive (LHCD) in tokamak plasmas can induce both co- and counter-current directed changes in toroidal rotation, depending on the core magnetic shear, s. For discharges with s > 1, rotation increments in the countercurrent direction are observed. If the LH driven current is sufficient to suppress sawteeth and reduce the central s below unity, the core toroidal rotation change is in the co-current direction. This change in sign of the rotation increment is consistent with a change in sign of the residual stress (the divergence of which constitutes an intrinsic torque that drives the flow) through its dependance on s.

Reversible logic has been proposed as one solution to the problem of ever increasing power consumption. Work in areas such as synthesis techniques in reversible logic is growing, as is work on testing approaches. Numerous fault models have been proposed, but many researchers are still utilising models proposed for traditional logic. We provide an overview of the various fault models and testing approaches for reversible logic, as well as highlighting important results and comparisons/connections between the various models.

This paper presents a new approach for converting a ternary reversible circuit implemented from a truth table into an online testable circuit. Our approach adds three extra lines to the given circuit, inserts Feynman gates and M-S gates, and replaces the ternary Toffoli gates (KP-m gates) with TKP-(m+1) gates. Our approach works with only 2×2 gates and 1×1 gates and covers a higher number of detectable faults. Preliminary work shows fault coverage of 84.89% when the approach is applied to a testable ternary half adder.

Previous work presented a simple technique for converting an ESOP-based Boolean reversible circuit into an online testable circuit. This paper builds on the previous work by extending its application to circuits consisting of cascades of ternary Toffoli gates. The technique is applied to an existing cascade of ternary Toffoli gates, and requires that a single additional line be added to facilitate the propagation of any faults that are identified, as well as modification and/or addition of some gates. The modified circuit can detect online any single-bit errors that occur within the circuit. Experimental results compare very favourably to the only other known approach.

Mobile technology has already had a major impact on the financial industry. With the growing acceptance of mobile transactions, security issues require more attention. The proposed secured architecture for 2-party mobile payments (SA2pMP) was designed to satisfy the four properties of confidentiality, authentication, integrity and non-repudiation that are demanded by any secure system. As an extension following [1] and [2], a PC-based simulation is conducted to evaluate the feasibility of the proposed architecture. This paper introduces the computer based simulation and the feasibility evaluation process. In terms of criteria based on the time delay and the code size, SA2pMP is demonstrated feasible for implementation in Java ME enabled CLDC-1.1 mobile devices.

Using calculations of collisional excitation rates in He-like argon (Ar XVII) and intensity factors and other data for nearby dielectronic satellites, X-ray line spectra have been synthesized as a function of electron temperature and density. The Ar XVII excitation rates were obtained from interpolations of R-matrix calculations, and are likely to be the best available at present. The resulting spectra are compared with spectra observed from high-temperature plasmas in the Alcator C tokamak. The agreement between observed spectra and those calculated using measured values of temperature and density illustrates the accuracy of the calculations, though there are small discrepancies which are likely to be connected with wavelengths or intensity factors for the Ar XVI satellites. Thus, argon X-ray line spectra can serve as a means of diagnosing low-density, astrophysical (in particular solar-flare) plasmas for which there is no independent means of measuring temperatures.

A new approach for online fault detection in Boolean reversible circuits is described. Previous work had described this approach for circuits generated by the basic ESOP-based logic synthesis, and in this work we extend the approach for any type of Toffoli networks. An online testable circuit is created by modifying an existing cascade of Toffoli gates in a simple process that involves changing the existing Toffoli gates as well as the addition of one line and 2p gates, where p is the number of lines in the original circuit.

Reversible logic has the potential to solve the energy efficiency problems that are beginning to create roadblocks in the continued advancement of today's computer systems. Multiple-valued versions of reversible logic can provide even further advantages, but the current literature contains very little work on testability of such designs. This paper details work on designing an online testable block for ternary reversible logic. We build on earlier work that introduced the basic design, and provide some improvements and modifications. This block implements most ternary logic operations and is capable of testing the reversible ternary network in real time (online). The block is built entirely of reversible building blocks, thus the block is itself reversible and so multiple such blocks can be combined to construct complete, testable, ternary reversible circuits.

This paper presents a simple technique to convert an ESOP-based reversible circuit into an online testable circuit. The technique does not require redesigning the whole circuit for integrating the testability feature, and no new garbage outputs are produced other than the garbage outputs needed for the ESOP-circuit. With a little extra hardware cost, the resultant circuit can detect online any single-bit errors. Experimental results show that the proposed technique can achieve an improvement of up to 58% in quantum cost and 99% in garbage outputs in average, compared to the previous work.

This paper describes three techniques for ordering ESOP cubes prior to generation of a Toffoli gate generation. Two of these techniques are from earlier work, while the third is a new approach. The new approach applies rules to manipulate the cubes followed by a reordering process. Our experiments demonstrate that the new approach is much more effective than either of the two previous approaches. We apply template matching as a post-processing step, which results in even further reductions in the number of Toffoli gates.

A revision of an ESOP-based Toffoli gate cascade synthesis technique [1] is presented. The cost metric used previously was replaced with a new cost metric based on autocorrelation coefficients to determine the placements of Toffoli gates. The algorithm remains capable of generating reversible circuits for large functions within reasonable time.

Classification of Boolean functions is a known problem in digital logic. There are far too many possible Boolean functions to examine each one, and so we attempt to classify similar functions together into groups, or classes. This paper continues work that uses the autocorrelation transform to determine a classification technique. Some new considerations are raised and additional analysis of the autocorrelation classes is presented.

The evolution of wireless networks and mobile devices has resulted in increased concerns about performance and security of mobile payment systems. In this paper we propose a new secured architecture for two-party mobile payments, e.g. mobile banking. The proposed architecture employs a lightweight cryptography system that combines public key and symmetric key cryptography systems (ECDSA and AES), as well as a multi-factor authentication mechanism. These are coupled with a transaction log strategy to satisfy the properties of confidentiality, authentication, integrity and non-repudiation. Compared to some existing mobile payment platforms the proposed architecture is a lightweight secured mechanism that is more suitable for two-party banking transactions over resource-limited mobile devices.

The evolution of wireless networks and mobile devices has resulted in increased concerns about performance and security of mobile payment systems. In this paper we propose SA2pMP, a lightweight secured architecture for two-party mobile payments. SA2pMP employs a lightweightcryptography scheme that combines public key and symmetric key cryptography systems (ECDSA and AES), as well as a multi-factor authentication mechanism. These are coupled with a transaction log strategy to satisfy the properties of confidentiality, authentication, integrity and nonrepudiation. We simulate SA2pMP in a context of money transfer banking transaction, on three different emulators:Sun Java Wireless Toolkit 2.5.2 for CLDC emulator, Sony Ericsson SDK 2.5.0.3 Z800 emulator, and Nokia S60 3rd Edition emulator. We also compare SA2pMP to some existing mobile payment platforms. The result of simulation and comparison proves that SA2pMP is a lightweight secured mechanism that is feasible and suitable for two-party mobile payment transactions, e.g. mobile banking, over Java ME enabled, resource-limited mobile devices.

Many systems exist that store and manipulate data; however, many do no have sufficient support for spatial data Many data structures are proposed that are intended specifically for spatial data; however, software implementations have not performed as well as hoped. This work presents a feasibility study investigating the use of a FPGA for the implementation of a structure to support spatial search and retrieval.

Recent work has begun to investigate the advantages of using reversible logic for the design of circuits. The majority of work, however, has limited itself to combinational logic. Researchers are just now beginning to suggest possibilities for sequential implementations. This paper performs a closer analysis of three latch designs proposed in previous work and suggests advantages and disadvantages of each

Many data structures are proposed for managing spatial data. However, they are limited in their software implementations. This paper analyses two hardware implementations of an existing spatial data structure using a FPGA.

An ESOP-based Toffoli gate cascade synthesis algorithm is presented. The algorithm is capable of generating a cascade of reversible gates for logic functions with large numbers of qubits. The algorithm is fast as it uses a simple cost metric heuristic during a recursive divide-and-conquer function to determine NOT and Toffoli gate placement.

Although many researchers are investigating techniques to synthesize reversible combinational logic, there is little work in the area of sequential reversible logic. We present an analysis of a basic memory element, the RS-latch, and a number of possible implementations. We then go on to introduce four reversible flip-flop designs based on the reversible RS-latch implementation.

An implementation of an algorithm for string matching, commonly used in DNA string analysis, using configurable technology is proposed. The design of the circuit allows for pipelining to provide a performance increase. The proposal is unique in that we suggest a design that is specific to certain parameters of the problem, but may be reused for any particular instance of the problem that matches these parameters. The use of a field programmable gate array allows the implementation to be instance specific, thus ensuring maximal usage of the hardware. Analysis and preliminary results based on a prototype implementation are presented.

Classification of Boolean functions is a useful tool; it greatly reduces the 2/sup 2n/ Boolean functions to a much more feasible number. Recent work has suggested the use of the autocorrelation transform to generate coefficients that may be used as a classification tool for Boolean functions. An outstanding question, however, is how to quickly identify whether or not two given functions are in the same class, given that generating the 2/sup n/-sized spectrum may not always be feasible. This work addresses this question, and presents some preliminary heuristics that are analyzed for their suitability in solving this problem.

Detection methods for a class of symmetries called antisymmetries are presented. Work in (J. E. Rice et al., 2002) gives details of these antisymmetries for Boolean logic, while this work extends the concept to multi-valued logic. Preliminary ideas for applications of multi-valued antisymmetries are also discussed.

There are many computationally intensive problems in the area of digital design and logic synthesis. Some of these have no "good" solution; that is, simply by their definition they have exponential run-times. In order to overcome this, we examine the possibility of a configurable hardware solution to speed up one such problem. The computation of the problem is carried out on a Field Programmable Gate Array (FPGA), where the problem is encoded in such a way that within certain parameters, the design of the solution need not be changed for working with a variety of benchmark circuits. This saves considerably on compilation and configuration times. The use of configurable hardware, however, still allows for reconfiguration in situations where the parameters change significantly enough to require an altered approach. We examine two implementations of the problem, which in this case consists of computing the autocorrelation coefficients for a Boolean function.

H-mode experiments on Alcator C-Mod [I.H. Hutchinson, et al., Phys. Plasma 1 (1994) 1511] which exhibit an internal transport barrier (ITB), have been examined with gyrokinetic simulations, near the ITB onset time. Linear simulations support the picture of ion and electron temperature gradient (ITG, ETG) microturbulence driving high {chi}{sub i} and {chi}{sub e}, respectively, and that stable ITG correlates with reduced particle transport and improved ion thermal confinement on C-Mod. In the barrier region ITG is weakly unstable, with a critical temperature gradient higher than expected from standard models. Nonlinear calculations and the role of E x B shear suppression of turbulence outside the plasma core are discussed in light of recent profile measurements for the toroidal velocity. The gyrokinetic model benchmarks successfully against experiment in the plasma core.

Linear simulations of plasma microturbulence are used with recent radial profiles of toroidal velocity from similar plasmas to consider nonlinear microturbulence simulations and observed transport analysis on Alcator C-Mod. We focus on internal transport barrier (ITB) formation in fully equilibrated H-mode plasmas with nearly flat velocity profiles. Velocity profile data, transport analysis and linear growth rates are combined to integrate data and simulation, and explore the effects of toroidal velocity on benchmarking simulations. Areas of interest for future nonlinear simulations are identified. A good gyrokinetic benchmark is found in the plasma core, without extensive nonlinear simulations. RF-heated C-Mod H-mode experiments, which exhibit an ITB, have been studied with the massively parallel code GS2 towards validation of gyrokinetic microturbulence models. New, linear, gyrokinetic calculations are reported and discussed in connection with transport analysis near the ITB trigger time of shot No.1001220016.

Recent H-mode experiments on Alcator C-Mod [I.H. Hutchinson, et al., Phys. Plasmas 1 (1994) 1511] which exhibit an internal transport barrier (ITB), have been examined with flux tube geometry gyrokinetic simulations, using the massively parallel code GS2 [M. Kotschenreuther, G. Rewoldt, and W.M. Tang, Comput. Phys. Commun. 88 (1995) 128]. The simulations support the picture of ion/electron temperature gradient (ITG/ETG) microturbulence driving high xi/ xe and that suppressed ITG causes reduced particle transport and improved ci on C-Mod. Nonlinear calculations for C-Mod confirm initial linear simulations, which predicted ITG stability in the barrier region just before ITB formation, without invoking E x B shear suppression of turbulence. Nonlinear fluxes are compared to experiment, which both show low heat transport in the ITB and higher transport within and outside of the barrier region.