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Tucked up away on the third floor, lies Apartment #5. A quaint little place, which I’ve learned to call home these past two years. Though in these last few months, it’s become my shelter, my hideaw...

This work introduces the fringe RLGC (i.e., resistance, inductance, conductance, and capacitance) models to accurately compute the broadband S parameters for not only large power planes but also thin signal traces in multi-layered package and PCB environments. With comparable accuracy and 100/spl times/ faster than a 3D full-wave field solver, this technique enables ultra-fast design iterations to optimize the layouts for insertion and return losses, resonance frequencies, and placement of decoupling capacitors, etc.

We develop a robust, efficient, and accurate tool, which integrates inductance extraction and simulation, called INDUCTWISE. This paper advances the state-of-the-art inductance extraction and simulation techniques and contains two major parts. In the first part, INDUCTWISE extractor, we discover the recently proposed inductance matrix sparsification algorithm, the K-method[1], albeit its great benefits of efficiency, has a major flaw on the stability. We provide both a counter example and a remedy for it. A window section algorithm is also presented to preserve the accuracy of the sparsification method. The second part, INDUCTWISE simulator, demonstrates great efficiency of integrating the nodal analysis formulation with the improved K-method. Experimental results show that INDUCTWISE has over 250x speedup compared to SPICE3. The proposed sparsification algorithm accelerates the simulator another 175x and speeds up the extractor 23.4x within 0.1% of error. INDUCTWISE can extract and simulate an 118K-conductor RKC circuit within 18 minutes. It has been well tested and released on the web for public usage. (http://vlsi.ece.wisc.edu/Inductwise.htm)

To automatically indicate a bound for the propagated and generated errors due to finite representation of numeric values on a computer using floating point representations, two methods are used, the “normalized method” and the “unnormalized method”. The normalized method uses a normalized representation and an index to indicate the number of significant digits. The unnormalized method retains only the significant digits.This paper reports a micro-implementation of binary significance arithmetic using the normalized method with a new floating point representation. The normalized method is chosen for two reasons: (1) as indicated by Carr [2 ] , a normalized floating point procedure always gives a better result than an unnormalized procedure, and (2) this floating point representation takes advantage of a special property of normalization to afford increased exponent range and to retain potentially an extra binary digit (bit) for values between 0 and 1 as compared against conventional floating point format.