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Sustainable water management is the critical issue in dealing with circular water economy and water scarcity, for further overcoming drought in the future. Industrial cooling tower systems consume about 70% of total fresh water use, especially in semiconductor industries of Taiwan. The development of high energy efficiency technology for cooling water blowdown reclamation can minimize the water and carbon footprint, which is beneficial to the environment and the economy. In this study, resin wafer electro-deionization (RW-EDI), utilizing immobilized conventional ion exchange resin in porous material to enhance ion mobility, was used to demonstrate the desalination of cooling water blowdown from an incineration plant in north Taiwan. With a feed total dissolved solids (TDS) concentration of 900 mg/L, RW-EDI exhibits an excellent performance; more than 99.75% of salts can be removed. The energy consumption was 0.26–0.49 kW · h/m3, with productivity increases from 9.1–15.9 L/(h m2) of the desalination process under various applied voltages. For economic evaluation of the RW-EDI process, the levelized cost of water was from 0.31 to 0.43 USD/m3, where the material costs were far greater than the operational energy cost. Briefly, it can be concluded from the results that the RW-EDI process is a crucial component in the portfolio of water supply options by providing impaired-water reclamation. [ABSTRACT FROM AUTHOR]

In a typical portable multimedia system, external access, which is usually dominated by block-based video content, induces more than half of total system power. Embedded compression (EC) effectively reduces external access caused by video content by reducing the data size. In this paper, an algorithm and a hardware architecture of a new type EC codec engine with multiple modes are presented. Lossless mode, and lossy modes with rate control modes and quality control modes are all supported by single algorithm. The proposed four-tree pipelining scheme can reduce 83% latency and 67% buffer size between transform and entropy coding. The proposed EC codec engine can save 62%, 66%, and 77% external access at lossless mode, half-size mode, and quarter-size mode and can be used in various system power conditions. With TSMC 0.18[micro]m 1P6M CMOS logic process, the proposed EC codec engine can encode or decode CIF 30 frame per second video data and achieve power saving of more than 109 mW. The EC codec engine itself consumes only 2 mW power. Index Terms--Bus encoding, embedded compression, SPIHT, video coding, wavelet.

In this paper, three generic RAM-based architectures are proposed to efficiently construct the corresponding two-dimensional architectures by use of the line-based method for any given hardware architecture of one-dimensional (1-D) wavelet filters, including conventional convolution-based and lifting-based architectures. An exhaustive analysis of two-dimensional architectures for discrete wavelet transform in the system view is also given. The first proposed architecture is for 1-level decomposition, which is presented by introducing the categories of internal line buffers, the strategy of optimizing the line buffer size, and the method of integrating any 1-D wavelet filter. The other two proposed architectures are for multi-level decomposition. One applies the recursive pyramid algorithm directly to the proposed 1-level architecture, and the other one combines the two previously proposed architectures to increase the hardware utilization. According to the comparison results, the proposed architecture outperforms previous architectures in the aspects of line buffer size, hardware cost, hardware utilization, and flexibility. Index Terms--Discrete wavelet transform (DWT), lifting scheme, line-based method, recursive pyramid algorithm, VLSI architecture.