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Abstract Efficiently solving combinatorial optimization problems (COPs) such as Max‐Cut is challenging because the resources required increase exponentially with the problem size. This study proposes a hardware‐friendly method for solving the Max‐Cut problem by implementing a spiking neural network (SNN)‐based Boltzmann machine (BM) in neuromorphic hardware systems. To implement the hardware‐oriented version of the spiking Boltzmann machine (sBM), the stochastic dynamics of leaky integrate‐and‐fire (LIF) neurons with random walk noise are analyzed, and an innovative algorithm based on overlapping time windows is proposed. The simulation results demonstrate the effective convergence and high accuracy of the proposed method for large‐scale Max‐Cut problems. The proposed method is validated through successful hardware implementation on a 6‐transistor/2‐resistor (6T2R) neuromorphic chip with phase change memory (PCM) synapses. In addition, as an expansion of the algorithm, several annealing techniques and bias split methods are proposed to improve convergence, along with circuit design ideas for efficient evaluation of sampling convergence using cell arrays and spiking systems. Overall, the results of the proposed methods demonstrate the potential of energy‐efficient and hardware‐implementable approaches using SNNs to solve COPs. To the best of the author's knowledge, this is the first study to solve the Max‐Cut problem using an SNN neuromorphic hardware chip.

Abstract Charge storage synaptic circuits employing InGaZnO thin‐film transistors (IGZO TFTs) and capacitors are a promising candidate for on‐chip trainable neural network hardware accelerators. However, IGZO TFTs often exhibit bias instability. For synaptic memory applications, the programming transistors are predominantly exposed to asymmetric off‐state biases, and a unique field‐dependent on‐current reduction under off‐scenario is observed which may result in programming current variation. Further examination of the phenomenon is conducted with transmission line‐like method and degradation recovery tests, and current reduction can be attributed to contact resistance increase by charge trapping in the source and drain electrode and the channel region. The current decrease is subsequently formulated with a stretched exponential model with bias‐dependent parameters for quantitative circuit analysis under off‐state degradation. A neural network hardware acceleration simulator is utilized to assess the complicated impact the off‐state current degradation could instigate on on‐chip trainable IGZO TFT‐based synapse arrays. The simulation results generally demonstrate deteriorated training accuracy with aggravated off‐state instability, and the accuracy trend is elucidated from the perspective of weight symmetry point.

Category: Ankle; Sports Introduction/Purpose: Acute ankle ligament rupture is usually treated conservatively. However, it sometimes progresses to chronic ankle instability. We suspected that there is a tendency for calcaneal-side calcaneofibular ligament (CFL) ruptures to progress to chronic ankle instability. Methods: Fourteen athletes with calcaneal-side CFL ruptures who were treated conservatively and followed for a mean period of 35.2 months were included in the study. Proximal migration of the stump of CFL (mm) was evaluated using magnetic resonance imaging at a 45° oblique coronal plane. A Stener lesion was defined as severe migration outside the peroneal tendon. The results of manual anterior drawer, varus stress tests, and stress radiographs at the initial and final follow-up visits were compared. The time to return to running, team training, and sporting competitions were recorded. At the final follow-up, patient satisfaction and Cumberland Ankle Instability Tool (CAIT) were used to assess ankle function. Results: The mean proximal migration of CFL was 11.2 mm. Four Stener lesions were found. However, neither proximal migration nor Stener lesions were significantly related to CAIT scores (rho = 0.288 and rho = 0.082, respectively) instability significantly decreased after conservative treatment from a mean grade of 2.0 to 1.4 in the anterior drawer test (P = 0.032). The varus stress test results showed a decrease from grade 2.2 to 1.8 (P = 0.053) without significance. Radiologically, decreases in anterior translation from 6.1 mm to 5.4 mm (P = 0.205) and talar tilt angles from 7.2° to 6.5° (P = 0.500) were observed without significance. It took 12.2, 14.7, and 18.0 weeks to return to running, team training, and sporting competitions. Seven athletes (50%) reported unsatisfactory results. Conclusion: Conservative treatment for CFL rupture with proximal migration was associated with poor outcomes in athletes.

Category: Ankle; Sports Introduction/Purpose: A lateral ankle sprain is one of the most common musculoskeletal injuries for both athletes and non- athletes, causing chronic ankle instability. Talar tilt angle on a radiograph used for diagnosis of chronic ankle instability(CAI), however, there were no reports of instability of calcaneofibular ligament(CFL) itself through an MRI. This study aimed to determine whether measuring tortuosity angles of CFL through oblique coronal imaging of MRI in CAI. We compared CFL’s tortuosity angle with the talar tilt angle, Cumberland ankle instability tool(CAIT), and ankle strength in patients without a history of ankle sprain or not. Methods: From March 2020 to May 2022, Of the total 120 cases, the CAI group (82 patients) took CFL’s tortuosity angle in MRI and talar tilt angle inradiograph. The control group (38 patients) included those without an ankle sprain who visited this hospital due to an Achilles tendon rupture. In the control group, the talar tilt angle could not be achieved due to pain. Results: CFL’s tortuosity angle in MRI showed a significant difference of 76.5 ± 18.3º in the CAI group and 31.9 ± 5.4º in the control group(P < 0.001). The diagnostic cutoff value for CAI was more than 40º of the tortuosity angle. According to the measure of the isokinetic machine(Biodex), the CAI group shows a 22.8% deficit of the eversion strength. The tortuosity angle, talar tilt angle, and manual stress test show significantly different between both groups. However, CAIT and strength defect showed no significant results between both groups. Conclusion: CFL’s tortuosity angle through oblique coronary imaging of MRI, it’s average value was 31º degrees, and we can diagnose as CAI if CFL’s tortuosity angle is more than 40º.

Abstract Analog in‐memory computing synaptic devices are widely studied for efficient implementation of deep learning. However, synaptic devices based on resistive memory have difficulties implementing on‐chip training due to the lack of means to control the amount of resistance change and large device variations. To overcome these shortcomings, silicon complementary metal‐oxide semiconductor (Si‐CMOS) and capacitor‐based charge storage synapses are proposed, but it is difficult to obtain sufficient retention time due to Si‐CMOS leakage currents, resulting in a deterioration of training accuracy. Here, a novel 6T1C synaptic device using only n‐type indium gaIlium zinc oxide thin film transistor (IGZO TFT) with low leakage current and a capacitor is proposed, allowing not only linear and symmetric weight update but also sufficient retention time and parallel on‐chip training operations. In addition, an efficient and realistic training algorithm to compensate for any remaining device non‐idealities such as drifting references and long‐term retention loss is proposed, demonstrating the importance of device‐algorithm co‐optimization.

Conventional filamentary memristors are limited in dynamics by the high electric-field dependence of the conductive filament. Here, Jeong et al. presents a method which creates a cluster-type memristor, enabling large conductance range and long data retention.

Mitigating the nonlinear weight update of synaptic devices is one of the main challenges in designing compute-in-memory (CIM) crossbar arrays for artificial neural networks (ANNs). While various nonlinearity mitigation schemes have been proposed so far, only a few of them have dealt with high-weight update nonlinearity. This article presents a hardware-efficient on-chip weight update scheme named the conditional reverse update scheme (CRUS), which algorithmically mitigates highly nonlinear weight change in synaptic devices. For hardware efficiency, CRUS is implemented on-chip using low precision (1-bit) and infrequent circuit operations. To utilize algorithmic insights, the impact of the nonlinear weight update on training is investigated. We first introduce a metric called update noise (UN), which quantifies the deviation of the actual weight update in synaptic devices from the expected weight update calculated from the stochastic gradient descent (SGD) algorithm. Based on UN analysis, we aim to reduce AUN, the UN average over the entire training process. The key principle to reducing average UN (AUN) is to conditionally skip long-term depression (LTD) pulses during training. The trends of AUN and accuracy under various LTD skip conditions are investigated to find maximum accuracy conditions. By properly tuning LTD skip conditions, CRUS achieves >90% accuracy on the Modified National Institute of Standards and Technology (MNIST) dataset even under high-weight update nonlinearity. Furthermore, it shows better accuracy than previous nonlinearity mitigation techniques under similar hardware conditions. It also exhibits robustness to cycle-to-cycle variations (CCVs) in conductance updates. The results suggest that CRUS can be an effective solution to relieve the algorithm-hardware tradeoff in CIM crossbar array design.

A fully silicon‐integrated restricted Boltzmann machine (RBM) with an event‐driven contrastive divergence (eCD) training algorithm is implemented using novel stochastic leaky integrate‐and‐fire (LIF) neuron circuits and six‐transistor/2‐PCM‐resistor (6T2R) synaptic unit cells on 90 nm CMOS technology. To elaborate, designed a bidirectional, asynchronous, and parallel pulse‐signaling scheme over an analog‐weighted phase‐change memory (PCM) synapse array to enable spike‐timing‐dependent plasticity (STDP) as a local weight update rule based on eCD is designed. Building upon the initial version of this work, significantly more experimental details are added, such as the on‐chip characterization results of LIF and backward‐LIF (BLIF) and stochasticity of our random walk circuitry. The experimental characterization of these on‐chip stochastic neuron circuits shows a reasonable symmetricity between LIF and BLIF as well as the necessary stochasticity for spiking RBM operation. Fully hardware‐based image classification recorded 93% on‐chip training accuracy from 100 handwritten MNIST digit images. In addition, we experimentally demonstrated the generative characteristics of the RBM by reconstructing partial patterns on hardware. As each synapse and neuron execute its computations in an asynchronous and fully parallel fashion, the chip can perform data‐intensive machine learning (ML) tasks in a power‐efficient manner and take advantage of the sparseness of spiking.

Abstract Organic neuromorphic computing/sensing platforms are a promising concept for local monitoring and processing of biological signals in real time. Neuromorphic devices and sensors with low conductance for low power consumption and high conductance for low‐impedance sensing are desired. However, it has been a struggle to find materials and fabrication methods that satisfy both of these properties simultaneously in a single substrate. Here, nanofiber channels with a self‐formed ion‐blocking layer are fabricated to create organic electrochemical transistors (OECTs) that can be tailored to achieve low‐power neuromorphic computing and fast‐response sensing by transferring different amounts of electrospun nanofibers to each device. With their nanofiber architecture, the OECTs exhibit a low switching energy of 113 fJ and operate within a wide bandwidth (cut‐off frequency of 13.5 kHz), opening a new paradigm for energy‐efficient neuromorphic computing/sensing platforms in a biological environment without the leakage of personal information.

Dense crossbar arrays of non-volatile memory (NVM) devices represent one possible path for implementing massively-parallel and highly energy-efficient neuromorphic computing systems. We first review recent advances in the application of NVM devices to three computing paradigms: spiking neural networks (SNNs), deep neural networks (DNNs), and ‘Memcomputing’. In SNNs, NVM synaptic connections are updated by a local learning rule such as spike-timing-dependent-plasticity, a computational approach directly inspired by biology. For DNNs, NVM arrays can represent matrices of synaptic weights, implementing the matrix–vector multiplication needed for algorithms such as backpropagation in an analog yet massively-parallel fashion. This approach could provide significant improvements in power and speed compared to GPU-based DNN training, for applications of commercial significance. We then survey recent research in which different types of NVM devices – including phase change memory, conductive-bridging RAM, filamentary and non-filamentary RRAM, and other NVMs – have been proposed, either as a synapse or as a neuron, for use within a neuromorphic computing application. The relevant virtues and limitations of these devices are assessed, in terms of properties such as conductance dynamic range, (non)linearity and (a)symmetry of conductance response, retention, endurance, required switching power, and device variability.

As construction projects become larger and more diversified, various factors such as time, cost, quality, environment, and safety that need to be considered make it very difficult to make the final decision. This study was conducted to develop an integrated Multi-Objective Optimization (iMOO) model that provides the optimal solution set based on the concept of the Pareto front, through the following six steps: (1) problem statement; (2) definition of the optimization objectives; (3) establishment of the data structure; (4) standardization of the optimization objectives; (5) definition of the fitness function; and (6) introduction of the genetic algorithm. To evaluate the robustness and reliability of the proposed iMOO model, a case study on the construction time-cost trade-off problem was analyzed in terms of effectiveness and efficiency. The results of this study can be used: (1) to assess more than two optimization objectives, such as the initial investment cost, operation and maintenance cost, and CO2 emission trading cost; (2) to take advantage of the weights as the real meanings; (3) to evaluate the four types of fitness functions; and (4) to expand into other areas such as the indoor air quality, materials, and energy use.

A novel phase-change memory cell is shown by using a low-temperature in situ doped single crystalline germanium nanowire diode as a bottom electrode as well as memory-cell selection device. The heterojunction formed between in situ doped Ge nanowires and Si substrate has provided 100 * isolation for crosspoint-memory operation.

Recent breakthroughs in deep learning have spurred interest in novel computing architectures that can accelerate machine learning algorithms. Neuromorphic computing utilizing fully parallel operation enabled by an array of resistive elements is being actively explored to implement power- and area-efficient machine learning accelerators. To successfully develop a neuromorphic processor, it is crucial to co-optimize the device, circuit, architecture, and algorithm. In this regard, this article introduces a fully integrated neuromorphic processor using phase change memory as a synaptic device that implements a fully asynchronous and parallel operation of a spiking neural network running a restricted Boltzmann machine as a learning algorithm. [ABSTRACT FROM AUTHOR]

The stability of high-permittivity (high-k) Ti[O.sub.2] films incorporated in metal-oxide-silicon capacitor structures with a TiN metal gate electrode is described, which is focused on oxygen migration. The studies have shown that bottom Hf[O.sub.2]/[Si.sub.3][N.sub.4] interlayers have served as more effective oxygen barriers, reducing oxygen downdiffusion.

Recent advances in neuroscience together with nanoscale electronic device technology have resulted in huge interests in realizing brain-like computing hardwares using emerging nanoscale memory devices as synaptic elements. Although there has been experimental work that demonstrated the operation of nanoscale synaptic element at the single device level, network level studies have been limited to simulations. In this work, we demonstrate, using experiments, array level associative learning using phase change synaptic devices connected in a grid like configuration similar to the organization of the biological brain. Implementing Hebbian learning with phase change memory cells, the synaptic grid was able to store presented patterns and recall missing patterns in an associative brain-like fashion. We found that the system is robust to device variations, and large variations in cell resistance states can be accommodated by increasing the number of training epochs. We illustrated the tradeoff between variation tolerance of the network and the overall energy consumption, and found that energy consumption is decreased significantly for lower variation tolerance. [ABSTRACT FROM AUTHOR]

We analyze constant-voltage isotropic and non-isotropic scaling issues for phase change memory (PCM) based on. electrothermal physics. Various analytical and simulation models of general and typical PCM cells that support the analysis is also provided. The analysis shows that the maximum temperature in the PCM cell, which is a key parameter for PCM operation, is independent of geometrical sizes and depends only on the voltage and material properties. This leads to the minimum programming voltage concept, which is determined by material properties of the phase change material. [ABSTRACT FROM AUTHOR]

A fair scheduling algorithm is proposed to improve the system throughput while maintaining the fairness in the downlink of a code-division multiple access (CDMA) system employing AMC and multicodes. R. Kwan and C. Leung suggested an optimal scheduling to maximize the total throughput based on simultaneous transmissions strategy. In this letter, we extend the optimal scheduling so that some degree of fairness can be maintained. We formulate a mixed-integer nonlinear programming problem to assign the radio resources such as the transmit power and codes to several users effectively. The result shows that the proposed algorithm provides a significant throughput gain over PF scheduling with one-by-one transmission at the same level of fairness [ABSTRACT FROM PUBLISHER]