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High Brightness Light Emitting Diode's (HB-LED's) have received considerable attention during the last few years due to their utilization in numerous consumer products (automotive, displays, etc.). Recently, one of the largest emerging markets for HB-LED's is the lighting industry because of its lower power requirements and longer lifetime. One of the key limitations for its universal consumer adoption is its higher cost. If the cost for production of an HB-LED is broken up into materials and process steps the price of the sapphire substrate is noticed to be significantly higher than all the individual process and material steps. In such a circumstance the key to making HB-LED's cheaper is by substrate engineering. Another aspect of the cost is the fact that the traditional sapphire substrates are usually 2 or 4 inches. Therefore, a logical step forward is to move to bigger substrates where yield can be higher. To make this a reality different groups have been working on alternative cheaper and larger substrates (Si/Glass). However, before any technology becomes mature numerous reliability and yield issues need to be fixed. As part of process optimization identifying killer defects is critical. In order to do so we use the Candela platform from KLA Tencor to monitor our epitaxial process. Since, silicon wafers are one of the most common substrates available it obviously emerged as a first choice. We at IMEC have developed a GaN on Si process for making HB-LED's on 200mm Si (111) substrates. The control of the first epitaxial layers on Si is the key to a successful HB-LED fabrication. Lattice mismatch and thermal coefficient mismatch often lead to wafer bow and defect propagation to the p-GaN surface which can be detrimental to the IQE (Internal Quantum Efficiency). The goal of this work is to understand the different types of defect and the nature of their origin on a typical HB LED stack as well as the detection capability of the tool. Typical defects detected are the cracks/hexagonal defects/pits and particles. Defect data will be analyzed in terms of compressive or tensile stress in the film. This paper focuses on un-optimized EPI wafers in terms of stress/defectivity and crystalline quality to help define the correct inspection thresholds. [ABSTRACT FROM PUBLISHER]

This paper investigates the wafer bow induced during the substrate transfer process for GaN LED on Si (111) 8 inch wafers. The substrate transfer process is to transfer the thin GaN LED device layer to a carrier wafer using a CuSnCu permanent bonding layer. The process generates tensile bow on a wafer due to the high tensile stress of the Cu or the CuxSny intermetallic layer after bonding. Understanding the wafer bow evolution during the substrate transfer is very important to get a good control of the process. The high wafer bow value may cause problems for some automatic handling tools in the production line or affect process quality such as in lithography. The influence of substrate thickness and Cu metallization thickness on the wafer bow has been studied. A bow compensation layer can be used to compensate the tensile bow, thus minimizing the wafer bow after the substrate transfer process. [ABSTRACT FROM PUBLISHER]