1. The gem5 Simulator: Version 20.0+
- Author
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Lowe-Power, Jason, Ahmad, Abdul, Armejach, Adria, Herrera, Adrian, Roelke, Alec, Farmahini-Farahani, Amin, Mondelli, Andrea, Hansson, Andreas, Sandberg, Andreas, Gutierrez, Anthony, Harris, Austin, Akram, Ayaz, Hanindhito, Bagus, Pham, Binh, Bruce, Bobby, Shingarov, Boris, Beckmann, Brad, Escuin, Carlos, Menard, Christian, Weis, Christian, Rodrigues Carvalho, Daniel, Wood, David, Gope, Dibakar, Zulian, Éder, Black, Gabe, Bloom, Gedare, Travaglini, Giacomo, Khaleghzadeh, Hamidreza, Jang, Hanhwi, Nguyen, Hoa, Yoon, Hongil, Vougioukas, Ilias, Setoain, Javier, Gandhi, Jayneel, Castrillon, Jeronimo, Nathella, Krishnendra, Olson, Lena, Chen, Lizhong, Samani, Mahyar, Orr, Marc, Fariborz, Marjan, Andreozzi, Matteo, Sinclair, Matthew, Horsnell, Matthew, Jung, Matthias, Upton, Michael, Moreto, Miquel, Alian, Mohammad, Derumigny, Nicolas, Nikoleris, Nikos, Vaish, Nilay, Asmussen, Nils, Wehn, Norbert, Naji, Omar, Prieto, Pablo, Fotouhi, Pouya, Jagtap, Radhika, Thakur, Rahul, Jafri, Raza, Jeyapaul, Reiley, Amslinger, Rico, Gambord, Ryan, Bharadwaj, Srikant, Diestelhorst, Stephan, Kannoth, Subash, Haria, Swapnil, Ali, Syed, Grass, Thomas, Mück, Tiago, Hayes, Timothy, Jones, Timothy, Marinelli, Tommaso, Reddy, Trivikram, Ta, Tuan, Krishna, Tushar, Elsasser, Wendy, Wang, William, Kodama, Yuetsu, Wang, Zhengrong, University of California [Davis] (UC Davis), University of California (UC), University of Kaiserslautern [Kaiserslautern], Barcelona Supercomputing Center - Centro Nacional de Supercomputacion (BSC - CNS), University of Virginia, ARM Ltd [Cambridge] (ARM), Western Michigan University [Kalamazoo], Institut Teknologi Bandung (ITB), Institute of Materials Science, Vietnam Academy of Science and Technology, Department of Computer Science [Univ California Davis] (CS - UC Davis), University of California (UC)-University of California (UC), Technische Universität Dresden = Dresden University of Technology (TU Dresden), Technische Universität Kaiserslautern (TU Kaiserslautern), Inria Rennes – Bretagne Atlantique, Institut National de Recherche en Informatique et en Automatique (Inria), Pushing Architecture and Compilation for Application Performance (PACAP), Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-ARCHITECTURE (IRISA-D3), Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA), Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-Institut National de Recherche en Informatique et en Automatique (Inria)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-IMT Atlantique (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT)-Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT)-Institut de Recherche en Informatique et Systèmes Aléatoires (IRISA), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-IMT Atlantique (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT), Fraunhofer Institute for Experimental Software Engineering (Fraunhofer IESE), Fraunhofer (Fraunhofer-Gesellschaft), University of Illinois at Urbana-Champaign [Urbana], University of Illinois System, Uppsala University, Rheinisch-Westfälische Technische Hochschule Aachen University (RWTH), Georgia Institute of Technology [Atlanta], Rodrigues Carvalho, Daniel, University of California, University of Virginia [Charlottesville], Bandung Institute of Technology [Indonesia], Department of Computer Science [Davis] (UC Davis), University of California-University of California, Université de Rennes 1 (UR1), Université de Rennes (UNIV-RENNES)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-Institut National de Recherche en Informatique et en Automatique (Inria)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-Institut Mines-Télécom [Paris] (IMT)-Université de Rennes 1 (UR1), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-Université de Bretagne Sud (UBS)-École normale supérieure - Rennes (ENS Rennes)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), and RWTH Aachen University
- Subjects
[INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR] ,[INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR] ,[INFO.INFO-MO] Computer Science [cs]/Modeling and Simulation ,[INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation - Abstract
The open-source and community-supported gem5 simulator is one of the most popular tools for computer architecture research. This simulation infrastructure allows researchers to model modern computer hardware at the cycle level, and it has enough fidelity to boot unmodified Linux-based operating systems and run full applications for multiple architectures including x86, Arm®, and RISC-V. The gem5 simulator has been under active development over the last nine years since the original gem5 release. In this time, there have been over 7000 commits to the codebase from over 250 unique contributors which have improved the simulator by adding new features, fixing bugs, and increasing the code quality. In this paper, we give an overview of gem5's usage and features, describe the current state of the gem5 simulator, and enumerate the major changes since the initial release of gem5. We also discuss how the gem5 simulator has transitioned to a formal governance model to enable continued improvement and community support for the next 20 years of computer architecture research.
- Published
- 2021