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The article presents the Martini designed as a network interface controller chip in which communication functions are implemented by hardwired logic. Martini provides maximum bandwidth and minimum latency communication.

To cope with the capacity increase and diversification of information services, enhancing efficiency, flexibility, and agility in optical transport networks is becoming increasingly important. Quick reconfiguration of the optical physical layer, such as changing optical node architectures or optical physical network topologies, provides additional adaptability to requirement or environment changes. This paper proposes a new topology description scheme to support optical physical layer resource management at the granularity of optical functionality blocks in a machine-processible manner. The proposed scheme specifies intra-node structures as well as inter-node fiber connections (links). Furthermore, different switching functionalities of individual optical components are specified in a common format using integer linear programming (ILP) formulas. The ILP formulas are described in a machine-readable GNU MathProg modeling language so as to be directly introduced to the path computation mechanisms. Based on the proposed topology description scheme, a path computation engine named PathFinder is prototyped and demonstrated for optical networks consisting of various optical components with different switching functionalities. The computational feasibility of PathFinder is evaluated through numerical experiments in terms of elapsed time for path computation and the proposed scheme is successful while retaining reasonable time ranges. Operating topology and node architecture changes based on the proposed scheme are also successfully demonstrated over a multi-granular hierarchical optical network testbed with real hardware. [ABSTRACT FROM AUTHOR]

Programmable networks are a substantial part of current R&D on future internet (FI) in Europe and worldwide, with considerable impact generated by large-scale test bed infrastructures. In such test beds, researchers validate proof-of-concept prototypes for new algorithms and mechanisms for efficiently controlling and managing network resources. One of the key domains for FI research is software-defined networking (SDN), which creates innovations in existing Internet architectures by shifting the control and logic outside the network equipment to Data Centres. International cooperation among leading research centres in Europe, Americas and Asia is key to validate SDN foundations and tools. EU and Japan have jointly funded the FELIX project (federated test-beds for large-scale infrastructure experiments), which defines a common control and orchestration framework to manage federated FI test beds across continents. This framework enables an experimenter to (i) request and obtain resources across different test bed infrastructures dynamically; (ii) manage and control the network paths connecting the federated SDN test beds; (iii) monitor the underlying resources and (iv) use distributed applications executed on the federated infrastructures. This paper describes the high-level architecture of the FELIX framework and details six use cases that will be employed for validation. We present our analysis and end-user considerations, highlighting the necessity for resource accessibility and coherent use of physical connections over a large-scale test bed where different control technologies such as OpenFlow and the network service interface (NSI) are simultaneously used. [ABSTRACT FROM AUTHOR]

A novel method for estimating energy consumption of networks at the national scale is presented. Accurate estimations of network energy consumption are increasingly important because of continuously increasing network traffic and the need to assess emerging energy technologies to achieve overall energy efficiency. However, direct estimations are not practical because of the complex, widely diverse, and undisclosed configurations of actual networks. The impact of each network's energy overhead, which is the energy consumed above that required to accommodate network traffic, on the energy consumption associated with these complex configurations must be inferred. In the proposed method, the energy overhead is quantitatively evaluated and introduced as overhead factors by comparing the energy consumption estimated from network configuration models (bottom-up methods) with reports of actual energy consumption (top-down methods). This proposed “unified” method is capable of long-term predictions of future technology trends, including network architecture changes. In this paper, we consider different overhead factors that serve as fitting parameters for different network areas, and demonstrate the procedure for determining each of these parameters through an estimation of the fixed broadband Internet in Japan. This unified method consistently estimates the long-term evolution of energy consumption from 2000 to 2030. [ABSTRACT FROM PUBLISHER]

Cloud computing is now considered to be a new computing paradigm to provide scalable Infrastructure, Platform and Software as a Service via the Internet. While, the diffusion of Cloud computing is expected to cause an explosive increase in power consumption for IT resources in data centers. Virtual Machine(VM)-based flexible capacity management is an effective scheme to reduce total power consumption in the data centers. However, there remain the following issues, trade-off between power-saving and user experience, decision on VM packing plans within a feasible calculation time, and collision avoidance for multiple VM live migration processes. In order to resolve these issues, we propose two VM packing algorithms, a matching-based (MBA) and a greedy-type heuristic (GREEDY). MBA enables to decide an optimal plan in polynomial time, while GREEDY is an aggressive packing approach faster than MBA. We investigate the basic performance and the feasibility of proposed algorithms under both artificial and realistic simulation scenarios, respectively. The basic performance experiments show that the algorithms reduce total power consumption by between 18% and 50%, and MBA makes suitable VM packing plans within a feasible calculation time. The feasibility experiments employ two power consumption models, one is the linear model and the other is piecewise linear model. In the linear model, the feasibility experiments show that the reduction ratio of total power consumption observed with MBA is smaller than that of GREEDY, but the performance degradation of MBA is less than that of GREEDY. In the piecewise-linear model, the feasibility experiments show that MBA investigates more reducing power consumption than GREEDY. The performance degradation of MBA is also less than GREEDY. [ABSTRACT FROM AUTHOR]

For mission critical jobs in distributed computing, a network with a low packet loss rate and no failures is required. The multiple paths method has been studied as a means to achieve dependable communication with tolerable failures. It recovers from failures on a network using the same packet on another path. Since the speed of a long-distance network becomes faster, dependable communication that tolerates network latency becomes more important. We built a prototype system of a multiple paths method supporting Gigabit Ethernet speed using GtrcNET-1, a gigabit network testbed. We evaluated it and confirmed that it can continuously communicate even if a path fails, and it achieved a packet loss rate as low as the product of packet loss rates on both paths. © 2007 Wiley Periodicals, Inc. Syst Comp Jpn, 38(12): 46–54, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/scj.20807 [ABSTRACT FROM AUTHOR]

We developed the RHiNET-2/SW high-speed network switch for a high-throughput parallel computing system consisting of optically interconnected distributed personal computers (PCs). RHiNET-2/SW enables high-throughput network switching (64 Gbit/s) by means of a switching LSI and eight pairs of synchronized parallel optical interconnection modules. To confirm the reliability of RHiNET-2/SW, we measured its bit error rate (BER), which was less than 10-11 (estimated value: 10-20). Five RHiNET-2/SWs and sixteen PC nodes can perform parallel computing. This result demonstrates the feasibility of optical interconnection in a high-speed, flexible network in a parallel computing system. © 2002 Wiley Periodicals, Inc. Electron Comm Jpn Pt 2, 85(6): 1–10, 2002; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjb.10022 [ABSTRACT FROM AUTHOR]

The authors have developed a communications architecture called RHiNET that is capable of high-performance parallel processing by interconnecting PCs and WSs. RHiNET uses not only computers concentrated in one place but also computers used for daily business within buildings and within floors for parallel processing. Networks used by RHiNET should have high effective bandwidths and small latencies for high-efficiency computing, as well as link lengths for connecting the computers within buildings and floors and a free topology. The former requirements are not satisfied sufficiently by the conventional LANs, while the latter is not satisfied by SANs which are used in cluster systems. RHiNET satisfies both conditions by using a switch having a large memory capacity. In this paper, the architecture and implementation of the RHiNET/SW1 switch used by RHiNET networks are discussed. A scheme called virtual cache is used in RHiNET/SW1 such that a large-capacity packet buffer is installed by SRAM outside the switch ASIC. In addition, the performance of the switch is evaluated by a simulator. © 2001 Scripta Technica, Syst Comp Jpn, 32(14): 24–33, 2001 [ABSTRACT FROM AUTHOR]

LOGIQUE (LOGIc simulation with QUEry) is a parallel logic simulation algorithm for parallel machines with a shared memory. In order to make the best use of the parallelism, queries are issued aggressively. The large overhead in the traditional query-based parallel discrete event simulation (PDES) algorithm is reduced by replacing the query message with a reference to the shared variables. LOGIQUE has been implemented on a multiprocessor and used to simulate logic circuits. The results, which demonstrate the efficiency of LOGIQUE, are presented. [ABSTRACT FROM AUTHOR]

This paper proposes a concurrent description language called NCC for scientific calculations that are executed on a multiprocessor. NCC is based on a static concurrent process model called "NC model." NCC's minimal features allow scientific calculations to be efficiently executed on a large- scale multiprocessor. Having obtained less overhead in execution by restricting NCC's ability to describe concurrent processes, NCC allows users to write scientific calculation programs which are both highly easy to analyze and read. [ABSTRACT FROM AUTHOR]

Ethernet has been used for connecting hosts in PC clusters, besides its use in local area networks. Although a layer-2 Ethernet topology is limited to a tree structure because of the need to avoid broadcast storms and deadlocks of frames, various deadlock-free routing algorithms on topologies that include loops suitable for parallel processing can be employed by the application of IEEE 802.1Q VLAN technology. However, the MPI communication libraries used in current PC clusters do not always support tagged VLAN technology; therefore, at present, the design of VLAN-based Ethernet cannot be applied to such PC clusters. In this study, we propose a switch-tagged routing methodology in order to implement various deadlock-free routing algorithms on such PC clusters by using at most the same number of VLANs as the degree of a switch. Since the MPI communication libraries do not need to perform VLAN operations, the proposed methodology has advantages in both simple host configuration and high portability. In addition, when it is used with on/off and multispeed link regulation, the power consumption of Ethernet switches can be reduced. Evaluation results using NAS parallel benchmarks showed that the performance of the topologies that include loops using the proposed methodology was comparable to that of an ideal one-switch (full crossbar) network, and the torus topology in particular had up to a 27 percent performance improvement compared with a tree topology with link aggregation. [ABSTRACT FROM AUTHOR]

Spinach (Spinacia oleracea L.) is a dioecious plant with male heterogametic sex determination and homomorphic sex chromosomes (XY). The dioecism is utilized for producing commercial hybrid seeds, and hence understanding the molecular-genetic basis of the species' sex determining locus is an important issue for spinach breeding. In this study, seven dominant DNA markers were shown to completely co-segregate with the male-determining gene in segregating spinach populations comprising > 1500 plants. In addition, these seven dominant DNA markers were completely associated with the male-determining gene in over 100 spinach germplasm accessions and cultivars. These observations suggest that, in spinach, a Y-chromosomal region around the male-determining locus does not (or almost not) recombine with a counterpart region on the X chromosome. Using five of the seven DNA markers, five bacterial artificial chromosome (BAC) clone contigs with a total length of approximately 690 kbp were constructed. Full sequencing of six representative BAC clones (total insert length 504 kbp) from the five contigs and a transcriptome analysis by RNA-seq revealed that the Y-chromosomal region around the male-determining locus contains large amounts of repetitive elements, suggesting that the region might be poor in gene content. Most of the repeats found in this region are novel Ty1-copia-like and its derivative elements that accumulate predominantly in heterochromatic regions. Our findings may provide valuable insight into spinach genome structure and clues for future research into the evolution of the sex determining locus.