1,411 results on '"Benini, Luca"'
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2. ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation
3. M100 ExaData: a data collection campaign on the CINECA’s Marconi100 Tier-0 supercomputer
4. In-memory factorization of holographic perceptual representations
5. A neuro-vector-symbolic architecture for solving Raven’s progressive matrices
6. Directly-trained Spiking Neural Networks for Deep Reinforcement Learning: Energy efficient implementation of event-based obstacle avoidance on a neuromorphic accelerator
7. 7 [formula omitted]J/inference end-to-end gesture recognition from dynamic vision sensor data using ternarized hybrid convolutional neural networks
8. RedMule: A mixed-precision matrix–matrix operation engine for flexible and energy-efficient on-chip linear algebra and TinyML training acceleration
9. Reduced precision floating-point optimization for Deep Neural Network On-Device Learning on microcontrollers
10. RUAD: Unsupervised anomaly detection in HPC systems
11. Model-based design for self-sustainable sensor nodes
12. Proposal of a strategic model to unlock the circular potential in industrial practice
13. DiG: enabling out-of-band scalable high-resolution monitoring for data-center analytics, automation and control (extended)
14. PULP-NN : accelerating quantized neural networks on parallel ultra-low-power RISC-V processors
15. Efficient image dataset classification difficulty estimation for predicting deep-learning accuracy
16. Performance-aware predictive-model-based on-chip body-bias regulation strategy for an ULP multi-core cluster in 28 nm UTBB FD-SOI
17. A wearable biosensing system with in-sensor adaptive machine learning for hand gesture recognition
18. Near-channel classifier: symbiotic communication and classification in high-dimensional space
19. The relevance of rock shape over mass—implications for rockfall hazard assessments
20. Robust high-dimensional memory-augmented neural networks
21. In-memory hyperdimensional computing
22. A semisupervised autoencoder-based approach for anomaly detection in high performance computing systems
23. Combining PREM compilation and static scheduling for high-performance and predictable MPSoC execution
24. The ANTAREX domain specific language for high performance computing
25. A sensor fusion approach for drowsiness detection in wearable ultra-low-power systems
26. Long-short range communication network leveraging LoRa™ and wake-up receiver
27. StreamDrive: a Dynamic Dataflow Framework for Clustered Embedded Architectures
28. Extending the Lifetime of Nano-Blimps via Dynamic Motor Control
29. Hardware Transactional Memory Exploration in Coherence-Free Many-Core Architectures
30. Multiscale Thermal Management of Computing Systems - The MULTITHERMAN approach
31. Zeroing for HW-efficient compressed sensing architectures targeting data compression in wireless sensor networks
32. GPU-Accelerated Real-Time Path Planning and the Predictable Execution Model
33. Human body heat for powering wearable devices: From thermal energy to application
34. Land & Localize: An Infrastructure-free and Scalable Nano-Drones Swarm with UWB-based Localization
35. Flexible and Fully Quantized Ultra-Lightweight TinyissimoYOLO for Ultra-Low-Power Edge Systems
36. ITA: An Energy-Efficient Attention and Softmax Accelerator for Quantized Transformers
37. BioGAP: a 10-Core FP-capable Ultra-Low Power IoT Processor, with Medical-Grade AFE and BLE Connectivity for Wearable Biosignal Processing
38. A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms
39. PetaOps/W edge-AI µProcessors: Myth or reality?
40. ColibriUAV: An Ultra-Fast, Energy-Efficient Neuromorphic Edge Processing UAV-Platform with Event-Based and Frame-Based Cameras
41. FlooNoC: A Multi-Tbps Wide NoC for Heterogeneous AXI4 Traffic
42. A Data-Driven Approach to Lightweight DVFS-Aware Counter-Based Power Modeling for Heterogeneous Platforms
43. Sparse Stream Semantic Registers: A Lightweight ISA Extension Accelerating General Sparse Linear Algebra
44. Controlling NUMA effects in embedded manycore applications with lightweight nested parallelism support
45. Optimizing memory bandwidth exploitation for OpenVX applications on embedded many-core accelerators
46. A 60 GOPS/W, −1.8 V to 0.9 V body bias ULP cluster in 28 nm UTBB FD-SOI technology
47. Hybrid Modular Redundancy: Exploring Modular Redundancy Approaches in RISC-V Multi-Core Computing Clusters for Reliable Processing in Space
48. Deep Neural Network Architecture Search for Accurate Visual Pose Estimation aboard Nano-UAVs
49. Experimenting with Emerging RISC-V Systems for Decentralised Machine Learning
50. ColibriES: A Milliwatts RISC-V Based Embedded System Leveraging Neuromorphic and Neural Networks Hardware Accelerators for Low-Latency Closed-loop Control Applications
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