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Due to rapid growth in the integrated circuit (IC) industry, the demand for compact digital system design is high. However, the continued technology reductions made the feasibility of further scaling down transistor size more challenging. In response to the growing demand for ultra-compact IC designs, the revolutionary quantum-dot cellular automata (QCA) technology has emerged as a promising solution. In a digital era, the counters are widely adopted in the peer-to-peer process flow to establish a mechanism for generating unique values for each identifier/number. In this work, a unique synchronous and asynchronous counters architecture is proposed with a reliable D and T flip-flop design. The proposed QCA architecture is implemented and validated with the QCA designer tool. Furthermore, in QCA technology, unreliable QCA designs can lead to frequent errors and malfunctions in the implemented logic. To overcome this challenge, the proposed design prioritizes cell placement (the relative positions of QCA cells) to make the circuit more robust. As a result, the circuit can still produce the expected functionality even if some QCA cells malfunction. Hence, to ensure the reliability of the proposed QCA architecture, the missing cell defect analysis is carried out in comparison with existing state-of-the-art designs. Based on comparison results, the unique designs like the proposed multiplexer, D flip-flop and T flip-flop design exhibit success rates of 67.28, 77.04 and 85.15%, respectively. The experimental results demonstrate that the proposed counter-architecture outperforms existing architectures. [ABSTRACT FROM AUTHOR]

The antibacterial performance of biocomposite films prepared from lignocellulosic waste (hazelnut husk or hazelnut leafy green cover) modified with silver nanoparticles and polylactic acid (PLA) was determined. The amount of hazelnut husk in the PLA matrix ranged from 10 to 40% by weight in 10% increments. The composite pellets were produced using a twin-screw extruder. Biocomposite films of 0.6 mm x 40 mm x 200 mm were produced from the pellets in a laboratory hydraulic hot press. The surfaces of the modified hazelnut husk and biocomposite specimens were analyzed by scanning electron microscopy (SEM) and inductively coupled plasma optical emission spectrometry (ICP-OES). The antibacterial activity of the biocomposite films against Staphylococcus aureus bacteria was determined using the ASTM E 2149 (2020) method. The antibacterial activity of the biocomposite films increased noticeably with the addition of hazelnut husk modified with the silver nanoparticles. Compared to the pure PLA film, the biocomposite films with 10 wt% modified husk flour showed the lowest antibacterial activity (31.3%) against S. aureus over 24-h while the films with 40 wt% showed the highest antibacterial activity (99.9%). The biocomposite films made of hazelnut husk flour with silver nanoparticles and PLA matrix could be considered for food packaging applications. [ABSTRACT FROM AUTHOR]

The semiconductor industry has evolved significantly since its founding in 1950. Transistors and diodes are the primarily used electronic devices, but advancements in technology have led to more complex semiconductor devices, from printed circuit boards to multimillion gate design, i.e., a System on Chip (SoC) design. Almost 70–80 percent of the total SoC design effort is aimed at functional verification. In this paper, verification of an interconnect block in a processing system is presented. Trace monitoring of the transactions on the Advanced eXtensible Interface (AXI) interface of the interconnect is performed by programming different operational pointers and filters. Results were simulated from Synopsys—a Verilog Compiler Simulator (VCS) tool-2022v (Hyderabad, India). [ABSTRACT FROM AUTHOR]

Multiple-input, multiple-output orthogonal frequency-division multiplexing (MIMO-OFDM) systems with multiple input antennas and multiple output antennas in dynamic environments face the challenge of channel estimation. To overcome this challenge and to improve the performance and signal-tonoise ratio, in this paper we used the Kalman filter for the correct estimation of the signal in dynamic environments. To obtain the original signal at the receiver end bit error rate factor plays a major role. If the signal to noise ratio is high and the bit error rate is low then signal strength is high, the signal received at the receiver end is almost similar to the ith transmitted signal. The dynamic tracking characteristic of Kalman filter is used to establish a dynamic space-time codeword and a collection of orthogonal pilot sequences to prevent interference among transmissions in this paper. Using the simulation, the Kalman filter method can be compared to the other channel estimation method presented in this paper that can track timevarying channels rapidly. [ABSTRACT FROM AUTHOR]

Purpose. Networks-on-Chip (NoC) is a network-based communication between operating cores and intellectual property (IP) cores integrated on the same chip. An efficient design of NoC ensures high-speed data transfer and minimum essential connections in large-scale multicore, low power applications. Design/methodology/approach. A unique technique called Multicriteria Deming Regressive African Buffalo Optimized Mapping Weighted Directive Graph Theory (MDRABOMWDGT) is introduced for an efficient Network-on-Chip architecture design. The main aim of the proposed technique is to find efficient operating cores integrated on the chip with minimum time. Initially, a set of IP cores are listed with their connections from the benchmark dataset. Then Multicriteria Deming Regressive African Buffalo Optimization is applied to the topology for mapping strategy on 3D NoC, with communication metrics such as throughput, latency, and computation time. The optimization technique initializes the population of cores in search space. For each core in the network, communication metrics are measured; then Deming regression is applied to analyze multicriteria functions for minimizing computation time. Further, fitness is measured to get an optimal IP core for improving the performance of mapping in 3D NoC. Findings. Comprehensive experimental evaluation is conducted using a benchmark dataset, communication metrics are measured, and results show significant improvement in performance with respect to energy parameters compared to state-of-the-art works. Originality/value. The mapping strategy for 3D NOC is developed and the results are compared with the state-of-the-art techniques. [ABSTRACT FROM AUTHOR]

Due to increased demands for communication at low power, an efficient application mapping has become vital in the area of network on chip (NoC). Optimisation of architectural structure in on‐chip design is essential to maximise the performance of the network and minimise the cost functions. To address this issue, a knowledge‐based memetic algorithm (KBMA) is proposed for 3D NoC for successful mapping with standard network topologies. The proposed KBMA adopts power, area and delay as a cost function for an effective mapping. The competence of the proposed method is verified through comparison with other natural inspired algorithms like particle swarm optimisation and genetic algorithm. The presented work is validated through four case studies which include real application benchmarks of NoC and random generated benchmarks using test graph for free. [ABSTRACT FROM AUTHOR]