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This work systematically investigated the effect of high- K oxide materials on the performance of InAlN/GaN heterostructure underlap double gate (DG) MOS-HEMTs by considering 2D Sentaurus TCAD simulation. During the course of simulation, hydrodynamic mobility model was implemented and the obtained results were used for validating the model with the previously published experimental results. Different device performance parameters are thoroughly studied for different high- K oxide materials by performing extensive simulations. It is verified that short channel effects (SCEs), key analog and RF figures of merits parameters and V th improved with an increase in the value of high- K oxide material. Moreover, it is also revealed that there is a significant growth in the values of key analog and RF figures of merits with respect to high- K values. This analysis suggested that use of a suitable value of high- K -valued oxide material in InAlN/GaN heterostructure underlap DG MOS-HEMTs can be one of the alternatives for future high speed and microwave applications. In this work, different device parameters for underlap InAlN/GaN DG-MOSHEMTs were thoroughly investigated varying high-K oxide materials by using 2D Sentaurus TCAD. It is noticed that with different SCEs, key analog and RF parameters as well as threshold voltage show improvement with increase in the value of high-K oxide material. This study revealed that the use of proper value of high-K valued oxide in InAlN/GaN underlap DG-MOSHEMTs can be one of the key parameters for future high speed and microwave applications. [ABSTRACT FROM AUTHOR]

This work reported the analog and radio frequency performance for the Graded channel Gate stack double gate MOSFET structure for change in different high K oxide materials in the gate stack region. A wide comparison is established by considering the 2D TCAD simulator for change in doping concentration along the channel. This novel structure consists of gate stack engineering i.e. placing high-K layer over low-K region and non-uniform doping concentration to mitigate the SCEs and enhancing the performance of the existing devices. This novel device has the ability to suppressing the leakage current due stack techniques, avoiding the bipolar parasitic effect due to graded channel and simultaneously achieving higher breakdown voltage and better analog and RF performances. Therefore this device needs to be studied thoroughly for non uniform doping and different high K oxide materials to be reliable for future applications. Different parameters related to analog performances, such as output resistance, intrinsic gain, early voltage and output are studied. Similarly different RF parameters are also found out considering nonquasistatic (NQS) effect by interchanging the doping concentration and high-K layer materials. The 2D Sentrausu TCAD software was considered for carrying out the simulations for the proposed device with accurate validation. The result reveals that there is significant improvement on the performance of the proposed device for considering stack and graded channel techniques. [ABSTRACT FROM AUTHOR]

In this proposed work, an extensive study on the linearity performance of underlap AlInN/GaN double gate metal oxide semiconductor high electron mobility transistors (MOS-HEMT) has been analyzed using 2D Sentaurus TCAD simulation. Specifically a brief comparison is made on the linearity and intermodulation distortion characteristics of the proposed device due to variation of barrier layer thickness from 2 nm to 6 nm. Various parameters such as transconductance (, second-order transconductance (), third-order transconductance (), second-order voltage intercept point (VIP2), third-order voltage intercept point (VIP3), third-order input intercept point (IIP3) and third-order intermodulation distortion (IMD3) of underlap AlInN/GaN double gate metal oxide semiconductor high electron mobility transistors (MOS-HEMT) are discussed. The simulated results obtained confirms that by careful optimization of barrier layer thickness linearity characteristics of this proposed device can be improved, which can be suitable for analog and circuit applications. This work reports the linearity metrics of underlap double gate AlInN/GaN MOS-HEMT, with the variation of AlInN barrier layer thickness, by considering 2D Sentaurus TCAD. Different linearity parameters such as VIP2, VIP3, IIP3 and third order IMD3 are discussed. The obtained results confirm that by careful optimization of barrier layer thickness, linearity characteristics of this proposed device can be improved, which can be suitable for analog and circuit applications. [ABSTRACT FROM AUTHOR]

Comparative assessment of graded channel gate stack (GCGS) DG MOSFET structure is done by using two-dimensional (2D) Sentrausu TCAD simulator for different high K oxide thickness. This novel device includes gate stack (GS) engineering (high K) and nonuniformly channel engineering (GC) to suppress the short channel effects and improve the device performance. This novel device can be a better alternative for the future high speed switching and low power circuit applications. It has the advantage of improved breakdown voltage, reduced leakage current, low output conductance and reduced bipolar parasitic effects. The given device must be properly investigated with respect to the variation of different high K oxide thickness on different parameters such as drain induced barrier lowering (DIBL), subthreshold slope (SS), /, roll off before fabrication to have better reliability. The 2D Sentrausu TCAD simulator using drift-diffusion model was used to simulate the developed structure and good agreement is obtained with respect to already published result in the sub-threshold regime. The result indicates that there is a need to be optimize the DC parameters for specific circuit applications. In this work, we studied the DC and SCEs of the Graded Channel Gate Stack-DG MOSFETs with variation of high-K oxide thickness for different channel length with the help of TCAD simulator. The study gives us an idea that proper optimization of high-K oxide thickness for specific channel length is essential for specific DC applications and also to limit the short channel effects. This novel device can be a better alternative for the future high speed switching and low power circuit applications. [ABSTRACT FROM AUTHOR]