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Modern wireless systems are evolving toward a heterogeneous environment where multiple radio access technologies (RATs) coexist. Most of the RATs in current use operate independently of each other, however, there is an increasing demand for coordination among different RATs in order to support exponentially growing wireless traffic. Our goal in this paper is to design a super-MAC that integrates multiple RATs in a tightly coupled manner. To this end, we propose an architecture for super-MAC, and develop an algorithm that splits IP traffic into multiple RATs and controls each RAT to exploit multi-RAT diversity. We prove the asymptotic optimality of the super-MAC algorithm by introducing a novel reference system that enables the analysis of the multi-RAT system where there is a mixture of slotted (such as cellular) and unslotted (such as WiFi) RATs. Through extensive simulations we show that the super-MAC algorithm can enhance the quality of service including throughput, energy efficiency, and fairness. [ABSTRACT FROM AUTHOR]

A fundamental question in the study of location-based mobile sensing is how much energy can be saved while still guaranteeing the reliable localization accuracy. In this paper, we analyze key features of human proximity and find a motivation which implies that the energy-efficient and accurate localization is possible by sharing the locations of nearby mobile devices. From the location-based collaborative sensing idea, we formulate an optimization problem which aims to minimize the total number of location measurements for a given fairness criterion. Then, we propose a practical and distributed location sharing (DLS) protocol and an optimal parameter control algorithm (OWD) which makes the DLS protocol attain an asymptotic optimal performance. Via extensive simulations under various environments including real mobility traces, we verify that the proposed DLS+OWD policy significantly reduces the average power consumption of mobile devices with a higher fairness compared to the existing algorithms. [ABSTRACT FROM AUTHOR]

We consider energy efficient base station (BS) sleeping and clustering problems in cooperative cellular networks, where clusters of base stations jointly transmit to users. Our key idea of energy saving is to exploit spatio-temporal fluctuation of traffic demand, and use minimal energy to provide achievable data rate only slightly greater than varying traffic demand. However, it is highly challenging to design traffic-aware algorithms without the future traffic demand information. To overcome this difficulty, we develop joint BS sleeping and clustering algorithms using queue instead of the future traffic information. The queue length information captures spatio-temporal mismatch between traffic demand and offered data rate. For BS clustering problem, we propose an optimal algorithm under given BS sleep mode state that has polynomial complexity. We integrate the optimal clustering solution into the sleeping problem, which is a complex combinatorial problem, and develop a joint optimal clustering and sleeping algorithm with reduced complexity compared to the exhaustive search. We also develop a greedy algorithm that finds a near-optimal clustering and sleeping solution with polynomial complexity. Through extensive simulations, we show that the proposed algorithms can save significant energy when traffic load is low. [ABSTRACT FROM PUBLISHER]

In this paper, a linear CMOS power amplifier (PA) with high output power (34-dBm saturated output power) for high data-rate mobile applications is introduced. The PA incorporates a parallel combination of four differential PA cores to generate high output power with good efficiency and linearity. To implement an efficient on-chip power combiner in a small form-factor, we propose a parallel-series combining transformer (PSCT), which mitigates drawbacks and limitations of conventional power-combining transformers such as a series combining transformer (SCT) and a parallel combining transformer (PCT). Using the proposed PSCT, a two-stage class-AB PA is designed and fabricated in a 0.18-\mu\m CMOS technology. The PA achieves a P 1∼dB of 31.5 dBm , a P sat of 34 dBm, and a P linear of 23.5 dBm with a peak PAE of 34.9% (peak drain efficiency of 41%) at the operating frequency of 2.4 GHz . A detailed analysis of the proposed PSCT is introduced along with comparisons to the conventional monolithic power-combining transformers. A design methodology of the integrated CMOS PA is also presented. [ABSTRACT FROM AUTHOR]