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It is well-known that each new video coding standard significantly increases in computational complexity with respect to previous standards, and this is particularly true for the HEVC and VVC video coding standards. The development of techniques for reducing the required complexity without affecting the rate/distortion (R/D) performance is therefore always a topic of intense research interest. In this paper, we propose a combination of two powerful techniques, deep learning and parallel computing, to significantly reduce the complexity of the HEVC encoding engine. Our experimental results show that a combination of deep learning to reduce the CTU partitioning complexity with parallel strategies based on frame partitioning is able to achieve speedups of up to 26$$\times$$ × when 16 threads are used. The R/D penalty in terms of the BD-BR metric depends on the video content, the compression rate and the number of OpenMP threads, and was consistently between 0.35 and 10% for the video sequence test set used in our experiments

Several heuristic optimization algorithms have been applied to solve engineering problems. Most of these algorithms are based on populations that evolve according to different rules and parameters to reach the optimal value of a function cost through an iterative process. Different parallel strategies have been proposed to accelerate these algorithms. In this work, we combined coarse-grained strategies, based on multi-populations, with fine-grained strategies, based on a diffusion grid, to efficiently use a large number of processes, thus drastically decreasing the computing time. The Chaotic Jaya optimization algorithm has been considered in this work due to its good optimization and computational behaviors in solving both the constrained optimization engineering problems (seven problems) and the unconstrained benchmark functions (a set of 18 functions). The experimental results show that the proposed parallel algorithms outperform the state-of-the-art algorithms in terms of optimization behavior, according to the quality of the obtained solutions, and efficiently exploit shared memory parallel platforms. This research was supported by the Spanish Ministry of Science, Innovation and Universities and the Research State Agency under Grant RTI2018-098156-B-C54 co-financed by FEDER funds, and by the Spanish Ministry of Economy and Competitiveness under Grant TIN2017-89266-R, co-financed by FEDER funds.

In 2016, 73% of total Internet traffic came from video transmission and this percentage is expected to reach 82% by 2021. These figures show the importance of using video compression standards that maximize video quality while minimizing the necessary bandwidth. In 2013, the HEVC standard was released accounting for an approximate 50% bit rate saving compared to H.264/AVC while maintaining the same reconstruction quality. To address increases in video IP traffic, a new generation of video coding techniques is required that achieve higher compression rates. Compression improvements are being implemented in a software package known as the Joint Exploration Test Model. In this work, we present two parallel JEM model solutions specifically designed for distributed memory platforms for both All Intra and Random Access coding modes. The proposed parallel algorithms achieved high levels of efficiency, in particular for the All Intra mode. They also showed great scalability.

The high efficiency video coding (HEVC) standard has opened the door to high-quality multimedia contents and new formats such as ultra-high definition as a result of the unceasing demands of the market. This standard is able to outperform prior standards by up to 50% in terms of perceptual video quality, but at the cost of extremely large computational complexities. For this reason, the development of fast coding algorithms is now a requirement to make HEVC an adequate candidate for real-world scenarios. In this regard, this paper proposes a collaborative CPU $$+$$ GPU coding architecture for this standard, in which the CPU performs a coarse-grained parallelization of the encoder, while the GPU carries out a fast motion estimation. Given that the GPU algorithm can work together with a wide variety of parallel algorithms, this paper evaluates two of them: tiles, defined in the standard, and slices, already present in previous standards. Results indicate that slices are more adequate in terms of parallel efficiency (10.75 $$\times {}$$ speedup on average using 12 threads), while tiles achieve better coding efficiency.

Optimization methods allow looking for an optimal value given a specific function within a constrained or unconstrained domain. These methods are useful for a wide range of scientific and engineering applications. Recently, a new optimization method called Jaya has generated growing interest because of its simplicity and efficiency. In this paper, we present the Jaya GPU-based parallel algorithms we developed and analyze both parallel performance and optimization performance using a well-known benchmark of unconstrained functions. Results indicate that parallel Jaya implementation achieves significant speed-up for all benchmark functions, obtaining speed-ups of up to 190×, without affecting optimization performance. This research was supported by the Spanish Ministry of Economy and Competitiveness under Grant TIN2015-66972-C5-4-R, co-financed by FEDER funds (MINECO/FEDER/UE).

The new video coding standard HEVC includes two concepts that allow to partition a frame into regions that can be independently encoded and decoded. These two concepts are named "Tiles" and "Slices". In this paper, we present and analyze optimized parallel versions of the HEVC encoder based on tile and slice partitioning. We have evaluated the benefits and drawbacks of both approaches in terms of computational times and rate distortion performance. The results show that both approaches obtain good speed-ups, being the parallel version based on tiles the one that obtains the best trade-off between speed-up achieved (up to 9.3$$\times $$×) and rate distortion performance loss (1.6% BD rate for AI mode and 2.2% for LB mode on average).

The HEVC video coding standard requires nearly 70 % more time than H.264/AVC to encode a video sequence. Manycore architectures can considerably help to reduce the coding time. In this paper, we propose the use of GPUs to perform the intra-picture prediction without any R/D loss. We have evaluated our proposal and compared the results with the ones obtained when running on a CPU. The results show that a time reduction of up to 85 % can be obtained without any R/D loss.

The HEVC video coding standard launched on 2013, is able to reduce to the half, on average, the bit stream size produced by H.264/AVC encoder at the same video quality, but it requires nearly 70 % more time than H.264/AVC to encode a video sequence. In this paper we propose several parallelization approaches to the HEVC encoder. Our proposals, for distributed memory platforms, work at a coarse grain level parallelization, being one group of pictures (GOP) the basic structure. These approaches encode simultaneously several GOPs. To obtain good parallel performance, a right GOP conformation and distribution should be applied.

The high efficiency video coding (HEVC) is the newest video coding standard from the ITU-T Video Coding Experts Group and the ISO/IEC Moving Picture Experts Group, which significantly increases the computing demands to encode video to reach the limits on compression efficiency. Our interest is centered on applying parallel processing techniques to HEVC encoder to significantly reduce the computational time without disturbing the coding performance behavior. We propose a parallelization approach to the HEVC encoder which is well suited to multicore architectures. Our proposal uses OpenMP programming paradigm working at slice parallelization level. We encode several slices of each frame at the same time using all available processing cores. The results show that speed-ups up to $$9.8$$9.8 can be obtained for the All Intra mode and up to $$8.7$$8.7 for Low-Delay B, Low-Delay P and Random Access modes for $$12$$12 processes with a negligible loss in coding performance.

Recently, a new video coding standard called HEVC has been developed to deal with the nowadays media market challenges, being able to reduce to the half, on average, the bit stream size produced by the former video coding standard H.264/AVC at the same video quality. However, the computing requirements to encode video improving compression efficiency have significantly been increased. In this paper, we focus on applying parallel processing techniques to HEVC encoder to significantly reduce the computational power requirements without disturbing the coding efficiency. So, we propose several parallelization approaches to the HEVC encoder which are well suited to multicore architectures. Our proposals use OpenMP programming paradigm working at a coarse grain level parallelization which we call GOP-based level. GOP-based approaches encode simultaneously several groups of consecutive frames. Depending on how these GOPs are conformed and distributed, it is critical to obtain good parallel performance, taking also into account the level of coding efficiency degradation. The results show that near ideal efficiencies are obtained using up to 12 cores.

The three-dimensional wavelet transform (3D-DWT) has focused the attention of the research community, most of all in areas such as video watermarking, compression of volumetric medical data, multispectral image coding, 3D model coding and video coding. In this work, we present several strategies to speed up the 3D-DWT computation through multicore processing. An in depth analysis of the available compiler optimizations is also presented. Depending on both the multicore platform and the GOP size, the developed parallel algorithm obtains efficiencies above 95 % using up to four cores (or processes), and above 83 % using up to 12 cores. Furthermore, the extra memory requirements is under 0.12 % for low resolution video frames, and under 0.017 % for high resolution video frames. In this work, we also present a CUDA-based algorithm to compute the 3D-DWT using the shared memory for the extra memory demands, obtaining speed-ups up to 12.68 on the many-core GTX280 platform. In areas such as video processing or ultra high definition image processing, the memory requirements can significantly degrade the developed algorithms, however, our algorithm increases the memory requirements in a negligible percentage, being able to perform a nearly in-place computation of the 3D-DWT whereas in other state-of-the-art 3D-DWT algorithms it is quite common to use a different memory space to store the computed wavelet coefficients doubling in this manner the memory requirements.

In this work, we analyze the behavior of several parallel algorithms developed to compute the two-dimensional discrete wavelet transform using both OpenMP over a multicore platform and CUDA over a GPU. The proposed parallel algorithms are based on both regular filter-bank convolution and lifting transform with small implementations changes focused on both the memory requirements reduction and the complexity reduction. We compare our implementations against sequential CPU algorithms and other recently proposed algorithms like the SMDWT algorithm over different CPUs and the Wippig&Klauer algorithm over a GTX280 GPU. Finally, we analyze their behavior when algorithms are adapted to each architecture. Significant execution times improvements are achieved on both multicore platforms and GPUs. Depending on the multicore platform used, we achieve speed-ups of 1.9 and 3.4 using two and four processes, respectively, when compared to the sequential CPU algorithm, or we obtain speed-ups of 7.1 and 8.9 using eight and ten processes. Regarding GPUs, the GPU convolution algorithm using the GPU shared memory obtains speed-ups up to 20 when compared to the CPU sequential algorithm.

In this paper, we present PyPANCG, a Python library-interface that implements both the conjugate gradient method and the preconditioned conjugate gradient method for solving nonlinear systems. We describe the use of the library and its advantages in order to get fast development. The aim of this library is to develop high performance scientific codes for high-end computers hiding many of the underlying low-level programming complexities from users with the use of a high-level Python interface. The library has been designed for adapting to different stages of the design process, depending on whether the purpose is computational performance or fast development. Experimental results report the performance of our approach on different parallel computers.