Search

Shrinking design rules and reduced process tolerances require tight control of CD linewidth, feature shape, and profile of the printed geometry. The Holistic Metrology approach consists of utilizing all available information from different sources like data from other toolsets, multiple optical channels, multiple targets, etc. to optimize metrology recipe and improve measurement performance. Various in-line critical dimension (CD) metrology toolsets like Scatterometry OCD (Optical CD), CD-SEM (CD Scanning Electron Microscope) and CD-AFM (CD Atomic Force Microscope) are typically utilized individually in fabs. Each of these toolsets has its own set of limitations that are intrinsic to specific measurement technique and algorithm. Here we define "Hybrid Metrology" to be the use of any two or more metrology toolsets in combination to measure the same dataset. We demonstrate the benefits of the Hybrid Metrology on two test structures: 22nm node Gate Develop Inspect (DI) & 32nm node FinFET Gate Final Inspect (FI). We will cover measurement results obtained using typical BKM as well as those obtained by utilizing the Hybrid Metrology approach. Measurement performance will be compared using standard metrology metrics for example accuracy and precision.

Advanced 193 nm lithographic processes will require defocus control for product wafers in order to meet CD and profile requirements in the future. Dose control is already required. The interaction of product wafer materials with lithography requires additional controls beyond tool monitoring. While scatterometry has demonstrated excellent ability to extract effective defocus and dose information from monitor wafers, the addition of product film stacks introduces several issues for this technique. The additional complexity of model generation and the sensitivity to under-layer thickness and optical property variation are among these. A CDSEM technique for lithography focus monitoring overcomes these issues provided it has sufficient precision and relative accuracy. In this paper, we report on comparative studies of two CDSEM techniques. One technique uses angled e-beam to better view the sidewall for edge width measurement. The angle of the beam from normal incidence is considerably larger than previously explored thereby enabling sensitive measurements on shallower structures. The other technique introduces new target designs particularly suited to CDSEM measurement that have enhanced sensitivity to focus and dose. Implementation of these techniques requires expanded sampling during the course of a single measurement in order to suppress roughness. The small target size of these structures enables applications with targets in product kerf and embedded within the circuit. In summary, these methods enable the measurement of dose and focus variations on product wafers.

This work explores the applications of CD-SEM overlay metrology for double patterned one-dimensional (1D) pitch split features as well as double patterned ensembles of two-dimensional (2D) complex shapes. Overlay model analysis of both optical overlay and CD-SEM is compared and found to give nearly equivalent results. Spatial correlation of the overlay vectors is examined over a large range of spatial distances. The smallest spatial distances are shown to have the highest degree of correlation. Correlation studies of local overlay in a globally uniform environment, suggest that the smallest sampling of overlay vectors need to be ~10-15μm, within the spatial sampling of this experiment. The smallest spatial distances are also found to have to tightest mean distributions. The distribution width of the CD-SEM overlay is found to scale linearly with log of the spatial distances over 4-5 orders of magnitude of spatial length. Methodologies are introduced to examine both the overlay of double pattern contacts at the edge of an array and lithographic process-induced overlay shift of contacts. Finally, a hybrid optical- CD-SEM overlay metrology is introduced in order to capture a high order, device weighted overlay response.

We have developed a new local overlay measurement technique on actual device patterns using critical dimension scanning electron microscope (CD-SEM), which can be applied to 2D device structures such as an SRAM contact hole array or more complex shapes. CD-SEM overlay measurement can provide additional local overlay information at the site of device patterns, complementary to the conventional optical overlay data. The methodology includes the use of symmetrically arranged patterns to cancel out many process effects and reduce measurement uncertainty. The developed methodology was applied to local overlay measurement of double patterning contact hole layers of leading edge devices. Local overlay distribution was successfully captured on device structures on different length scale, and the result shows the possibility of assessing process induced shift on device structures and collecting denser sampling for better intra-chip overlay control. The measurement uncertainty of CD-SEM overlay metrology was assessed by comparing with conventional optical overlay metrology for 1D and 2D structures. Very good correlation was confirmed between SEM and optical overlay metrology with net residual error of ~1.1nm. Measurement variation associated with pattern roughness was analyzed for 1D structure, and identified as one of major variation sources for CD-SEM overlay metrology.

Workhorse metrology such as CD-SEM is used during process development, process control, and optical proximity correction model generation and verification. Such metrology needs to be calibrated to handle various types of profiles encountered during IC fabrication. Reference metrology is used for calibration of workhorse metrology. There is an astounding need for sub-half and sub-quarter nanometer measurement uncertainty in the near future technology nodes as envisaged in the International Technology Roadmap for Semiconductors. In this regime of desired measurement uncertainty all metrology techniques are deemed limited and hybrid metrology appears promising to offer a solution. Hybrid metrology is the use of multiple metrology techniques, each with particular strength, to reduce the overall measurement uncertainty. CD-AFM makes use of a flared probe in order to scan the sidewalls and bottom of the pattern on a wafer to provide 3D profile and CD measurements at desired location on the profile. As the CD shrinks with technology nodes especially the space, the size of the AFM probe also needs to shrink while maintaining the flared geometry specifications. Unfortunately the fabrication of such probes is a challenge and new techniques are required to extend reference metrology to the smallest space and hole of interest. This paper proposes a reference system combining CD-AFM and patterning simulation model. This hybrid metrology system enables CD metrology in a space not measurable directly by conventional CD-AFM probe. The key idea is to use the successfully measured profile and CD information from the CD-AFM to calibrate or train the patterning simulation optical and resist model. Ability of this model to predict profile and CD measurement is verified on a physically measured dataset including cross sections and additional CD-AFM measurements. It is hypothesized that this model will be able to predict profile and CD measurements in otherwise immeasurable geometries. Being based on optics and materials fundamentals, this approach is presumed to be more accurate compared to mere extrapolation approach in use today. We report on the measurement uncertainty improvement with this approach. Situations with highest prediction confidence involve CD-AFM scanning resulting in partial information. For example, using carbon nanotube probes or CDP where there is little flaring of the tip, the CD-AFM cannot detect significant undercutting of the structure. Achieving agreement with the calibrated patterning model for measurement metrics such as height, top and middle CD permits the prediction of the bottom CD to be used as an authentic reference measurement.

The International Technology Roadmap for Semiconductors (ITRS) provides a set of Metrology specifications as targets for each technology node. In the current edition (2007) of the ITRS the conventional precision (reproducibility) is replaced with a new metric - measurement uncertainty for dimensional metrology 1 . This measurement uncertainty contains single tool precision, tool-to-tool matching, sampling uncertainty, and inaccuracy (sample-to-sample bias variation and other effects). Clearly, sampling uncertainty is a major component of measurement uncertainty. This paper elaborates on sampling uncertainty and provides statistical estimates for sampling uncertainty. The authors in this paper address the importance and the methods of proper sampling. The correct sampling captures and allows for the expression of the information needed for adequate patterning process control. Along with typical manufacturing process control cases (excursion control, advanced and statistical process control), several other applications are explored such as optical and electron beam line width measurement calibration, measurement tool evaluations, lithographic scanner assessment and optical proximity correction implementation. The authors show how appropriate choices among measurement techniques, sampling methods, and interpretation of measurement results give meaningful information for process control and demonstrate how an incorrect choice can lead to wrong conclusions.

The conventional premise that metrology is a "non-value-added necessary evil" is a misleading and dangerous assertion, which must be viewed as obsolete thinking. Many metrology applications are key enablers to traditionally labeled "value-added" processing steps in lithography and etch, such that they can be considered integral parts of the processes. Various key trends in modern, state-of-the-art processing such as optical proximity correction (OPC), design for manufacturability (DFM), and advanced process control (APC) are based, at their hearts, on the assumption of fine-tuned metrology, in terms of uncertainty and accuracy. These trends are vehicles where metrology thus has large opportunities to create value through the engineering of tight and targetable process distributions. Such distributions make possible predictability in speed-sorts and in other parameters, which results in high-end product. Additionally, significant reliance has also been placed on defect metrology to predict, improve, and reduce yield variability. The necessary quality metrology is strongly influenced by not only the choice of equipment, but also the quality application of these tools in a production environment. The ultimate value added by metrology is a result of quality tools run by a quality metrology team using quality practices. This paper will explore the relationships among present and future trends and challenges in metrology, including equipment, key applications, and metrology deployment in the manufacturing flow. Of key importance are metrology personnel, with their expertise, practices, and metrics in achieving and maintaining the required level of metrology performance, including where precision, matching, and accuracy fit into these considerations. The value of metrology will be demonstrated to have shifted to "key enabler of large revenues," debunking the out-of-date premise that metrology is "non-value-added." Examples used will be from critical dimension (CD) metrology, overlay, films, and defect metrology.

The need for 3D metrology is becoming more urgent to address critical gaps in metrology for both lithographic and etch processes. Current generation lithographic processing (ArF source, where λ=193 nm) sometimes results in photoresist lines with re-entrant profiles or T-topping, as do many etch processes. A re-entrant profile misleads top-down metrology into reading the critical dimension (CD) as too large. Recent advances in gate process technology also raise challenges to traditional top-down metrology. One such example is the FinFET, which is truly a 3D device with 3D metrology needs. The ability to measure the bottom width of a profile is crucial for process control. Recently, tilt-beam critical dimension-scanning electron microscopy (CD-SEM) applications have been developed to measure the bottom CD of such features, using the tilted-view to "see" the bottom, avoiding the feature's larger top. This is an important achievement, as the bottom of a profile is the main feature of interest in many processes. Estimation of sidewall angle (SWA) is also important. For several years, tilt-beam CD-SEM has been an available technique for this measurement, with limited adoption by the litho-metrology community. However, in this paper we will explore another method to use the tilt feature to measure average sidewall angle, based on edgewidth measurement and the assumption of basic trapezoidal profile and known height and combined with the ability to sample multiple-features. While it will not provide exact profile shape, this technique can be quite useful in providing average profile information and will definitely exhibit good throughput. Samples used will be photoresist and etched FinFET structures to measure sidewall angles. Correlations of the results to a traceable CD-atomic force microscopy (AFM) reference measurement system are provided. Conclusions will show preliminary findings of the readiness of tilt-beam CD-SEM for measuring profile and, by extension, the status of measuring 3D structures such as FinFETs, and using CD-SEM as a direct control of lithographic tooling for T-topped photoresist profiles.

As described by the ITRS roadmap [1], introduction of next generation processes in semiconductor fabrication continually requires tighter control in order to insure optimal device characteristics. Recent process development has shown an increased amount of charged layers, which in turn affects the inline critical dimension scanning electron microscope's (CD-SEM) ability to generate quality measurements thereby impacting process control. This paper reports on the investigation of techniques to measure and compensate for this charge dynamically to yield quality measurements. New capabilities of the CD-SEM were evaluated and tested at various process steps including processing steps not measured by the CD SEM. This capability not only means the CD-SEMs are essentially immune to charged layer affects but the capability can also be used to feedback to other tool-sets suspected of causing the charge build-up. These charge measurements help provide an understanding on how the device performance might be impacted. In order to establish charged wafer monitoring in the future along with feedback loops, studies of the reproducibility and the persistency of the charge across sequential processes in the back-end layers have been made. Studies were also conducted to determine the origin of the charge by observing the distribution before and after known problematic process steps.

Overlay tool matching and accuracy is sues are quickly reaching a comparable complexity to that of critical dimensional metrology. While both issues warrant seri ous investigation, this paper deals with the matching issues associated with overlay tools. Overlay tools ne ed to run and measure as if they are a single tool - they need to act as one. In this paper a matching methodology is used to assess a set of overlay tools in a multiple of overlay applications. The methodology proposed in a prior 2 SPIE paper is applied here to a fleet of two generations of overlay tools to det ect measurement problems not seen with convention Statistical Process Control techniques. Four studies were used to examine the benefits of this matching methodology for this fleet of overlay tools. The first study was a matching assessment study. The second study was a hardware comparison between generations of tools. The third study was a measurement strategy comparison. The final study was a long term matching exercise where one example of a traditional long term monitoring strategy was compared to a new l ong term monitoring strategy. It is shown that this new tool matching method can be effectively applied to overlay metrology. Keywords: overlay, tool matching, TMP, FMP, offsets, precision, slope, nonlinearity

Measurement matching among metrology tools to the level of the precision specifications in the ITRS is highly desirable. A quantitative measure of this matching should combine single tool precision, tool-to-tool nonlinearities, and tool-to-tool offsets. In this paper we introduce Tool (under test) Matching Precision (TMP) and Fleet Measurement Precision (FMP) as these "bottom-line" metrics. TMP measures a single tool matching performance against a similar benchmark tool, while FMP measures the performance of the entire fleet. The paper describes a technique to diagnose both the tool under test and the fleet of tools when these bottom-line metrics do not meet the required specifications. Additionally, the exercise of assessing the matching of two tools or a fleet of tools requires a methodology that identifies and constructs a set of desirable artifacts, handles measurement induced sample damage, and provides a set of diagnostic metrics to aid in identifying root causes of matching problems. The methodology can be used for many different metrology systems. This case study will revolve around simulated data and actual data acquired from CD SEMs.