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In real-time image processing, with the improvement of resolution and frame rate of camera imaging, not only the requirement of processing capacity is improving, but also the requirement of the optimization of process is improving. With regards to the FPGA + DSP architecture image processing system, there are three common methods to overcome the challenge above. The first is using higher performance DSP. For example, DSP with higher core frequency or with more cores can be used. The second is optimizing the processing method, make the algorithm to accomplish the same processing results but spend less time. Last but not least, pre-processing in the FPGA can make the image processing more efficient. A method of multi-resolution pre-processing by FPGA based on FPGA + DSP architecture is proposed here. It takes advantage of built-in first in first out (FIFO) and external synchronous dynamic random access memory (SDRAM) to buffer the images which come from image detector, and provides down-sampled images or cut-down images for DSP flexibly and efficiently according to the request parameters sent by DSP. DSP can thus get the degraded image instead of the whole image to process, shortening the processing time and transmission time greatly. The method results in alleviating the burden of image processing of DSP and also solving the problem of single method of image resolution reduction cannot meet the requirements of image processing task of DSP.

This article describes a method of the timing sequence design for CMOS image sensor LUPA-4000. A FPGA based imaging system with the function of adjustable integration time, multiple-slope integration, parallel integration an reading, windowing readout has been designed. This design can satisfy the frequency of 66M limit frequency of LUPA-4000 and 20 frames of a second. As the fixed noise of LUPA-4000 is aloud and the image is not clear, an efficient real-time image processing algorithm is also described in this paper. First a black image should be acquired as the fixed noise image. The real-time images can be send out after subtracting the noise image. This method can effectively eliminate the fixed noise o f the image, as the same time, the original image information has been maintained in the maximum degree. The test experiments on FPGA shows this design can drive LUPA-4000 working properly. Also this design takes full advantage of the accessibility features of the device, which provides a wider dynamic range and more flexible application of the device. The image sensor driven by this design improves imaging quality, which can be used for space exploration, especially for small space dynamic target tracking.

Digital image processing technique is an emerging science that emerging with the development of semiconductor integrated circuit technology and computer science technology since the 1960s.The article introduces the digital image processing technique and principle during measuring compared with the traditional optical measurement method. It takes geometric measure as an example and introduced the development tendency of digital image processing technology from the perspective of technology application.

The output signals of the focusing system in lithography are analog. To convert the analog signals into digital ones which are more flexible and stable to process, a desirable data acquisition system is required. The resolution of data acquisition, to some extent, affects the accuracy of focusing. In this article, we first compared performance between the various kinds of analog-to-digital converters (ADC) available on the market at the moment. Combined with the specific requirements (sampling frequency, converting accuracy, numbers of channels etc) and the characteristics (polarization, amplitude range etc) of the analog signals, the model of the ADC to be used as the core chip in our hardware design was determined. On this basis, we chose other chips needed in the hardware circuit that would well match with ADC, then the overall hardware design was obtained. Validation of our data acquisition system was verified through experiments and it can be demonstrated that the system can effectively realize the high resolution conversion of the multi-channel analog signals and give the accurate focusing information in lithography.

In this paper we present a programmable computational image sensor for high-speed vision. This computational image sensor contains four main blocks: an image pixel array, a massively parallel processing element (PE) array, a row processor (RP) array and a RISC core. The pixel-parallel PE is responsible for transferring, storing and processing image raw data in a SIMD fashion with its own programming language. The RPs are one dimensional array of simplified RISC cores, it can carry out complex arithmetic and logic operations. The PE array and RP array can finish great amount of computation with few instruction cycles and therefore satisfy the low- and middle-level high-speed image processing requirement. The RISC core controls the whole system operation and finishes some high-level image processing algorithms. We utilize a simplified AHB bus as the system bus to connect our major components. Programming language and corresponding tool chain for this computational image sensor are also developed.

Today, solid state image sensors are used in many applications like in mobile phones, video surveillance systems, embedded medical imaging and industrial vision systems. These image sensors require the integration in the focal plane (or near the focal plane) of complex image processing algorithms. Such devices must meet the constraints related to the quality of acquired images, speed and performance of embedded processing, as well as low power consumption. To achieve these objectives, low-level analog processing allows extracting the useful information in the scene directly. For example, edge detection step followed by a local maxima extraction will facilitate the high-level processing like objects pattern recognition in a visual scene. Our goal was to design an intelligent image sensor prototype achieving high-speed image acquisition and non-linear image processing (like local minima and maxima calculations). For this purpose, we present in this article the design and test of a 64 64 pixels image sensor built in a standard CMOS Technology 0.35 m including non-linear image processing. The architecture of our sensor, named nLiRIC (non-Linear Rapid Image Capture), is based on the implementation of an analog Minima/Maxima Unit. This MMU calculates the minimum and maximum values (non-linear functions), in real time, in a 2 2 pixels neighbourhood. Each MMU needs 52 transistors and the pitch of one pixel is 40 40 m. The total area of the 64 64 pixels is 12.5mm 2 . Our tests have shown the validity of the main functions of our new image sensor like fast image acquisition (10K frames per second), minima/maxima calculations in less then one ms.

Image processing is a field of great interest for many applications. Nowadays it is very hard to name an application where image processing is not involved. Digital techniques remains the dominant ones applied to digital image processing with significant automation approaches that are built in image display, as in most digital cameras and digital TVs, to name few. Depending on the application, digital image processing techniques produces satisfactory accurate results. However, digital enhancement techniques suffer from the main constraint: slow processing speed, an inherited problem associated with any digital image processing technique. On the other hand optical image enhancement techniques such as the polarization-based ones produce satisfactory accurate results and at the same time overcome the processing time constraint associated with their digital counter ones. This paper presents a comparison between digital and polarization-based enhancement/encoding techniques with respect to their accuracy, security and processing time in automated pattern recognition applications.

Today, intelligent image sensors require the integration in the focal plane (or near the focal plane) of complex algorithms for image processing. Such devices must meet the constraints related to the quality of acquired images, speed and performance of embedded processing, as well as low power consumption. To achieve these objectives, analog pre-processing are essential, on the one hand, to improve the quality of the images making them usable whatever the light conditions, and secondly, to detect regions of interest (ROIs) to limit the amount of pixels to be transmitted to a digital processor performing the high-level processing such as feature extraction for pattern recognition. To show that it is possible to implement analog pre-processing in the focal plane, we have designed and implemented in 130nm CMOS technology, a test circuit with groups of 4, 16 and 144 pixels, each incorporating analog average calculations.

Image distribution is getting more and more processor demanding, due to the increased quality requirements and the need for real time imaging. Therefore, improv ed techniques and processo rs are being designed. Another attractive approach is keeping image processing in the optical domain and extending, as much as it is possible, the functionalities performed to this domain. Optical processing is a reality in many research fields, namely optical communications. Results reported in literature show that it is possible to exploit optical components to accomplish image capture, optical transform processing, sampling and threshol ding. We propose a general architecture for all-optical image acquisition, processing and transmitting, and re view potential best fit for each functionality. Keywords: All-optical processing, optical transforms, data compression, image/video processing. 1. INTRODUCTION At present, digital video or image delivery is one central researc h topic, since the technology is now mature to provide a concrete prospective of progress in this field, and also the interest on video streaming is clearly growing, from both services provider and users. Optical fiber networks are already used for image/video distribution, but photonic technologies can be exploited to accomplish not just delivery, but processing functionalities as well. This approach allows keeping image in the optical domain, with the first relevant achievement of overcomi ng the limitations due to Optical-to-Electrical-to-Optical (OEO) stages. In this framework, the main aim of the CITO (Image Co mpression using Optical Transforms ) project is to evaluate the potential of optical technologies in meeting the high processing requirements of actual and emerging image and video formats, and in overcoming limitation imposed by electronic based architecture, such as latency and power consumption. Therefore, with this work we aim to present a general architecture, for all-optical image/video acquisition, processing and transmitting. Proposed system architectu re is based on the following main fu nctionalities: video capture, transform, quantization, coding and transmission. A review of some of the potential best solutions and technologies for the implementation of such functionalities is presented, and the main challenges are investigated. To the best of our knowledge, the potential of integrated optics in the field of all optical video/image processing system is still not well exploited, especially from the integration point of view. Thus, the subject deserves major investigations and motivates our objectives.

We demonstrate experimentally the ability to shape the point spread function of a distributed aperture millimeter wave imaging system by modifying its aperture phase. We also show how to exploit this capability to perform low-resolution analog image processing. A preliminary investigation of system performance reveals nonuniformity in amplitude response across the array is a major contributor to deviations from predicted PSFs.

Traditional optical image processing system is mostly based on PC, and is restricted in many fields. A novel system of optical image processing is advanced. It consists of two parts: image acquisition system and image processing system. Image acquisition system is made up of FPGA, CMOS image sensor and image buffer memory. DSP is selected as the key element of the image processing system. An extra image buffer memory and an image memory are also used. Program of optical image processing is written into DSP. Images processed can also be transmitted to display interfaces, such as LCD, TV, etc. The system can operate conveniently, smoothly and inerrably with high speed and precision.

We present the potential of using Programmable Analog Signal processing techniques for impacting low-power portable applications like imaging, audio processing, and speech recognition. The range of analog signal processing functions available results in many potential opportunities to incorporate these analog signal processing systems with digital signal processing systems for improved overall system performance. We describes our programmable analog technology based around floating-gate transistors that allow for non-volitile storage as well as computation through the same device. We describe the basic concepts for floating-gate devices, capacitor-based circuits, and the basic charge modification mechanisms that makes this analog technology programmable. We describes the techniques to extend these techniques to program an array of floating-gate devices. We show experimental evidence for the factor of 1000 to 10,000 power efficiency improvement for programmable analog signal processing compared to custom digital implementations in Vector Matrix Multipliers (VMM), CMOS imagers with computation on the pixel plane with high fill factors, and Large-Scale Field Programmable Analog Arrays (FPAA), among others.

In order to realize the auto focusing technique based on digital image processing, a video image processing system is designed by using high-performance digital signal processor TMS320VC5509 as the core, field programmable gate array FPGA for preprocessing of image. At the same time, it is proposed to use vector norm sum of image gray gradient as evaluation functions of digital image. It has the characteristics of good unbiasedness, powerful unimodality, etc., and can be applied to evaluation of defocusing. The hardware composition of the theory behind the auto focusing system, and the application of the evaluation function are discussed in details.

Firstly, this paper introduces the concept of multi-level digital holographic storage. Then, application of digital image processing technology is brought forward in the data restoring process of digital holographic storage. Information in the reconstructed digital images collected from CCD camera is enhanced through digital image processing technology and threshold decision is gone on so as to decreasing bit error ratio of system. Based on above-mentioned ideal, the programming project is designed, which is applicable to binary and multi-level digital holographic storage. Finally, the quality of a binary experimental image is improved through digital image processing program and the accuracy of threshold decision can be improved.

For a binary image containing only curves (and lines) in a background infested by binary noises, (e.g., salt-and-pepper noise,) a very efficient way to extract the image data, and to save them in a very compact file for an accurate and complete image recall later, is very attractive to many image processing and pattern recognition systems. This paper reports the data-extraction method we developed recently for inputting a binary image to a special neural-network pattern recognition system, the noniterative, real-time learning system. We use an adaptive/tracking window to track the direction of a continuous curve in the binary image, and record the xy-coordinates of all points on this curve until the window hits an end point, or a branch point, or the original starting point. By scanning this tracking window across the whole image frame, we can then segment the original binary image into many single curves. The xy"s of points on each curve can then be analyzed by a curve fitting process, and the analytic data can be stored very compactly in an analog data file. This data file can be recalled very efficiently to reconstruct the original binary image, or can be used directly for inputting to a special neural network and for carrying out an extremely fast pattern learning process. This paper reports the image-processing steps, the programming algorithm, and the experimental results on this novel image extraction technique. It will be verified in each experiment by reconstructing the original image from the compactly extracted analog data file.© (2005) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Introduction of digital communication network such as Integrated Services Digital Networks (ISDN) and digital storage media have rapidly developed. Due to a large amount of image data, compression is the key techniques in still image and video using digital signal processing for transmitting and storing. Digital image compression provides solutions for various image applications that represent digital image requiring a large amount of data. In this paper, the proposed DWT (Discrete Wavelet Transform) filter bank is consisted of simple architecture, but it is efficiently designed that a user obtains a wanted compression rate as only input parameter. If it is implemented by FPGA chip, the designed encoder operates in 12 MHz.

Digital image processing algorithms are usually designed for the raw format, that is on an uncompressed representation of the image. Therefore prior to transforming or processing a compressed format, decompression is applied; then, the result of the processing application is finally re-compressed for further transfer or storage. The change of data representation is resource-consuming in terms of computation, time and memory usage. In the wide format printing industry, this problem becomes an important issue: e.g. a 1 m2 input color image, scanned at 600 dpi exceeds 1.6 GB in its raw representation. However, some image processing algorithms can be performed in the compressed-domain, by applying an equivalent operation on the compressed format. We investigate the application of compression to the Wide Format Document management chain and more specifically to the image processing components. We survey the typical printing processing operations, such as rotation by multiple 90°, symmetry along vertical or horizontal axis or scaling in the JPEG compressed-domain.

The importance of phase and amplitude in the field of image processing is compared by using the method of Fourier transform. The digital image is encoded with only-phase encode and the computer simulation results are given. The research shows that phase is more important than the amplitude, and phase-only code of image is effective for image encryption and we should make full use ofthe phase of the image.

Digital image information security is a new research topic which is appearing with the rapid progress of computer network and multimedia. Becoming main measure of information representation, digital image meets the problem how to protect the security of the information it carries. In particular, how to keep the information after kinds of image processing procedure is still an open problem which is not solved. The common way to hide information into an image is to change the values of certain places in the space domain or frequency domain. The novel technique introduced in this thesis, also being a new idea, is to use the topological characteristics of certain chosen points, in detail, the sequence of points along a convex-chain, in the picture to carry information. And this makes the information quite hard to be destroyed by many kinds of image processing.

Consider an hypothetical image processing system, where a given target is to be identified. The usual sequence of steps consists on an image equalization to adapt to the illumination situation. Then the image is binarized, allowing a morphological filter to correct the noisy edges and shapes by means of an indeterminate sequence of openings or closings. The resulting image can then be segmented and recognized. If the results are unsatisfactory, then the processing parameters in any of the previous steps must be changed, perhaps by trial and error. For instance, the binarization threshold can be raised or lowered, and the following steps must be performed again to see the results. This is obviously cumbersome, tedious and error prone. The Image Processing Spreadsheet PDICalc is a simple but powerful combination of two different and widespread software technologies. It's benefit comes from enabling users to build an image processing pipeline, considering each step separately, and visualizing the results of modifying the parameters of each step in the final image. A spreadsheet based user interface eliminates the tedious and repetitive interaction that characterizes current image processing software. Users can build a processing template and reliably repeat often needed processing without the effort of redevelopment or recoding. In the cited example the user simply creates the processing template, defining each cell of the spreadsheet as the result of applying a given processing step on another cell. This template can be then reused with any input image, can be stored for future processing sessions, and every step can be trimmed precisely to achieve the desired results. Our implementation considers most of the image processing techniques as its building blocks. Arithmetic operators are overloaded to represent per pixel operations. We included also equalization and histogram correction, arbitrary convolution filtering, arbitrary morphological filtering (with programmed repetition), Fourier operations, and several segmentation techniques.

In night vision applications, because the light reflected by a target is very weak, the image captured by the Low-Light- Level camera has a great deal of noise attached on it. To remove such noise, the image must be processed in time. In this paper a real-time image processing system with a high- speed DSP device embedded in is constructed. The system employs an Analog Front End (AFE) device as the analog video digitalizer, and a DA converter with video synthesizing function in the analog video output channel. The whole processing board is small in size, and easy in use.

This integrated optical motion detection microsystem combines an analog programmable interpolator, digital drivers, differential analog front-end, signal monitoring outputs and contains an array of light sensitive cells with microstripe raster. Interpolating values are generated from orthogonal sinusoidal signals coming from illuminated integrated photosensors. Optical microsystem composes autocalibration on analog front-end to get proper interpolating signals. It consists of three symmetrical analog channels: sin, cosine and reference signal channel. Each channel combines a current gain stage operating as a fully differential current to voltage converter and thus guarantees the best phase relating between ordinary and inverted analog signals. Integrated analog buffers are used for outputting processed analog signals for monitoring purpose. The signal bandwidth of analog channels is designed to be large enough not to limit the system response and therefore maximize the useful signal range.© (2000) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Present endoscopic systems for routine use are mostly based on Standard Definition TV (SDTV) and analog datatransmission for image acquisition and presentation. Accordingly, the intrinsic optical quality of most endoscopesin terms of spatial and dynamic resolution as well as color quality is not fully exploited by this technology.Our newly developed high-definition TV (HDTV) system takes advantage of cutting-edge digital and analog processing stages. combined with real-time digital image processing algorithms, to achieve a substantially improvedoverall image quality.The system is capable of processing 30 frames per second in progressive scan, each of which consists of 1024 x1024 pixels in 24-bit true-color mode. To guarantee uniform high-level performance, custom ASIC design has been used and implemented. The pulse generator ASIC is responsible for the CCDb5 most optimal working conditionand the correction/interpolation ASIC performs an interpolation of the missing color values for each pixel in real

Several technologies have been developed in recent years to advance the state of the art of IR sensor systems including dual color affordable focal planes, on-focal plane array biologically inspired image and signal processing techniques and spectral sensing techniques. Pacific Advanced Technology (PAT) and the Air Force Research Lab Munitions Directorate have developed a system which incorporates the best of these capabilities into a single device. The 'NeuroSeek' device integrates these technologies into an IR focal plane array (FPA) which combines multicolor Midwave IR/Longwave IR radiometric response with on-focal plane 'smart' neuromorphic analog image processing. The readout and processing integrated circuit very large scale integration chip which was developed under this effort will be hybridized to a dual color detector array to produce the NeuroSeek FPA, which will have the capability to fuse multiple pixel-based sensor inputs directly on the focal plane. Great advantages are afforded by application of massively parallel processing algorithms to image data in the analog domain; the high speed and low power consumption of this device mimic operations performed in the human retina.

Analog Sensor Processing Using Exposure Control (ASPEC) is a new concept for high speed image processing. By using an addressable image array with integrating output amplifiers, single processing can be performed directly on the sensors. The major gain in using ASPEC techniques is that the operations are fast, the approach can be implemented using existing hardware, and that the processing is executed in parallel on the sensor array. Furthermore, the data reduction is carried out early in the signal processing chain. In this paper we present a novel programmable camera architecture based on the CIVIS CMOS integrating addressable image sensor which is well suited for ASPEC applications.

The problem of image pre-processing by neuron-like algorithms concerns development of systems and methods of image processing in parallel regime. The processing algorithms of grey-tone images to sets of simplified binary images by software of neuron-like filtration (based on the models of homogeneous neural networks) are considered in the paper and partially realized. The time of image processing is calculated. Carrying out of the required set of operations with image is possible according to the convolution function view. The neural network parameters (the type of coupling function and type of element response to the external influence) are selected in accordance with the solution which we want to receive. The program uses function similar to the Mask Convolution function. This function as any other functions basic for image processing are realized in the Intel Corporation `Recognition Primitives Library (RPL) for the Pentium Processor' with great efficiency. Library works under Windows NT. Performed calculations confirm that neuron-like model may be applied for real time image processing using RPL.© (1998) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

The design and application of a digital high sped image data capturing system with a following image processing system applied to the Bremer Hochschul Hyperschallkanal BHHK is the content of this presentation. It is also the result of the cooperation between the departments aerodynamic and image processing at the ZARM-institute at the Drop Tower of Brennen. Similar systems are used by the combustion working group at ZARM and other external project partners. The BHHK, camera- and image storage system as well as the personal computer based image processing software are described next. Some examples of images taken at the BHHK are shown to illustrate the application. The new and very user-friendly Windows 32-bit system is capable to capture all camera data with a maximum pixel clock of 43 MHz and to process complete sequences of images in one step by using only one comfortable program.

Video transmission in a local area network consumes a great deal of network resources. Hybrid Analog/Digital Video Networks (ADViNet) can remedy this deficiency. ADViNet allows users to send real-time full-screen motion images through an analog communication medium without slowing down regular network activities. In this paper we are going to consider a multilayer control and management protocol that will allow users to supervise the analog medium through the digital one. Several groups of new protocol commands will be introduced. The first group covers the operations that directly change the ways of distributing video information through the analog medium. The second group includes network administration commands. Some of the ADViNet functions are intelligent: besides data transmission, they include data processing and/or decision-making elements.

In this paper, an MIMD parallel system is proposed for image processing applications. The system includes four worker processors and one master processor which are connected together using the facilities provided by a local area network. Results of using the system for implementing low level image processing algorithms and the recognition of objects in parallel will be reported.

Most image processing and computer vision algorithms assume knowledge of the proper spatial scale in the image. We propose an automatic technique that adaptively sets the proper spatial scale based on the size of local features in the image. We discuss an analog VLSI circuit implementation that uses this method to automatically determine the proper scale based on a dynamic system model that continuously searches scale space. Though this technique is motivated by analog circuit concepts, we show results for a digital implementation for image enhancements of mammograms. Digital implementations must discretize the scale space and perform an optimization over this finite set.© (1996) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

The necessity of special and system programming strictly limits the possibilities of image processing specialists developing the program applications if they are not simultaneously the professional programmers. In many respects the efficiency of image processing is determined by the user's interface convenience and saturation and its orientation to the decision of a particular applied problem. There is a rather significant problem of the design of a flexible system that can execute specific image processing scheme in the conveyor mode without the human supervising after the preliminary fitting with the use of visual programming. The important property of these systems must be the possibility of the automatic processing changing under the condition of initial data updating. The object-oriented frame approach to image processing is developed in this paper. The essence of the given approach consists in that the image processing scheme represents a semantic network of software frames, such that each of them is an independent object, and over each of them it's possible to execute the separate transformation. All necessary types of software frames are considered and the interaction of objects in such a network provided by means of the message transmissions between frames in accordance with some logic rules is discussed. The way of image processing systems design offered permits the user to use all the advantages of object-oriented programming and window- based user's interface for the image processing. To illustrate the resources of this approach authors worked out the Visual PISoft or Windows image processing system on PC.© (1995) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

The theory of designing optical-electronic image processing computer systems has been presented. A model of parallel image processing systems has been considered, based on the principle of work up function decomposition. The implementation possibilities of different image processing operations with the help of optical and electronic computer means have been analyzed. A structure model of a computer system has beem examined, that is a conveyor of parallel computer devices. Evaluation of time outlay in the system, while working up an image or a series of them has been made. The differences of time outlay from conveyor length change and the correlation of optical and electronic devices and processing time has been examined. The designing method of image processing in static mode has been represented.

Utilizing advances in camera technology and electronic components while developing an optimized system architecture resulted in the development of a 2048 line by 2048 pixel by 10- bit high-speed image processor for digital fluoroscopy. The image processor is capable of image acquisition of progressive or interlaced 2 K images at 7.5 frames per second, as well as true progressive or interlaced 1 K by 1 K image acquisition at 30 frames per second. High- speed components, some specifically designed for the system, are applied to perform 2048 line by 2048 pixel image processing at the required speeds. A multimode high-resolution TV camera with a 2000 line Plumbicon tube is used and the input video samples at 40 MHz to provide 10-bit digital image data. High-speed BTL imaging busses, 2 K video RAMs, and multiple processors are used within the system architecture to provide required processing bandwidth. Images are compressed using 2 to 1 lossless compression, and optionally lossy compression, to increase system performance and provide a cost-effective method to achieve required image storage capacity. A high resolution monitor is used for image display and a standard digital interface for hardcopy is provided which is capable of 2 K image transfer. A VME based CPU with a real-time multitasking operating system is used for system control and image management. The system architecture provides multiple image processing busses designed to provide simultaneous acquisition, review, and hardcopy operations. Functionally, the system architecture supports image acquisition and digitization, real-time image processing and display, image storage to RAM, archival to a hard drive, and hardcopy of an image to a digital laser. In addition, interfaces wit the x-ray generator and user interface devices are provided. The system may be configured to support multiple fluoroscopic suites, display configurations, and user interface stations. The 2048 line by 2048 pixel high-speed image processor described has been implemented, released, and shipped. Systems being used for general fluoroscopy, interventional fluoroscopy, and angiographic procedures are producing clinical results. The results confirm the increased resolution, system performance, and multiprocessing capabilities not previously achieved in a cost effective digital image processor.© (1995) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Single vehicle roadway departures (SVRD) are serious vehicular accidents that may be avoided through the use of advanced technology. In this paper we briefly describe our Vehicle Lateral Position Measurement System designed to alert the driver of possible SVRD situations. We then describe our testing of the system under a contract awarded by the National Highway Traffic Safety Administration to Rockwell International.© (1995) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Image processing and recognition methods are useful in many fields. According to situation, different techniques are used. For many years, methods based on optical Fourier transformation were very popular. Image recognition was performed generally by using optical correlators. Correlation techniques were strongly developed especially for military applications, but in many cases (industrial, biological and biomedical applications) these techniques suffer from a number of limitations. For these reasons, methods based on extraction and statistical processing of image features are more useful. Set of features can be extracted directly from an image (features based on image morphology, image moments etc.) or from image transforms (Fourier, Radon, Hough, Sine, Cosine etc.). The Fourier transformation is one of the most important in image processing. It can be simply performed by using an optical diffractometer. It allows to build image descriptors independent on image translation and after processing independent on image rotation. Diffractometers are very convenient in industrial and medical applications. Digital image processing and recognition were strongly developed on powerful workstations, however these procedures can also be implemented in PCs with DSP microprocessor cards or in situations where digital transforms used for image processing can be simply implemented and do not consume a lot of time. The example of biomedical image recognition performed in an optical way, by using a diffractometer, and in a digital system with a CCD camera will be described here.

This paper presents signal processing techniques used in a new FLIR design to improve the minimum resolvable temperature, to increase the dynamic range, and to provide additional new features. The techniques include analog edge enhancement, low frequency amplitude limiting, digital filtering, automatic gain and level control, and electronic zoom. The system uses an eight- channel SPRITE detector and, as a result, all analog processing must be replicated in each channel. This design uses adequate analog processing to allow the use of eight-bit scan conversion and digital processing without sacrifice of dynamic range. The result is a highly effective tradeoff between function and cost.

The problem of recognizing a given object in a scene is of particular interest in the field of industrial automation. Holotags can be used for automated identification in industrial environments. The extraction of coded information written in holotags, using processing techniques, implies different operations which begin by image acquisition using a CCD device followed by processing, to decode and validate the binary coded information. The paper describes the image processing software that was implemented to extract information from coded holotags and proved to solve the practical problems with acceptable performance.

Analog VLSI Implementation of artificial neural networks for vision applications is studied in this paper. A locally connected, regular structure for 2D convolution is proposed for high speed image processing. First, a mathematical formulation is given to map the convolution to analog computing domain. Then a system level design is performed together with the design and the testing of the basic building blocks. Experiments using real laboratory images are conducted.© (1994) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

The program PHAUST (Photogrammetrische Auswertestation fuer digitale Bilder) is a photogrammetric evaluation system for digital images. The applications of this program are the digitization of analog images, the processing of digital images, and the single or multi- image rectification in digital images. After a description of the system and an explanation of the single modules, the paper describes the possible applications of PHAUST, including some examples.© (1994) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Some hybrid (analogue—digital) optoelectronic image processing system are considerecL Optical correlation processors with the pro— grammable trans-Formation core forming are proposed. Optical processor operation in the matrix—vector multiplication mode is discussed. A comparision analysis of optical image processors and digital universal and matrix calculators is carried outS.

In this paper, we shall present a new method for generating enhanced images with a desired gray value distribution at real-time speeds. Unlike most conventional methods of image enhancement, the proposed approach allows the user to specify the gray value distribution of the enhanced image. We shall first discuss a generic model of signal transformation, and implement it in an off-the-shelf hardware for analog to digital conversion of image signals. Nonidealities of this hardware will also be considered. Simplifications of this general model are presented to gain computational speeds under 10 ms. The method also provides a range of permissible gray values that can be selected by the user. If the selections are outside the permissible range, the method provides guidelines to reconfigure the imaging conditions to generate the desired enhanced image. An analysis of measurement and quantization errors with constant and gaussian distributions of errors is also considered. Extensive experiments on a set of industrial parts for character recognition are conducted.

The technical approach and recent experimental results for the acousto-optic time- and space- integrating real-time SAR image formation processor program are reported. The concept overcomes the size and power consumption limitations of electronic approaches by using compact, rugged, and low-power analog optical signal processing techniques for the most computationally taxing portions of the SAR imaging problem. Flexibility and performance are maintained by the use of digital electronics for the critical low-complexity filter generation and output image processing functions. The results include a demonstration of the processor's ability to perform high-resolution spotlight-mode SAR imaging by simultaneously compensating for range migration and range/azimuth coupling in the analog optical domain, thereby avoiding a highly power-consuming digital interpolation or reformatting operation usually required in all-electronic approaches.

The Laptop Imagery Transmission System (LITE) integrates various imaging sensors, both analog and digital. Analog imaging sensors include still video and 8 mm video. Digital imaging sensors include the Kodak Digital Camera System. These sensors (with imagery of various sizes up to 1024 X 1024 pixels) provide significant color imagery in 24-bit color or 8-bit black and white.© (1993) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Interactive digital image processing package (IDIPP) is a general purpose image processing package built upon two requirements: user friendliness and easy integration of new processing modules. To satisfy these requirements, a special graphical user interface (GUI), made of elements easily manipulated through a set of high level tools, was designed. The availability of these tools allows the addition of new processing modules with very little effort. Around this interface, several image processing modules have been developed. This paper describes the user interface structure and the developed image processing modules.© (1993) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

This is a description of the SAAB Missiles image processing laboratory. At present four persons can work simultaneously with advanced image processing and it is easy to expand the system. A lot of functions can be realized in real-time since it consists of 21 image processing boards. It is the combination of the extremely fast image processing and the multi-user function that makes this system unique.© (1993) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Distributed office systems employ the image exchange facilities such as image input/output, handling a softcopy, image filing service and so on. This paper presents a study of the segmented image exchange approach suit well for block based image coding and image processing schemes. From the result of the feasibility study, the segmented image formatting criterion provides a well-designed quantization-table set for DCT coding scheme. The 400 spi full-tone image coding simulation of the segmented adaptive quantization for DCT coding shows the better SNR and the perceptually better image quality than that of the conventional scheme. To select the quantization-table in the decoder, this scheme requires 3-bit header for every coded block. However, it enables another image processing features in a reconstructed image.© (1992) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

The proposed architecture is a logical design specifically for image processing and other related computations. The design is a hybrid electro-optical concept consisting of three tightly coupled components: a spatial configuration processor (the optical analog portion), a weighting processor (digital), and an accumulation processor (digital). The systolic flow of data and image processing operations are directed by a control buffer and pipelined to each of the three processing components. The image processing operations are defined by an image algebra developed by the University of Florida. The algebra is capable of describing all common image-to-image transformations. The merit of this architectural design is how elegantly it handles the natural decomposition of algebraic functions into spatially distributed, point-wise operations. The effect of this particular decomposition allows convolution type operations to be computed strictly as a function of the number of elements in the template (mask, filter, etc.) instead of the number of picture elements in the image. Thus, a substantial increase in throughput is realized. The logical architecture may take any number of physical forms. While a hybrid electro-optical implementation is of primary interest, the benefits and design issues of an all digital implementation are also discussed. The potential utility of this architectural design lies in its ability to control all the arithmetic and logic operations of the image algebra's generalized matrix product. This is the most powerful fundamental formulation in the algebra, thus allowing a wide range of applications.

Infrared imagery of 512 X 512 pixels was processed with 128 X 128 arrays by computer simulations of optical correlation. Pyramidal processing using binary phase-only filters was used to process an entire image in parallel at different resolutions. Morphological processing was used to create an image pyramid so that only binary processing was used. The descent policy (processing path to a different level of the pyramid) for optical processing was found to be simpler than that of template matching in digital image processing. Results showed that approximate indications of whether an object is present in a scene can be determined quickly. Further processing generally revealed more precise information. Furthermore, in-class objects present within an image but not exactly matching the filter did not necessarily produce more precise information upon further processing. The termination level of the processing technique is nontrivial and may not be the highest resolution level in some cases.

This paper describes a new parallel image processing system called "NOVI-II HiPIPE" that manipulates super high definition (SHD) images. This system consists of 128 processing nodes, 4 I/O nodes for image storage, and 4 I/O nodes for SHD still image display. It provides extremely high computational power and high throughput rates for SHD image processing. This system can transfer image data to the newly developed Super Frame Memory (Super FM) for SHD moving image display via the Ultra-network. A new Vector Processor (VP), which has a peak performance of 100 MFlops, is developed and the performance of an engineering sample version of this chip is checked. One VP will be installed in each processing node as the DSP engine and a total system performance of 12.8 Gflops (peak performance) is expected from NOVI-II HiPIPE. Using this system, various image coding schemes and computer graphics techniques can be easily explored in spite of the huge amount of data that must be treated.

Early stages of digital image processing reguire suitable application of the preprocessing operators. This paper concerns software tools developed to design the custom filters used on the initial processing stage in digital image analysis system. Subject terms: image processing convolution Laplacian of Gaussian median morphology.© (1991) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.