11 results on '"Cheng, Yuhua"'
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2. A low-power, area-efficient all-digital delay-locked loop for DDR3 SDRAM controller
3. A leakage current suppression technique for cascade SRAM array in 55 nm CMOS technology
4. A 6-bit 2 GS/s ADC in 65 nm CMOS
5. An optimized UWB correlator design with the consideration of the impacts from the ESD protection devices
6. A low power and small area all digital delay-locked loop based on ring oscillator architecture
7. Co-design of ESD protection and UWB RF front-end ICs
8. An optimized UWB correlator design with the consideration of the impacts from the ESD protection devices
9. A low power and small area all digital delay-locked loop based on ring oscillator architecture
10. Doping profile modification approach of the optimization of HfO based resistive switching device by inserting AlO layer.
11. Doping profile modification approach of the optimization of HfOxbased resistive switching device by inserting AlOxlayer
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