1. 基于MIPS指令集的流水线CPU设计与实现.
- Author
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刘秋菊, 张光照, and 王仲英
- Abstract
In this paper, a design method of CPU was proposed, the instruction set of the CPU contained 15 items of MIPS instruction set, and the basic method of five step pipeline CPU design was used. Analyses were conducted on the logic structure of the pipeline CPU and the processing of the instruction. This paper also gave design and realization of stage IF, stage ID, stage EX, stage MEM and stage WB. About the pipeline-related problems, the paper adopted Bubble and Forwarding technologies to eliminate it. The tests on the FPGA platform show that the scheme meets the design requirements. [ABSTRACT FROM AUTHOR]
- Published
- 2017