54 results on '"Chattopadhyay, Sanatan"'
Search Results
2. Design of a Fault-Tolerant Conditional Sum Adder
3. Design Optimization of a Wide Band MEMS Resonator for Efficient Energy Harvesting
4. Implementation of a New Offset Generator Block for the Low-Voltage, Low-Power Self Biased Threshold Voltage Extractor Circuit
5. Effect of Malicious Hardware Logic on Circuit Reliability
6. Reusable and Scalable Verification Environment for Memory Controllers
7. A Modified Scheme for Simultaneous Reduction of Test Data Volume and Testing Power
8. Comparison of OpAmp Based and Comparator Based Switched Capacitor Filter
9. ILP Based Approach for Input Vector Controlled (IVC) Toggle Maximization in Combinational Circuits
10. Design of Content Addressable Memory Architecture Using Carbon Nanotube Field Effect Transistors
11. Arithmetic Algorithms for Ternary Number System
12. Design of High Speed Vedic Multiplier for Decimal Number System
13. Ultra-Low Power Sub-threshold SRAM Cell Design to Improve Read Static Noise Margin
14. An Efficient Test Design for CMPs Cache Coherence Realizing MESI Protocol
15. A High Speed, Low Jitter and Fast Acquisition CMOS Phase Frequency Detector for Charge Pump PLL
16. Workload Driven Power Domain Partitioning
17. An Efficient High Speed Implementation of Flexible Characteristic-2 Multipliers on FPGAs
18. SOI MEMS Based Over-Sampling Accelerometer Design with ΔΣ Output
19. Low Complexity Encoder for Crosstalk Reduction in RLC Modeled Interconnects
20. Design and Implementation of a Linear Feedback Shift Register Interleaver for Turbo Decoding
21. Power Problems in VLSI Circuit Testing
22. Reversible Circuits: Recent Accomplishments and Future Challenges for an Emerging Technology : (Invited Paper)
23. Implementation of Gating Technique with Modified Scan Flip-Flop for Low Power Testing of VLSI Chips
24. Translation Validation for PRES+ Models of Parallel Behaviours via an FSMD Equivalence Checker
25. Analog Performance Analysis of Dual-k Spacer Based Underlap FinFET
26. Post-bond Stack Testing for 3D Stacked IC
27. A Novel Approach to Voltage-Drop Aware Placement in Large SoCs in Advanced Technology Nodes
28. Particle Swarm Optimization Based BIST Design for Memory Cores in Mesh Based Network-on-Chip
29. Test Data Compression for NoC Based SoCs Using Binary Arithmetic Operations
30. An Efficient Technique for Longest Prefix Matching in Network Routers
31. VLSI Architecture for Bit Parallel Systolic Multipliers for Special Class of GF(2 m )Using Dual Bases
32. A Fast FPGA Based Architecture for Sobel Edge Detection
33. A Synthesis Method for Quaternary Quantum Logic Circuits
34. On the Compact Designs of Low Power Reversible Decoders and Sequential Circuits
35. A 4 × 20 Gb/s 29-1 PRBS Generator for Testing a High-Speed DAC in 90nm CMOS Technology
36. A Faster Hierarchical Balanced Bipartitioner for VLSI Floorplans Using Monotone Staircase Cuts
37. Delay Uncertainty in Single- and Multi-Wall Carbon Nanotube Interconnects
38. Speech Processor Design for Cochlear Implants
39. Power Modeling of Power Gated FSM and Its Low Power Realization by Simultaneous Partitioning and State Encoding Using Genetic Algorithm
40. High-Speed Unified Elliptic Curve Cryptosystem on FPGAs Using Binary Huff Curves
41. Design of Push-Pull Dynamic Leaker Circuit for a Low Power Embedded Voltage Regulator
42. An Efficient High Frequency and Low Power Analog Multiplier in Current Domain
43. Efficient FPGA Implementation of Montgomery Multiplier Using DSP Blocks
44. Impact of Dummy Poly on the Process-Induced Mechanical Stress Enhanced Circuit Performance
45. Design and Implementation of Efficient Vedic Multiplier Using Reversible Logic
46. Design of Combinational and Sequential Circuits Using Novel Feedthrough Logic
47. A Novel Symbol Estimation Algorithm for LTE Standard
48. A Photonic Network on Chip with CDMA Links
49. Routing in NoC on Diametrical 2D Mesh Architecture
50. Simulation Study of an Ultra Thin Body Silicon On Insulator Tunnel Field Effect Transistor
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.