32 results on '"Reconfigurable hardware"'
Search Results
2. An architecture for the efficient implementation of compressive sampling reconstruction algorithms in reconfigurable hardware.
3. Optimizing coarse-grain reconfigurable hardware utilization through multiprocessing: an H.264/AVC decoder example.
4. Implementation of Karp-Rabin string matching algorithm in reconfigurable hardware for network intrusion prevention system.
5. Implementing a shadow detection algorithm for synthetic vision systems in reconfigurable hardware.
6. Reconfigurable hardware for an augmented reality application.
7. Exploiting metastability and thermal noise to build a reconfigurable hardware random number generator.
8. Reconfigurable hardware/software cosimulation platform for media processor.
9. Intelligent based reconfigurable hardware design systems.
10. Applying reconfigurable hardware to the analysis of multispectral and hyperspectral imagery.
11. Reconfigurable hardware mapping for accelerometer-based navigation applications.
12. Design and implementation of a high-level image processing machine using reconfigurable hardware.
13. Reconfigurable-hardware-based digital signal processing for wireless communications.
14. Using reconfigurable hardware to customize memory hierarchies.
15. Reconfigurable hardware accelerator for embedded DSP.
16. FFT on reconfigurable hardware.
17. Generating Gaussian error in lattice cryptography with quantum random number generator.
18. Wearable biosignal acquisition system for decision aid.
19. Field tests of a distributed acoustic sensing system based on temporal adaptive matched filtering of phase-sensitive OTDR signals.
20. Optically Reconfigurable Processors.
21. Network digital media refactoring resource dynamic allocation method.
22. An FPGA-based edge computing and accelerating platform for fast diabetic retinopathy diagnosis.
23. The on-ground data reduction and calibration pipeline for SO/PHI-HRT.
24. Agile design of DCT circuit on soft CGRA.
25. High assurance state machine microprocessor concept: Aberdeen Architecture.
26. Object-oriented hardware-software model based on novel CII concept.
27. Volumetric visualization algorithm development for an FPGA-based custom computing machine.
28. Unsupervised machine learning based SEM image denoising for robust contour detection.
29. An efficient mixed-signal dielectric-partitioning model of liquid crystals based shielded coplanar waveguide for electronically reconfigurable delay lines design.
30. SEM image denoising with unsupervised machine learning for better defect inspection and metrology.
31. Flow cytometry visualization and real-time processing with a CMOS SPAD array and high-speed hardware implementation algorithm.
32. A flexible and heterogeneous framework for scientific image data processing on-board the Solar Orbiter PHI instrument.
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.