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This paper describes characteristics of normally-off mode GaN MISFETs fabricated on free-standing GaN substrates with high drain current Idss and specific low leakage current between adjacent devices. Nitrogen ion implantation isolation processes were adopted to fabricate isolation regions in self-aligned GaN MISFETs for the first time. Maximum drain current of 98 mA/mm, maximum trans conductance of 10 mS/mm and threshold voltage of +0.4 V were obtained for the devices. The leakage current between adjacent devices was low, i.e., in the range of 10-6 mA/mm, which is three orders of magnitude lower than those on sapphire substrates. These supreme results indicate a definite availability of normally-off self-aligned GaN MISFETs for power switching device applications. (© 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim) [ABSTRACT FROM AUTHOR]

This paper presents first results of a new high performance enhancement-mode (E-mode) gallium nitride (GaN) based metal-oxide semiconductor high electron mobility transistor (MOS-HEMT) that employs an ultrathin 3 nm aluminium gallium nitride (Al0.25G0.75aN) barrier layer and relies on an induced two dimensional electron gas (2DEG) for operation. Devices have been demonstrated on both sapphire and silicon substrates. Single finger devices on a sapphire substrate were fabricated using 10 nm and 20 nm, and on a silicon substrate using 30 nm of plasma enhanced chemical vapour-deposited (PECVD) silicon dioxide (SiO2) as the gate dielectric. They demonstrated threshold voltages of +3 V, +2 V, +0.8 V and very high maximum drain currents of over 620 mA/mm, 550 mA/mm and 450 mA/mm, respectively. These results show that the proposed device concept can be a building block for future power electronic devices. (© 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim) [ABSTRACT FROM AUTHOR]

This paper describes normally-off GaN MOSFETs with high-k dielectric CeO2 films made by ion implantation. Ion implantation process reduces sheet and contact resistances of source and drain regions of this device. To obtain high Idss and gmmax, high-k dielectric CeO2 was used as gate oxide films for GaN MOSFETs for the first time. Nitrogen ion implantation isolation processes were also adopted to fabricate isolation region. Normally-off GaN MOSFETs with Idss of 350 mA/mm, gmmax of 40 mS/mm and threshold voltage of +0.5 V were obtained. The high Idss and normally-off mode show the potential and advantages of GaN MOSFETs for high voltage operations. (© 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim) [ABSTRACT FROM AUTHOR]

We demonstrate MISFETs based on GaN p-epilayers with ion-implanted source/drain regions and atomic layer deposited (ALD) gate dielectrics of Al2O3 and HfO2. The fabrication technology is similar to that used for silicon MOSFETs. We find that there are significant shifts (of order 1 V) in threshold voltage between FETs produced with Al2O3 and HfO2 films, enabling depletion mode and enhancement mode device operation for the same substrate doping. The GaN MISFETs obtained maximum drain current of 580mA/mm and an extrinsic transconductance as high as 160 mS/mm. To the authors' knowledge, the transconductance achieved represents record performance for ion-implanted MISFETs of GaN without heterostructure barriers. (© 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim) [ABSTRACT FROM AUTHOR]