1. Manufacturing 100-µm-thick silicon solar cells with efficiencies greater than 20% in a pilot production line
- Author
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Christophe Ballif, S. Seren, Elisa Tonelli, Pierre Saint-Cast, Renate Horbelt, Bernd Weber, Stephen Devenport, Stefan W. Glunz, Jan Ebser, Wolfgang Oswald, Verena Mertens, Chiara Busto, F Ferrazza, Tabitha Ballmann, Christian Schmiga, Barbara Terheiden, Maximilian Scherff, Michael Rauer, Giso Hahn, D.J. Morrison, Federico Grasso, Jonas Geissbuehler, Jörg Müller, Yvonne Schiele, Max Koentopp, Zachary C. Holman, Antoine Descoeudres, Danilo Antonelli, Silvia Martin de Nicolas, and Stefaan De Wolf
- Subjects
Materials science ,Silicon ,chemistry.chemical_element ,02 engineering and technology ,01 natural sciences ,7. Clean energy ,Monocrystalline silicon ,0103 physical sciences ,Materials Chemistry ,Wafer ,Crystalline silicon ,Electrical and Electronic Engineering ,010302 applied physics ,business.industry ,Energy conversion efficiency ,Photovoltaic system ,Surfaces and Interfaces ,021001 nanoscience & nanotechnology ,Condensed Matter Physics ,Surfaces, Coatings and Films ,Electronic, Optical and Magnetic Materials ,Solar cell efficiency ,chemistry ,Wafering ,Optoelectronics ,0210 nano-technology ,business - Abstract
Reducing wafer thickness while increasing power conversion efficiency is the most effective way to reduce cost per Watt of a silicon photovoltaic module. Within the European project 20 percent efficiency on less than 100-mu m-thick, industrially feasible crystalline silicon solar cells ("20pl mu s"), we study the whole process chain for thin wafers, from wafering to module integration and life-cycle analysis. We investigate three different solar cell fabrication routes, categorized according to the temperature of the junction formation process and the wafer doping type: p-type silicon high temperature, n-type silicon high temperature and n-type silicon low temperature. For each route, an efficiency of 19.5% or greater is achieved on wafers less than 100 mu m thick, with a maximum efficiency of 21.1% on an 80-mu m-thick wafer. The n-type high temperature route is then transferred to a pilot production line, and a median solar cell efficiency of 20.0% is demonstrated on 100-mu m-thick wafers. (C) 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim
- Published
- 2014
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