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In the context of the CERN EP R&D on monolithic sensors and the ALICE ITS3 upgrade, the Tower Partners Semiconductor Co (TPSCo) 65 nm process has been qualified for use in high energy physics, and adopted for the ALICE ITS3 upgrade. An Analog Pixel Test Structure (APTS) featuring fast per pixel operational-amplifier-based buffering for a small matrix of four by four pixels, with a sensor with a small collection electrode and a very non-uniform electric field, was designed to allow detailed characterization of the pixel performance in this technology. Several variants of this chip with different pixel designs have been characterized with a 120 GeV / c positive hadron beam. This result indicates that the APTS-OA prototype variants with the best performance achieve a time resolution of 63 ps with a detection efficiency exceeding 99% and a spatial resolution of 2 μm, highlighting the potential of TPSCo 65 nm CMOS imaging technology for high-energy physics and other fields requiring precise time measurement, high detection efficiency, and excellent spatial resolution. [ABSTRACT FROM AUTHOR]

Analogue test structures were fabricated using the Tower Partners Semiconductor Co. CMOS 65 nm ISC process. The purpose was to characterize and qualify this process and to optimize the sensor for the next generation of Monolithic Active Pixels Sensors for high-energy physics. The technology was explored in several variants which differed by: doping levels, pixel geometries and pixel pitches (10–25 μ m). These variants have been tested following exposure to varying levels of irradiation up to 3 MGy and 1 0 16 1 MeV n eq cm−2. Here the results from prototypes that feature direct analogue output of a 4 × 4 pixel matrix are reported, allowing the systematic and detailed study of charge collection properties. Measurements were taken both using 55Fe X-ray sources and in beam tests using minimum ionizing particles. The results not only demonstrate the feasibility of using this technology for particle detection but also serve as a reference for future applications and optimizations. [ABSTRACT FROM AUTHOR]

Monolithic sensors, and CMOS sensors in particular, revolutionized visible imaging, and will be widely applied in high energy physics, but with different requirements and implementations than sensors for visible light (Snoeys, 2023). [ABSTRACT FROM AUTHOR]

The correlation of molecular neuroimaging and behavior studies in preclinical PET imaging is of major interest to unlock progress in the understanding of brain processes and assess the validity of preclinical studies in drug development. However, fully achieving this ambition requires performing molecular images of awake and freely moving animals, whereas most of the preclinical imaging procedures are currently performed under anesthesia. To overcome this issue, the MAPSSIC project aims to develop a pixelated intracerebral probe to be implanted into awake and freely moving rats. The aforementioned probe relies on IMIC (Imageur Moléculaire Intra Cérébral), a Monolithic Active Pixel Sensor (MAPS) prototype set to directly detect positrons. The IMIC sensors were produced in 5 different configurations. Measurements using a 204Tl source showed that the sensor parameters can be optimized to boost its performance allowing to increase the sensitivity and reduce the average cluster size. In addition, comparisons between sensor configurations show a clear gain provided by the introduction of CMOS process modifications. Finally, the choice of the optimal sensor configuration will depend on the expected in vivo conditions. [ABSTRACT FROM AUTHOR]

Monolithic active pixel sensors (MAPS) produced in a 65 nm CMOS imaging technology are being investigated for applications in particle physics. The MAPS design has a small collection electrode characterized by an input capacitance of ∼ fF, granting a high signal-to-noise ratio and low power consumption. Additionally, the 65 nm CMOS imaging technology brings a reduction in material budget and improved logic density of the readout circuitry, compared to previously studied technologies. Given these features, this technology was chosen by the TANGERINE project to develop the next generation of silicon pixel sensors. The sensor design targets temporal and spatial resolutions compatible with the requirements for a vertex detector at future lepton colliders. Simulations and test-beam characterization of technology demonstrators have been carried out in close collaboration with the CERN EP R&D program and the ALICE ITS3 upgrade. TCAD device simulations using generic doping profiles and Monte Carlo simulations have been used to build an understanding of the technology and predict the performance parameters of the sensor. Technology demonstrators of a 65 nm CMOS MAPS with a small collection electrode have been characterized in laboratory and test-beam facilities by studying performance parameters such as cluster size, charge collection, and efficiency. This work compares simulation results to test-beam data. The experimental results establish this technology as a promising candidate for a vertex detector at future lepton colliders and give valuable information for improving the simulation approach. [ABSTRACT FROM AUTHOR]

Silicon Photomultipliers (SiPMs) are state-of-the-art photon detectors used in particle physics, medical imaging, and beyond. They are sensitive to individual photons in the optical wavelength regime and achieve time resolutions of a few tens of picoseconds, which makes them interesting candidates for timing detectors in tracking systems for particle physics experiments. The Geiger discharges triggered in the sensitive elements of a SiPM, Single-Photon Avalanche Diodes (SPADs), yield signal amplitudes independent of the energy deposited by a photon or ionizing particle. This intrinsically digital nature of the signal motivates its digitization already on SPAD level. A digital SiPM (dSiPM) was designed at Deutsches Elektronen Synchrotron (DESY), combining a SPAD array with embedded CMOS circuitry for on-chip signal processing. A key feature of the DESY dSiPM is its capability to provide hit-position information on pixel level, and one hit time stamp per quadrant at a 3 MHz readout-frame rate. The pixels comprise four SPADs and have a pitch of about 70 μm. The four time stamps are provided by 12 bit Time-to-Digital Converters (TDCs) with a resolution better than 100 ps. The chip was characterized in the laboratory to determine dark count rate, breakdown voltage, and TDC characteristics. Test-beam measurements are analyzed to assess the DESY dSiPMs performance in the context of a 4D-tracking applications. The results demonstrate a spatial hit resolution on a pixel level, a minimum-ionizing particle detection efficiency of about 30 % and a time resolution in the order of 50 ps. [ABSTRACT FROM AUTHOR]

Abstract Monolithic active pixel sensors manufactured in commercial CMOS technologies revolutionized imaging for consumer applications and are now moving into high energy physics: they have been adopted in the STAR and the ALICE experiments, and are being considered for the most demanding applications like the upgrade of the ATLAS pixel detector. These devices offer integration of sensor and readout in a single chip and low material budget. Deep submicron commercial CMOS technologies offer high speed and density, leading to high bandwidth capability and good spatial resolution for monolithic sensors, and volume production capability at low cost, important for large systems. This paper tries to give an overview. [ABSTRACT FROM AUTHOR]

CMOS cameras revolutionized the visible imaging world, and now also move into other fields. After years of intensive research with significant progress and introduction in a few experiments, monolithic active pixel sensors integrating sensor matrix and readout in one piece of silicon are considered for wider application in high energy physics. Detailed requirements and implementation of CMOS sensors in high energy physics differ from those for visible light. This paper tries to give an overview. • Monolithic Active Pixel Sensors (MAPS) will be used widely in High Energy Physics (HEP). • CMOS MAPS for HEP greatly profit from the progress of CMOS imagers for visible light. • Tolerance up to several 1016 1 MeV n e q /cm 2 and several MGy is within reach. • Design for yield and lower power densities will enable stitching and wafer stacking. • Efficient volume test, assembly, and mounting will enable large area detectors. • Experts in digital-on-top design, verification and TCAD are essential for MAPS in HEP. • Large area pixel sensors are enabling devices for many cutting edge research fields. • MAPS production volume for HEP should allow access to the most advanced technologies. • Our HEP community can have an impact on society through its MAPS development. [ABSTRACT FROM AUTHOR]

Within the ATTRACT FASTPIX project, a monolithic pixel sensor demonstrator chip was developed in a modified 180 nm CMOS imaging process technology, targeting sub-nanosecond timing precision for single ionizing particles. It features a small collection electrode design on a 25 μ m-thick epitaxial layer and contains 32 mini matrices of 68 hexagonal pixels each, with pixel pitches ranging from 8.66 to 20 μ m. Four pixels are transmitting an analog output signal and 64 are transmitting binary hit information. Various design variations are explored, aiming at accelerating the charge collection and making the timing of the charge collection more uniform over the pixel area. Signal treatment of the analog waveforms, as well as reconstruction of digital position, time and charge information, is carried out off-chip. This contribution introduces the design of the sensor and readout system and presents performance results for various pixel designs achieved in recent test-beam measurements with external tracking and timing reference detectors. A time resolution below 150 ps is obtained at full efficiency for all pixel pitches. [ABSTRACT FROM AUTHOR]

Abstract The emergence of the Time Projection Chamber concept in 1974 is an important chapter in the history of particle detection advances. Recalling an era very different from today, I describe the flow of events from the moment of inspiration through prototypes to realization as a major detector for the Positron–Electron Project (PEP) at SLAC. The sense of excitement in bringing forth a genuine paradigm shift carried the collaboration forward, through struggles, victories, defeats and exhaustion, yet ultimately leading to success. [ABSTRACT FROM AUTHOR]

Hybrid pixel detectors were developed to meet the requirements for tracking in the inner layers at the LHC experiments. With low input capacitance per channel (10–100 fF) it is relatively straightforward to design pulse processing readout electronics with input referred noise of ∼ 100 e-rms and pulse shaping times consistent with tagging of events to a single LHC bunch crossing providing clean ‘images’ of the ionising tracks generated. In the Medipix Collaborations the same concept has been adapted to provide practically noise hit free imaging in a wide range of applications. This paper reports on the development of three generations of readout ASICs. Two distinctive streams of development can be identified: the Medipix ASICs which integrate data from multiple hits on a pixel and provide the images in the form of frames and the Timepix ASICs who aim to send as much information about individual interactions as possible off-chip for further processing. One outstanding circumstance in the use of these devices has been their numerous successful applications, thanks to a large and active community of developers and users. That process has even permitted new developments for detectors for High Energy Physics. This paper reviews the ASICs themselves and details some of the many applications. [ABSTRACT FROM AUTHOR]

A new generation of Monolithic Active Pixel Sensors (MAPS), produced in a 65 nm CMOS imaging process, promises higher densities of on-chip circuits and, for a given pixel size, more sophisticated in-pixel logic compared to larger feature size processes. MAPS are a cost-effective alternative to hybrid pixel sensors since flip-chip bonding is not required. In addition, they allow for significant reductions of the material budget of detector systems, due to the smaller physical thicknesses of the active sensor and the absence of a separate readout chip. The TANGERINE project develops a sensor suitable for future Higgs factories as well as for a beam telescope to be used at beam-test facilities. The sensors will have small collection electrodes (order of µm) to maximize the signal-to-noise ratio, which makes it possible to minimize power dissipation in the circuitry. The first batch of test chips, featuring full front-end amplifiers with Krummenacher feedback, was produced and tested at the Mainzer Mikrotron (MAMI) at the end of 2021. MAMI provides an electron beam with currents up to 100 µA and an energy of 855 MeV. The analog output signal of the test chips was recorded with a high bandwidth oscilloscope and used to study the charge-sensitive amplifier of the chips in terms of waveform analysis. A beam telescope was used as a reference system to allow for track-based analysis of the recorded data. [ABSTRACT FROM AUTHOR]

Neutron flux measure systems perform an important role in both nuclear power plants and thermonuclear reactors. However, strong neutron sources are necessary to test these modern neutron flux monitoring systems. Due to the dangerous nature of neutron radiation, developers opt for simulated neutron signals instead. This paper details the design of a random pulse signal generator capable of perfectly reproducing high count rate neutron signals (up to 109 counts per-second) for the purpose of testing flux monitoring systems in-lab without any radiation source involved. Fully digitalized waveforms were created within FPGA to assure that important elements of neutron signal, including pulse shape, pulse amplitude spectrum, count rate, and add-on white noise intensity were all able to be accessed and changed separately over the PCI&PCIe bus. A Labview-based Human Machine Interface (HMI) was also built to show all of these aspects and allowed real-time modifications. When compared to other signal generators, our signal generator has a significantly longer non-repetitive waveform and higher performance capability. This made it a reliable way to diagnose flux measurement systems by comparing count rates set on the signal generator to record results. [ABSTRACT FROM AUTHOR]

The Tangerine project aims to develop new state-of-the-art high-precision silicon detectors. Part of the project has the goal of developing a monolithic active pixel sensor using a novel 65 nm CMOS imaging process, with a small collection electrode. This is the first application of this process in particle physics, and it is of great interest as it allows for an increased logic density and reduced power consumption and material budget compared to other processes. The process is envisioned to be used in for example the next ALICE inner tracker upgrade, and in experiments at the electron-ion collider. The initial goal of the three-year Tangerine project is to develop and test a sensor in a 65 nm CMOS imaging process that can be used in test beam telescopes at DESY, providing excellent spatial resolution and high time resolution, and thus demonstrating the capabilities of the process. The project covers all aspects of sensor R&D, from electronics and sensor design using simulations, to prototype test chip characterisation in labs and at test beams. The sensor design simulations are performed by using a powerful combination of detailed electric field simulations using technology computer-aided design and high-statistics Monte Carlo simulations using the Allpix 2 framework. A first prototype test chip in the process has been designed and produced, and successfully operated and tested both in labs and at test beams. [ABSTRACT FROM AUTHOR]

Abstract: This paper presents the results of the characterisation of a thin fully depleted pixel sensor manufactured in SOI technology on high-resistivity substrate with high momentum charged particles. The sensor is thinned to and a thin phosphor layer contact is implanted on the back-plane. Its response is compared to that of thick sensors of same design in terms of signal and noise, detection efficiency and single point resolution based on data collected with 300GeV pions at the CERN SPS. We observe that the charge collected and the signal-to-noise ratio scale according to the estimated thickness of the sensitive volume and the efficiency and single point resolution of the thinned chip are comparable to those measured for the thick sensors. [Copyright &y& Elsevier]

Abstract: This paper presents the results of the characterisation of a pixel sensor manufactured in SOI technology integrated on a high-resistivity substrate, and featuring several pixel cell layouts for charge collection optimisation. The sensor is tested with short IR laser pulses, X-rays and 200GeV pions. We report results on charge collection, particle detection efficiency and single point resolution. [Copyright &y& Elsevier]

Abstract: Modulated energetic electrons have been observed in space plasmas, bunched up to frequencies of several MHz, due to the phenomenon of wave–particle interactions. The technique that has been the mainstay of on-board bunching detection has so far been implemented using complex circuitry, due to the high processing speed required. In this work, a novel approach to the Buncher technique has been developed, and has been implemented in a Field Programmable Gate Array (FPGA). Improvements including much higher sampling and processing speeds have been achieved, as well as a vast increase in the number of channels that can be processed simultaneously, suggesting that the FPGA technology may be much better suited as the implementation platform compared to microprocessors. As a case study, we have used the Sussex CORrelating Electron Spectrograph (CORES), a multi-channel particle correlator set for launch to the International Space Station in late 2010. [ABSTRACT FROM AUTHOR]

Abstract: This paper presents the design and test results of a prototype monolithic pixel sensor manufactured in deep-submicron fully depleted Silicon-On-Insulator (SOI) CMOS technology. In the SOI technology, a thin layer of integrated electronics is insulated from a (high-resistivity) silicon substrate by a buried oxide. Vias etched through the oxide allow to contact the substrate from the electronics layer, so that pixel implants can be created and a reverse bias can be applied. The prototype chip, manufactured in OKI SOI process, features both analog and digital pixels on a pitch. Results of tests performed with an infrared laser and 1.35GeV electrons and a first assessment of the effect of ionising and non-ionising doses are discussed. [Copyright &y& Elsevier]

A Hadron Blind Detector (HBD) is proposed as upgrade of the PHENIX detector at RHIC, BNL. The HBD will allow the measurement of low-mass e+e− pairs from the decay of the light vector mesons ρ,ω,φ and the low-mass continuum- in Au–Au collisions at √ of sNN=200 GeV. From general considerations, the HBD has to identify electrons with a high efficiency (>90%) and with a double hit resolution better than 90%, it must have a pion rejection factor of at least 200 and a radiation budget of the order of 1% of a radiation length. The choice that emerges is a windowless Cherenkov detector, operated with a CF4 based gas mixture in a special proximity focus configuration with a CsI cathode evaporated on GEMs. [Copyright &y& Elsevier]

New applications for single particle and photon detection in many fields require both large area imaging performance and precise time information on each detected particle. Moreover, a very high data acquisition rate is desirable for most applications and eventually the detection and imaging of more than one particle arriving within a microsecond is required. Commercial CCD systems lack the timing information whereas other electronic microchannel plate (MCP) read-out schemes usually suffer from a low acquisition rate and complicated and sometimes costly read-out electronics. We have designed and tested a complete imaging system consisting of an MCP position readout with helical wire delay-lines, single-unit amplifier box and PC-controlled time-to-digital converter (TDC) readout. The system is very flexible and can detect and analyse position and timing information at single particle rates beyond 1 MHz. Alternatively, multi-hit events can be collected and analysed at about 20 kHz rate. We discuss the advantages and applications of this technique and then focus on the detector''s ability to detect and analyse multiple hits. [Copyright &y& Elsevier]

Abstract: This letter presents the design of a monolithic pixel sensor with pixels in fully depleted SOI technology and first results of its characterisation. The response of the chip to charged particles has been studied on the beam at the LBNL ALS. [Copyright &y& Elsevier]

In the ATTRACT project FASTPIX we investigate monolithic pixel sensors with small collection electrodes in CMOS technologies for fast signal collection and precise timing in the sub-nanosecond range. Deep submicron CMOS technologies allow tiny, sub-femtofarad collection electrodes, and large signal-to-noise ratios, essential for very precise timing. However, complex in-pixel circuits require some area, and one of the key limitations for precise timing is the longer drift time of signal charge generated near the pixel borders. Laying out the collection electrodes on a hexagonal grid and reducing the pixel pitch minimize the maximum distance from the pixel border to the collection electrode. The electric field optimized with TCAD simulations pulls the signal charge away from the pixel border towards the collection electrode as fast as possible. This also reduces charge sharing and maximizes the seed pixel signal hence reducing time-walk effects. Here the hexagonal geometry also contributes by limiting charge sharing at the pixel corners to only three pixels instead of four. We reach pixel pitches down to about 8. 7 μ m between collection electrodes in this 180 nm technology by placing only a minimum amount of circuitry in the pixel and the rest at the matrix periphery. Consuming several tens of micro-ampere per pixel from a 1.8 V supply offers a time jitter of only a few tens of picoseconds. This allows detailed characterization of the sensor timing performance in a prototype chip with several mini matrices of 64 pixels each with amplifier, comparator and digital readout and 4 additional pixels with analog buffers. The aim is to prove sensor concepts before moving to a much finer line width technology and fully integrate the readout within the pixel at lower power consumption. [ABSTRACT FROM AUTHOR]