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We present polarity control of the carrier injection for a feedback field-effect transistor (FBFET) with a selectively thinned p+-i-n+ Si nanowire (SiNW) channel and two separate gates. The SiNW FBFET can be reconfigured in the p- or n-channel operation modes via simple control of electric signals. The two separate gates induce potential barriers in the SiNW channel for selective control of the carrier injection. In contrast to previously reported reconfigurable transistors, our transistor features symmetry of the electrical characteristics for the p- and n-channel operation modes. Positive-feedback operation of the SiNW FBFET provides superior switching characteristics for the p- and n-type configurations, including the on/off ratios (∼ 105) and subthreshold swings (1.36-1.78 mV/dec). This novel transistor is a promising candidate for reconfigurable electronics.

In this study, we propose complementary metal-oxide−semiconductor (CMOS) NOR logic gates consisting of silicon nanowire (NW) arrays on bendable substrates. A circuit consisting of two p-channel NW field-effect transistors (NWFETs) in series and two n-channel NWFETs in parallel is constructed to operate a two-input CMOS NOR logic gate. The NOR logic gates operate at a low supply voltage of 1 V with a rail-to-rail logic swing and a high voltage gain of approximately −3.0. The exact NOR logic functionality is achieved owing to the superior electrical characteristics of the well-aligned p- and n-NWFETs, which are obtained using conventional Si-based CMOS technology. Moreover, the NOR logic gates exhibit stable characteristics and have good mechanical properties. The proposed bendable NW CMOS NOR logic gates are promising building blocks for future bendable integrated electronics.

In this study, we demonstrate the performance of silicon nanowire (SiNW)n-metal oxide semiconductor (MOS) and p-MOS ratioed inverters that are fabricated on bendable substrates. The electrical characteristics of the fabricateddevices can be controlled by adjusting the load voltage. The logic swings of then- and p-MOS ratioed inverters at a low supply voltage of 1 V are 80% and 96%, respectively. The output voltage level of the p-MOS ratioed inverter is close to rail-to-rail operation. The device also exhibits stable characteristics with goodfatigue properties. Our bendable SiNW ratioed inverters show promise asa candidate building block for future bendable electronics.

In this paper, we propose a novel construction of silicon nanowire (SiNW) negative-AND (NAND) logic gates on bendable plastic substrates and describe their electrical characteristics. The NAND logic gates with SiNW channels are capable of operating with a supply voltage as low as 0.8 V, with switching and standby power consumption of approximately 1.1 and 0.068 nW, respectively. Superior electrical characteristics of each SiNW transistor, including steep subthreshold slopes, high I on/off ratio, and symmetrical threshold voltages, are the major factors that enable nanowatt-range power operation of the logic gates. Moreover, the mechanical bendability of the logic gates indicates that they have good and stable fatigue properties.