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An overview of enabling materials technologies required for fabrication of electronic devices on diamond is presented. Emphasis is placed on electronic doping of diamond by boron ion implantation. Van der Pauw resistivity and Hall Effect measurements were used to determine the net carrier concentration, carrier mobility and resistivity of natural and synthetic diamonds implanted under various conditions. The measured results for a range of implantation conditions and post-annealing temperatures are discussed in the context cf a model developed by J.F. Prins1. The requirements placed on ohmic contacts to diamond, and a process for fabricating ohmic contacts, is discussed briefly. Finally, current-voltage characteristics of a simple MISFET fabricated on ion implanted natural diamond are presented and analyzed. 1J.F. Prins, Physical Review B, 38 (1988) 5576.

We present evidence in this study that the moving species under ion mixing conditions are affected by the implantation damage distribution in the sample. This observation holds for metal-semiconductor, metal-metal and semiconductorsemiconductor systems. The direction of thermal annealing and atomic transport appears to play a role in ion-mixing as well. When these two factors are in the same direction, only one dominant moving species is observed. When these two factors are in opposite directions, both constituents can contribute to the atomic transport in ion mixing.

Regrowth by pulsed proton beam was studied for evaporated amorphous Si layers, for layers converted to polycrystalline by annealing (both with and without Ge markers) and for implantation-amorphized SOS films. Silicon-on-sapphire showed the lowest threshold for regrowth. Amorphous silicon melted at about 0.2 J/cm2 lower fluences of protons of 380 kev energy than crystalline Si. Implanted Sb into Sos occupies lattice positions exceeding the solid solubility.

Ion implantation induced phase transformations and recrystallization during post-annealing in CoSi2, CrSi2, and Pd2Si are studied. All three silicides are found to reorder at about 1/3 the melting point of the silicide. We speculate that ion-implanted silicides recrystallize by the same mechanism and that amorphous phases produced by implantation are unstable rather than metastable.

We have explored the possibility of oxidizing a Au/Si composite layer or a Au-Si alloyed layer on SiO2 substrates to form a highly conductive narrow line with a protective SiO2 layer over it. A number of sample configurations and annealing ambients have been investigated. It was found that co-evaporated Au-Si alloys ( ∼30 at. % Au) showed no oxide formation for annealing temperatures between 200°C and 800°C in a flowing O2 ambient (annealing time ≃ 2.25hrs). Samples with a configuration of SiO2/Au/Si showed mixing of the Au and Si layers, but no appreciable oxide formation until after annealing at 800°C in a flowing O2. Samples with a configuration of SiO2/Si/Au, however, showed uniform and smooth oxide growth on top of the Au layer after annealing in air at 200°C. The structural and electrical properties of the self-confined Au lines will be discussed. This process may be potentially useful for narrow interconnects on VLSl chips.