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20 results on '"NAND gate"'

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1. Design insights into a junctionless nanosheet FET (JL-NSFET) for switching and Analog/RF applications: Device to circuit level assessment.

2. A variation aware timing model for a 2-input NAND gate and its use in sub-65 nm CMOS standard cell characterization.

3. FPGA-based testing system of NAND-memory multi-chip modules

4. Modeling of single/multiple-bit upset effects on logic circuits applying Recurrent Neural Network

5. Efficient full data-path width and serialized hardware structures of SPONGENT lightweight hash function

6. Implementation of highly optimized optical all logic gates on a single chip using Ti-diffused lithium-niobate for high-speed processing in combinational circuits

7. QLC NAND study and enhanced Gray coding methods for sixteen-level-based program algorithms

8. A macro SPICE model for 2-bits/cell split-gate flash memory cell

9. MOS current mode logic exclusive-OR gate using multi-threshold triple-tail cells

10. A variation aware timing model for a 2-input NAND gate and its use in sub-65 nm CMOS standard cell characterization

11. Simulation and comparison of two sequential logic-in-memory approaches using a dynamic electrochemical metallization cell model

12. Single-electron shift-register circuit

13. Underlap channel metal source/drain SOI MOSFET for thermally efficient low-power mixed-signal circuits

14. A novel low-power full-adder cell with new technique in designing logical gates based on static CMOS inverter

15. Nanosculpture: Three-dimensional CMOS device structures for the ULSI era

16. Design and simulation of a nanoelectronic single-electron universal Control–Control-Not gate

17. A single-electron XOR gate

18. Influence of series transistors on transfer characteristic of CMOS circuits

19. Integrated schottky logic gate array

20. CMOS gates with regenerative action at one of inputs

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