Search

Abstract: This paper deals with the implementation of an innovative measurement instrument for power measurement in Digital Video Broadcasting Terrestrial (DVB-T) systems. In previous researches the authors have designed and tuned the measurement method. It is based on a digital signal processing section, which properly estimates the power spectrum density (PSD) of the input DVB-T signal. The peculiarities of the selected measurement algorithm have suggested the development of the instrument on a suitable FPGA platform. In this paper the hardware and the software architectures of an innovative instrument implementing the cited method are proposed. It is characterized by high transportability and exhibits metrological performance comparable with that peculiar to state-of-the-art. In particular, both the firmware solutions and optimizations, proposed to limit the resource demanding and making use of the massive parallelism offered by the FPGA architecture, are described in detail. A number of experimental tests carried out on actual DVB-T signals are also presented, whose results show the good metrological performance of the realized instrument. All measurement results concur with those provided by competitive commercial solutions. [Copyright &y& Elsevier]

Gearboxes have a significant influence on the durability and reliability of a power transmission system. Currently, extensive research studies are being carried out to increase the reliability of gearboxes working in the energy industry, especially with a focus on planetary gears in wind turbines and bucket wheel excavators. In this paper, a signal pre-processing algorithm designed for condition monitoring of planetary gears working in non-stationary operation is presented. The algorithm is dedicated for hardware implementation on Field Programmable Gate Arrays (FPGAs). The purpose of the algorithm is to estimate the features of a vibration signal that are related to failures, e.g. misalignment and unbalance. These features can serve as the components of an input vector for a neural classifier. The approach proposed here has several important benefits: it is resistant to small speed fluctuations up to 7%, it can be performed in real-time conditions and its implementation does not require many resources of FPGAs. [ABSTRACT FROM AUTHOR]