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Molecular-beam-epitaxy growth of high structural and optical-quality InGaAsN∕GaAs quantum wells (QW) has been investigated. The material quality can be improved significantly by using low-temperature growth to suppress the phase separation. High-performance ridge-waveguide InGaAsN∕GaAs single QW lasers emitting at 1.3μm have been demonstrated. Infinite-cavity-length threshold-current density of 400A∕cm2, internal quantum efficiency of 96%, and a slope efficiency of 0.67W∕A for a cavity length L=1mm were obtained. A TO46 packaging laser shows single lateral-mode kink-free output power of more than 200mW with a maximum total wallplug efficiency of 29% at room temperature under continuous wave (cw) operation. Moreover, 1.3μm InGaAsN∕GaAs QW vertical-cavity surface-emitting lasers with a threshold current density lower than 2KA∕cm2 at room temperature have been achieved. We obtained multimode cw output power and slope efficiency in excess of 1mW and 0.15W∕A, respectively.

We report the characterization of contact etch processes which give variable sidewall taper angles. Patterning at 248 nm gave contact holes at ∼0.19 μm diameter in photoresist over organic bottom anti reflection coating (BARC). The contact stack and test structures (BARC/oxide/SiN, 5–10 kA total stack thickness) were etched in a medium-density TEL dipole ring magnetron (DRM) system. Bottom hole diameters ranging from 0.17 down to 0.10 μm could be obtained by varying the oxide etch process, which included C4F8 or C5F8, O2, and Ar. A moderate etch selectivity of ∼8:1 (oxide: SiN etch rate ratio) was determined for the main taper process. Etched patterned wafers were characterized using top-down critical dimension scanning electron microscopy (CD-SEM), cross-section SEM, and transmission electron microscopy. Ex situ surface analysis of etched blanket wafers using x-ray photoelectron spectroscopy showed only small dependence of the surface fluorocarbon film thickness and composition on taper etch process cond...

We report results on the fabrication of deep sub-100 nm silicon-on-insulator (SOI) complimentary metal–oxide semiconductor transistors using phase-shift double-exposure deep ultraviolet optical lithography. Resist gate features down to 40 nm were resolved corresponding to λ/6 resolution or k1=0.1. Using an etch bias, we have fabricated polysilicon gate features down to 25 nm corresponding to λ/10 resolution or k1=0.06. Good process latitudes were obtained, and SOI transistor results down to 50 nm gate length are reported.

Sub-100 nm metal–oxide–semiconductor field effect transistor gate structures have been fabricated using resolution-enhanced 248 nm optical lithography. We employed the chromeless phase-shift approach together with thin resists and optimized etches to achieve these results. Polysilicon gratings with critical dimension (CD)≈60 nm and TiN (damascene) gratings with CD≈35 nm have been fabricated with good process latitudes. We are applying this process to the fabrication of basic test circuits for an aggressively scaled silicon on insulator complementary metal–oxide–semiconductor technology.

By utilizing a novel ZEP/PMGI/ZEP trilayer resist process, GaInAs/AlInAs T‐gate modulation‐doped field effect transistors on InP with 0.1 μm gate lengths have been demonstrated. The trilayer resist requires only a single exposure. An overhang structure for liftoff, with a 0.1 μm footprint, is created by a sequence of infinitely selective developments for each layer. Linewidths as narrow as 65 nm have been obtained. Devices with a maximum current of 860 mA/mm, extrinsic transconductances of 658 mS/mm, and a current‐gain‐cutoff frequency ft of as high as 203 GHz have been fabricated. Yields as high as 96% and a threshold voltage uniformity of 34 mV (1 sigma) have been achieved on a 2 in. wafer.

The in situ detection of strained layer relaxation in the InGaAs/GaAs system using laser light scattering (LLS) is reported. Samples were prepared by molecular‐beam epitaxial deposition of InGaAs at 515 °C, and were characterized ex situ with x‐ray diffraction, transmission electron microscopy, and atomic force microscopy. The LLS signal rapidly increased after an onset period which depended on the InGaAs composition. Azimuthal rotation [about the (100) surface normal] was a useful diagnostic for analyzing the contributions to the LLS signal. For InxGa1−xAs films with x

The use of reflection mass spectrometry (REMS) as an in situ diagnostic for surface segregation of indium during InGaAs layer growth is reported. InGaAs growth at substrate temperatures above 500 °C yields a REMS signature which indicates a thickness‐dependent surface In content. Adapting a simple segregation model [K. Muraki, S. Fukatsu, Y. Shiraki, and R. Ito, Appl. Phys. Lett. 61, 557 (1992)], the segregation ratio R was extracted under various deposition conditions in real time. The segregation ratio obtained during InGaAs/GaAs multiple quantum well growth at 500–530 °C suggests the presence of InGaAs composition grading near interfaces, and agrees qualitatively with ex situ characterization by x‐ray diffraction. The high values of R (0.7–0.8) observed under normal device‐layer growth produces a surface layer with high In content (i.e., InAs). The segregation ratio was not sensitive to unrelaxed layer strain, but showed a large increase under conditions which probably produce island (three‐dimensional...

A methodology based on statistically designed factorial experiments has been developed to model the dissolution rate of an electron‐beam exposed chemically amplified resist, Shipley SAL‐601‐ER7, for different post‐exposure bake (PEB) and developer concentrations. A statistical experiment of dissolution rate measurements were performed in the Perkin‐Elmer development rate monitor using a central composite design with PEB temperature, PEB time, and developer concentration as the factors. These measurements were combined with Monte Carlo simulation of electron energy deposition to generate dissolution rate data as a function of absorbed energy. These data were then fitted to a semiempirical rate equation using nonlinear regression. Statistical analysis of the effects of the three processing factors on the parameters of the rate functions yielded empirical models relating the parameters to the factors. As a result, a rate equation can be determined for any processing conditions, and thus a complete model is o...

In this paper, we report a new process for molecular beam epitaxial (MBE) GaAs‐on‐Si growth. The process involves high‐temperature in situ GaAs annealing above 850 °C. The unique points in this new approach are: (1) the thermal cycling layers or so‐called thermal strained superlattices (TSL) are inserted in buffer growth and found to be effective in blocking dislocation propagation; (2) a thin Al0.35Ga0.65As cap layer is deposited after GaAs buffer layer growth to prevent the underneath GaAs epitaxial layer from sublimation during annealing. An 850 °C in situ AlGaAs cap annealing (ACA) of the AlGaAs/GaAs buffer layer can eliminate all the twins and stacking faults in the buffer layers and yield high‐quality GaAs film. The bulk GaAs overlayers is grown at normal GaAs/Si growth temperature and is never exposed to a high anneal temperature. High‐quality GaAs/Si layers with surface dislocation densities 1×106 cm−2 and an x‐ray linewidth of 130 arc s have been achieved.