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Through-silicon vias (TSV) are very important for wafer-level packaging as they provide patterning holes through thick silicon dies to integrate and interconnect devices which are stacked in the z-direction. For economic processing, TSV fabrication primarily needs to be cost effective, especially for a high throughput. Furthermore, a lithography process for TSV has to be stable enough to allow patterning on prestructured substrates with inhomogeneous topography. This can be addressed by an exposure process which offers a large depth of focus. We have developed a mask-aligner lithography process based on the use of a double-sided photomask to realize aerial images that meet these constraints. [ABSTRACT FROM AUTHOR]

Source mask optimization (SMO) is a leading resolution enhancement technique in immersion lithography at the 45-nm node and beyond. Current SMO approaches, however, fix the numerical aperture (NA), which has a strong impact on the depth of focus (DOF). A higher NA could realize a higher resolution but reduce the DOF; it is very important to balance the requirements of NA between resolution and the DOF. In addition, current SMO methods usually result in complicated source and mask patterns that are expensive or difficult to fabricate. This paper proposes a parametric source-mask-NA co-optimization (SMNO) method to improve the pattern fidelity, extend the DOF, and reduce the complexity of the source and mask. An analytic cost function is first composed based on an integrative vector imaging model, in which a differentiable function is applied to formulate the source and mask patterns. Then, the derivative of the cost function is deduced and a gradient-based algorithm is used to solve the SMNO problem. Simulation results show that the proposed SMNO can achieve the optimum combination of parametric source, mask, and NA to maintain high pattern fidelity within a large DOF. In addition, the complexities of the source and mask are effectively reduced after optimization. [ABSTRACT FROM AUTHOR]

Defect avoidance methods are likely to play a key role in overcoming the challenge of mask blank defectivity in extreme ultraviolet (EUV) lithography. In this work, we propose an innovative EUV mask defect avoidance method. It is the first approach that allows exploring all the degrees of freedom available for defect avoidance (pattern shift, rotation and mask floorplanning). We model the defect avoidance problem as a global, nonconvex optimization problem and then solve it using a combination of random walk and gradient descent. For a 8-nm polysilicon layer of an ARM Cortex M0 layout, our method achieves a 60% point better mask yield compared to prior art in defect avoidance for a 40-defect mask. We show that pattern shift is the most significant degree of freedom for improving mask yield. Rotation and mask floorplanning can also help improve mask yield to a certain extent. [ABSTRACT FROM AUTHOR]

As 193-nm immersion lithography is extended indefinitely to sustain technology roadmaps, there is increasing pressure to contain escalating lithography costs by identifying patterning solutions that can minimize the use of multiple-pass processes. Contact patterning for the 32/28-nm technology nodes has been greatly facilitated by the just-in-time introduction of new process enablers that allow the support of flexible foundry-oriented ground rules alongside high-performance technology, without inhibiting migration to a single-pass patterning process. The incorporation of device-based performance metrics, along with rigorous patterning and structural variability studies, was critical in the evaluation of material innovation for improved resolution and CD shrink. Additionally, novel design changes for single patterning incorporating mask optimization efforts, along with new capability in data preparation, were assessed to allow for minimal impact of implementation of a single patterning contact process late in the 32-nm and 28-nm development cycles. In summary, this paper provides a comprehensive study of what it takes to turn a contact-level double-patterning process into a single-patterning process consisting of design and data manipulation, as well as wafer manufacturing aspects, together with many results. [ABSTRACT FROM AUTHOR]

Extreme ultraviolet (EUV) lithography is a promising candidate for high-volume manufacturing at the 22-nm half-pitch node and beyond. EUV projection lithography systems need to rely on reflective optical elements and masks with oblique illumination for image formation. It leads to undesired effects such as pattern shift and horizontal-to-vertical critical dimension bias, which are generally reported as shadowing. Rule-based approaches proposed to compensate for shadowing include changing mask topography, introducing mask defocus, and biasing patterns differently at different slit positions. However, the electromagnetic interaction between the incident light and the mask topography with complicated geometric patterns, such as optical diffraction, not only causes shadowing but also induces proximity effects. This phenomenon cannot be easily taken into account by rule-based corrections and thus imposes a challenge on a partially model-based correction flow, the so-called combination of rule- and model-based corrections. A fully model-based correction flow, which integrates an in-house optical proximity correction algorithm with rigorous three-dimensional mask simulation, is proposed to simultaneously compensate for shadowing and proximity effects. Simulation results for practical circuit layouts indicate that the fully model-based correction flow significantly outperforms the partially model-based one in terms of correction accuracy, while the total run time is slightly increased. [ABSTRACT FROM AUTHOR]

The use of customized illumination modes is part of the pursuit to stretch the applicability of immersion ArF lithography. Indeed, a specific illumination source shape that is optimized for a particular design leads to enhanced imaging results. Recently, freeform illumination has become available through pixelated diffractive optical elements or through ASML’s programmable illuminator system (FlexRayTM) allowing for virtually unconstrained intensity distribution within the source pupil. In this paper, the benefit of freeform over traditional illumination is evaluated, by applying source mask co-optimization (SMO) for an aggressive use case and wafer-based verification. For a 22-nm node SRAM of 0.099 and 0.078 m2bit cell area, the patterning of the full contact and metal layer into a hard mask is demonstrated with the application of SMO and freeform illumination. In this work, both pixelated diffractive optical elements and FlexRay are applied. Additionally, the match between the latter two is confirmed on wafer, in terms of critical dimension and process window. [ABSTRACT FROM AUTHOR]

Pellicles are mounted on the masks used in ArF lithography for integrated circuit manufacturing to ensure defect-free printing. The pellicle, a thin transparent polymer film, protects the reticle from dust. But, as the light transmittance through the pellicle has an angular dependency, the pellicle also acts as an apodization filter. In the current work, we present both experimental and simulation results at 1.35 numerical aperture immersion ArF lithography showing the influence of two types of pellicles on proximity and intra-die critical dimension uniformity (CDU). To do so, we mounted and dismounted the different pellicle types on one and the same mask. The considered structures on wafer are compatible with the 32-nm logic node for poly and metal. For the standard ArF pellicle (thickness 830 nm), we experimentally observe a distinct effect of several nm due to the pellicle presence on both the proximity and the intra-die CDU. For the more advanced pellicle (thickness 280 nm), no signature of the pellicle on proximity or CDU could be found. By modeling the pellicles optical properties as a Jones Pupil, we are able to simulate the pellicle effects with good accuracy. These results indicate that for the 32-nm node, it is recommended to take the pellicle properties into account in the optical proximity correction calculation when using a standard pellicle. In addition, simulations also indicate that a local dose correction can compensate to a large extent for the intra-die pellicle effect. When using the more advanced thin pellicle (280 nm), no such corrections are needed. [ABSTRACT FROM AUTHOR]

One of the critical issues for extreme ultraviolet lithography masks is particle-free mask handling. We report that the number of particle adders on the front side of a mask in a dual pod can be reduced to less than 0.01 particlescycle (>46-nm polystyrene latex) during the process of starting from the load port to placing an electrostatic chuck (ESC) in vacuum. In addition, we find that chucking the mask on the ESC causes serious issues. One of these issues is whether the masks will be electrically charged by chucking the ESC and whether some particles will be added on the front side. We measure the electric potential of the back and front sides of the mask and examine the particle adders. We find that when the mask is electrically floated, potential on the front side of the mask increases during ESC chucking; when the mask is released from the ESC, it is electrically charged. This electrification causes adhesion of the particles. Our experiments show that to protect the mask from particles, the mask must be grounded throughout the entire process. For electrification, we confirm that a dual-pod system is effective in protecting the mask from particles. [ABSTRACT FROM AUTHOR]

Inverse lithography technology (ILT) is a procedure that optimizes the mask layout to produce an image at the wafer with the targeted aerial image. For an illumination condition optimized for dense pitches, ILT inserts model-based subresolution assist features (AF) to improve the imaging of isolated features. ILT is ideal for random contact hole patterns, in which the AF are not at intuitive locations. The raw output of ILT consists of very complex smooth shapes that must be simplified for an acceptable mask write time. It is challenging for ILT to quickly converge to the ideal pattern as well as to simplify the pattern to one that can be manufactured quickly. ILT has many parameters that effect process latitude, background suppression, conversion run time, and mask write time. In this work, an optimization procedure is introduced to find the best tradeoff between image quality and run time or write time. A conversion run time reduction of 4.7×is realized with the outcome of this optimization procedure. Simulations of mask write time quantify the ability of ILT to be used for full chip applications. The optimization procedure is also applied to alternate mask technologies to reveal their advantages over commonly used 6 attenuated phase shift masks. [ABSTRACT FROM AUTHOR]

Novolak resins have had a significant impact on modern life, in general, and more specifically, on photolithography and the microelectronic market in particular. Since their commercialization around 1910, they have found a wide variety of uses. With the switch from solvent developable negative photoresists to the base soluble novolak/diazonaphthoquinone systems, the growth of the resist market has skyrocketed. Successive generations of higher quality resists required refinements in the synthesis, fractionation and purification of the novolak resins used in making those resists. The use of stabilization techniques and continuous processing methods for the preparation of novolak resins and the resists made with them are discussed. [ABSTRACT FROM AUTHOR]

We demonstrate the direct photolithographic patterning of a grossly nonplanar substrate by creating 62-μm helical tracks on a 22-mm-high cone. The projection of focused light onto the 3-D surface is achieved using a computer-generated hologram (CGH) suitably illuminated so as to create the required pattern on the photoresist-coated surface. The approach adopted forms the basis of a novel method for patterning nonplanar structures. We address the key challenges encountered for the implementation of holographic photolithography in three dimensions, including mask design and manufacture, exposure compensation, mask alignment, and chemical processing. Control of linewidth and resolution over the nonplanar surface is critical. We describe the methods adopted and critically assess the structures created by this process. The bihelical cone is representative of a broadband, high-frequency coil-like structure, known in wireless communications as a log-periodic antenna. [ABSTRACT FROM AUTHOR]

Inverse lithography mask design and double-exposure lithography are two technologies that have gained a lot of attention in the recent past. Inverse lithography consists of synthesizing the input mask that leads to the desired output wafer pattern by inverting the mathematical forward model from mask to wafer. Double-exposure lithography uses two pairs of mask and exposure to print a single (desired) wafer pattern. It usually involves splitting the latter into two parts. In this work, we present some preliminary results in our unique effort to combine the previous two powerful techniques. The goal is to use the inverse imaging approach to automatically synthesize the masks required to print the desired wafer pattern employing double-exposure lithography. We employ the pixel-based mask representation, analytically calculate the gradient, and use a cyclic coordinate descent optimization algorithm to synthesize the two masks. We present results for chromeless phase-shift masks for an idealized case of a coherent imaging system (σ=0) using the Kirchhoff approximation. The results indicate that our algorithm automatically splits the target pattern into two (overlapping) parts, which are used separately during the individual exposures. Furthermore, the proposed approach is also capable of resolving the phase conflicts. The comparison with a single-exposure case indicates a superior contrast and no hot-spots. [ABSTRACT FROM AUTHOR]