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A new technique is assessed in order to measure, at the wafer scale, direct bonding energies. It is derived from the standard Double Cantilever Beam (DCB) method and uses interferometry in confocal IR laser source microscopy to measure crack openings. Such a bonding energy measurement protocol has better accuracy compared to other techniques. This is due to a better confocal microscopy resolution and the high intensity of the laser source. The elastic energy stored in bent wafers is obtained by measuring the beam curvature. DCB deformation models are discussed from the short-range crack opening theory to long distance beam-bending theories. Comparison is made between models, experimental results, and FEM simulations. Finally, the bonding energy error during standard measurements is estimated. [ABSTRACT FROM AUTHOR]

Detecting mechanical fatigue of metallic components is always a challenge in industries. In this work, we proposed to monitor the low-cycle fatigue of a 6061 aluminum alloy based on internal friction (IF) measurement, which is realized by a quantitative electromechanical impedance (Q-EMI) method using a small piezoelectric wafer bonded on the specimen. Large stress amplitude (230 MPa) was employed in the testing; thus, the fatigue life can always be below 105 cycles. It was found that except for the initial testing stage, the IF always increases steadily with the increasing fatigue cycles. Before the fatigue failure, the IF can reach 2.5–3.4 times the initial value, which is thought to be caused by the micro-cracks forming and growing. In comparison, the resonance frequency of the specimen just drops by about 2% compared with the initial value. Finally, a fatigue criterion based on IF measurement is suggested for aluminum alloys and it can also be extended to other metals. [ABSTRACT FROM AUTHOR]

Germanium-on-insulator (GeOI) films fabricated using the Smart Cut™ wafer bonding and film exfoliation technology were investigated for the mechanical properties and induced phase transformations by using nanoindentation and Raman spectroscopy experiments. The hardness and modulus results of the GeOI films are significantly different from the literature published Silicon-on-Insulator and bulk germanium results. The GeOI films are softer and more flexible as compared to bulk Ge hardness and stiffness properties. The Raman spectroscopy of the spherical indents indicates bands of metastable Ge phases @ 220 cm−1, 195 cm−1, and 184 cm−1 wavenumbers. Our results demonstrate that a spherical indenter impacted a wider area of contact and produced GeOI indented surfaces free of cracks and fracture. The spherical indenter tip kept the Ge top layer intact when compared to the Berkovich indenter tip during penetration. In contrast, the Berkovich indenter tip developed excessive fracture that resulted in displacing the Ge top layer sideways and exposed the Si substrate underneath revealing Raman spectra bands of metastable Si phases @ 350 cm−1, 399 cm−1, and 430 cm−1. [ABSTRACT FROM AUTHOR]

Dark current characteristics of germanium (Ge) vertical p-i-n photodetectors were studied. Ge photodetectors were demonstrated on the germanium-on-insulator (GOI) platforms realized via direct wafer bonding and layer transfer. GOI platforms with two different threading dislocation densities (TDDs) of 3.2 × 106 cm−2 (low TDD) and 5.2 × 108 cm−2 (high TDD) were varied via furnace annealing in oxygen ambient. An ultra-low dark current density of 1.12 mA/cm2 for epi-Ge photodetectors was obtained for a low TDD Ge photodetector. This is reduced by a factor of 53 in comparison with a high TDD Ge photodetector. A dominant leakage contribution component shifts from bulk leakage to surface leakage as TDD decreases to 3.2 × 106 cm−2, suggesting that advanced surface passivation is required to further reduce the leakage current. Through an activation energy study, it is revealed that a primary bulk leakage mechanism shifts from Shockley–Read–Hall (SRH) leakage to diffusion leakage in a temperature range of 323–353 K. The surface leakage performed with plasma enhanced chemical vapor deposition-deposited SiO2 is governed by SRH and trap-assisted tunneling leakage processes. Two orders of magnitude enhancement in the effective carrier lifetime is observed with the reduction in TDD. This work suggests that bulk leakage current density and effective lifetime analysis provide a better understanding of TDD-dependent dark leakage current study. [ABSTRACT FROM AUTHOR]

InGaSb-on-insulator (InGaSb-OI) and InAs/InGaAs/InAs-on-insulator (InAs/InGaAs-OI) structures have been realized on Si by a direct wafer bonding (DWB) technology using atomic-layer-deposition Al2O3. While strain introduced in InGaSb channel layers grown on InAs can enhance the hole mobility of the Sb-based channel layers, a difficult issue of fabricating InGaSb-OI wafers is to obtain a smooth InGaSb surface, which is mandatory for wafer bonding. In this study, the surface of a 20-nm-thick In0.185Ga0.815Sb channel grown on an InAs (100) substrate and an InAs (2.5 nm)/In0.185Ga0.815Sb (20 nm)/InAs (2.5 nm) channel with a 20-nm-thick GaSb buffer layer grown on an InAs (100) substrate by metal-organic chemical vapor deposition have a root mean square of the surface roughness as low as 0.16 and 0.22 nm, respectively, over a scan area of 10 × 10 μm2, which are smooth enough to employ the wafer bonding. As a result, the fabrication of the InGaSb-OI wafers by the DWB and the operation of InGaSb-OI p-channel metal-oxide-semiconductor field-effect transistors (p-MOSFETs) by using the DWB wafers are demonstrated. Also, the performance of InGaSb-OI p-MOSFETs is found to be improved by inserting ultrathin InAs layers between InGaSb and insulating buried oxide layers. An InGaSb-OI and an InAs/InGaAs-OI p-MOSFET under the accumulation-mode operation exhibit a peak mobility of ∼161 and ∼273 cm2/V s, respectively. The channel hole mobility of the InGaSb-OI p-MOSFET is higher than that of the GaSb-on-insulator (GaSb-OI) p-MOSFET and can exceed that of Si p-MOSFETs. [ABSTRACT FROM AUTHOR]

Semiconductor wafer bonding has gained attention for its use in the design of efficient optoelectronic devices. Here, we report the observation of the properties of semiconductor wafer bonding via metal nanoparticle arrays based on the current-voltage and reflectance measurements of multijunction solar cells. Based on our observation of temporal changes in current-voltage characteristics and reflectance, we have revealed that reduced contact resistance at the bonded interface involves two processes: van der Waals bonding, which occurs within a few minutes, and diffusion bonding of metal nanoparticles, which occurs in a time scale of days. The mechanism of wafer bonding via metal nanoparticles is discussed based on its dynamical aspects, including the roles of liquid capillarity and alloy formation at the interface. [ABSTRACT FROM AUTHOR]

The study of the physical mechanisms driving Cu-Cu wafer bonding allowed for reducing the bonding temperatures below 200 °C. Metal thermo-compression Cu-Cu wafer bonding results obtained at such low temperatures are very encouraging and suggest that the process is possible even at room temperature if some boundary conditions are fulfilled. Sputtered (PVD) and electroplated Cu thin layers were investigated, and the analysis of both metallization techniques demonstrated the importance of decreasing Cu surface roughness. For an equal surface roughness, the bonding temperature of PVD Cu wafers could be even further reduced due to the favorable microstructure. Their smaller grain size enhances the length of the grain boundaries (observed on the surface prior bonding), acting as efficient mass transfer channels across the interface, and hence the grains are able to grow over the initial bonding interface. Due to the higher concentration of random high-angle grain boundaries, this effect is intensified. The model presented is explaining the microstructural changes based on atomic migration, taking into account that the reduction of the grain boundary area is the major driving force to reduce the Gibbs free energy, and predicts the subsequent microstructure evolution (grain growth) during thermal annealing. [ABSTRACT FROM AUTHOR]

The study of the physical mechanisms driving Cu-Cu wafer bonding allowed for reducing the bonding temperatures below 200 °C. Metal thermo-compression Cu-Cu wafer bonding results obtained at such low temperatures are very encouraging and suggest that the process is possible even at room temperature if some boundary conditions are fulfilled. Sputtered (PVD) and electroplated Cu thin layers were investigated, and the analysis of both metallization techniques demonstrated the importance of decreasing Cu surface roughness. For an equal surface roughness, the bonding temperature of PVD Cu wafers could be even further reduced due to the favorable microstructure. Their smaller grain size enhances the length of the grain boundaries (observed on the surface prior bonding), acting as efficient mass transfer channels across the interface, and hence the grains are able to grow over the initial bonding interface. Due to the higher concentration of random high-angle grain boundaries, this effect is intensified. The model presented is explaining the microstructural changes based on atomic migration, taking into account that the reduction of the grain boundary area is the major driving force to reduce the Gibbs free energy, and predicts the subsequent microstructure evolution (grain growth) during thermal annealing. [ABSTRACT FROM AUTHOR]

Exothermic self-propagating high-temperature synthesis of intermetallic compounds attain increasing interest in the field of wafer bonding in microelectronics and microsystems technology due to local heat generation. Numerical models of self-sustaining reactions in thin multilayer films can be used to predict velocity and shape of the reaction front. This work deals with heat losses to various substrate materials and material compounds used for wafer bonding as well as the prediction of minimal numbers of bilayers required for a self-propagating reaction front. We introduced a cylindrically symmetric finite element approach. In addition to that, the effect of temperature-dependent specific heat capacities was investigated. Numerical computations were performed for Pd/Al multilayers and are compared to experimental data. It was found that the developed formalism is suitable to determine the mutual influence of heat losses and reaction properties. Furthermore, it was demonstrated that minimal numbers of bilayers can be determined more precisely by including temperature-dependent specific heat capacities. [ABSTRACT FROM AUTHOR]

We report on the fabrication and characterization of hard x-ray waveguide channels manufactured by e-beam lithography, reactive ion etching and wafer bonding. The guiding layer consists of air or vacuum and the cladding material of silicon, which is favorable in view of minimizing absorption losses. The specifications for waveguide channels which have to be met in the hard x-ray range to achieve a suitable beam confinement in two orthogonal directions are extremely demanding. First, high aspect ratios up to 106 have to be achieved between lateral structure size and length of the guides. Second, the channels have to be deeply embedded in material to warrant the guiding of the desired modes while absorbing all other (radiative) modes in the cladding material. We give a detailed report on device fabrication with the respective protocols and parameter optimization, the inspection and the optical characterization. [ABSTRACT FROM AUTHOR]

Interface defects formed during the wafer bonding process upon annealing have been studied. Based on the hydrogen diffusion in SiO2 and the stability of the bubbles at the bonding interface, models of the growth and further dissolution of the defects are presented. Considering the hydrogen diffusion through the interfacial oxide, diffusion coefficients and activation energy (Ea=0.25 eV) are obtained. It has been shown that the defect dissolution is driven by the exodiffusion of the hydrogen toward the silicon substrates. [ABSTRACT FROM AUTHOR]

We study covalent bonds between p-doped Si wafers (resistivity ∼10 Ω cm) fabricated on a recently developed 200 mm high-vacuum system. Oxide- and void free interfaces were obtained by argon (Ar) or neon (Ne) sputtering prior to wafer bonding at room temperature. The influence of the sputter induced amorphous Si layer at the bonding interface on the electrical behavior is accessed with temperature-dependent current-voltage measurements. In as-bonded structures, charge transport is impeded by a potential barrier of 0.7 V at the interface with thermionic emission being the dominant charge transport mechanism. Current-voltage characteristics are found to be asymmetric which can tentatively be attributed to electric dipole formation at the interface as a result of the time delay between the surface preparation of the two bonding partners. Electron beam induced current measurements confirm the corresponding asymmetric double Schottky barrier like band-alignment. Moreover, we demonstrate that defect annihilation at a low temperature of 400 °C increases the electrical conductivity by up to three orders of magnitude despite the lack of recrystallization of the amorphous layer. This effect is found to be more pronounced for Ne sputtered surfaces which is attributed to the lighter atomic mass compared to Ar, inducing weaker lattice distortions during the sputtering. [ABSTRACT FROM AUTHOR]