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A variety of lead-free solder alloys were studied for use as flip-chip interconnects including Sn-3.5Ag, Sn-0.7Cu, Sn-3.8Ag-0.7Cu, and eutectic Sn-37Pb as a baseline. The reaction behavior and reliability of these solders were determined in a flip-chip configuration using a variety of under-bump metallurgies (TiW/Cu, electrolytic nickel, and electroless Ni-P/Au). The solder micro-structure and intermetallic reaction products and kinetics were determined. The Sn-0.7Cu solder has a large grain structure and the Sn-3.5Ag and Sn-3.8Ag-0.7Cu have a fine lamellar two-phase structure of tin and Ag3Sn. The intermetallic compounds were similar for all the lead-free alloys. On Ni, Ni3Sn4 formed and on copper, Cu6Sn5Cu3Sn formed. During reflow, the intermetallic growth rate was faster for the lead-free alloys, compared to eutectic tin-lead. In solidstate aging, however, the interfacial intermetallic compounds grew faster with the tinlead solder than for the lead-free alloys. The reliability tests performed included shear strength and thermomechanical fatigue. The lower strength Sn-0.7Cu alloy also had the best thermomechanical fatigue behavior. Failures occurred near the solder/intermetallic interface for all the alloys except Sn-0.7Cu, which deformed by grain sliding and failed in the center of the joint. Based on this study, the optimal solder alloy for flip-chip applications is identified as eutectic Sn-0.7Cu.

The important issues in advanced area-array electronic packaging for semiconductor devices are materials driven. Some of the processing-driven materials issues include the effect of introducing a silicon device interface with copper pads and a low-κ dielectric, the effect of decreasing pitch and feature size on the package interconnects, the development and implementation of organic substrates, and advanced underfills for fine-pitch flip-chip applications. From a materials reliability aspect, important materials issues include enhanced solder interconnect reliability, α-particle-induced soft errors, and the introduction of lead-free solder alloys.

A variety of new materials are needed for solder interconnects in electronic packages for high- and low-temperature applications. This article compares the mechanical behavior of low-temperature materials (Sn-40In-20Pb, Sn-58Bi, and a silver-loaded conductive adhesive) and high-melting-temperature solders (Sn-3.5Ag, Sn-3.4Ag-4.8Bi, and Sn-4.7 Ag-1.7Cu) to near-eutectic Sn-40Pb solder. The results indicate that there are promising materials alternatives to the traditional Sn-Pb solders in electronic interconnect applications.

The use of soft solders, particularly those containing lead, dates back nearly 5,000 years. Solders similar to the materials used to seal the aqueducts of ancient Rome are now an important building block in the manufacture of high-speed computer assemblies. This history attests to the technological versatility of soft solders and, in particular, the solder alloys that contain lead. However, the health effects of prolonged exposure to lead have also been documented; measures to limit human exposure—at the work place and indirectly through the environment—are being considered. The successful introduction of lead-free solders into future electronic products will rely heavily upon their solderability, which can be evaluated by test procedures such as the meniscometer/wetting balance technique and the capillary flow test.

The key conclusion out of the Solder Mechanics Workshop is that, overall, the technical and scientific community does not know as much quantitatively about solder behavior as we had hoped. The good news, however, is that the microelectronics user community, which is largely served by solder activities, has come to terms with the current environment through active participation in the workshop. The air has been cleared. As a technical community, we have a better idea of what our priorities for continued research are. A much more detailed overview of the workshop will be available shortly in monograph form. Individual chapters will be written by authors present at the workshop and will emphasize background material (e.g., literature critiques) and detail the technical consensus on critical issues central to the workshop. The book will be available through TMS and will be the first volume in a new series of technical monographs sponsored by the society's Electronic, Magnetic and Photonic Materials Division.

The need for increased speed and functionality by electronic components has pushed traditional electronic packages to the limit of their capabilities. Typically, the electronic device is electrically connected by wires or solder bumps in a package that gives the device environmental isolation and acts as a space transformer to transfer the electronic signals down leads to other discrete packaged devices on a printed circuit board. The discrete spacing of the devices and the time needed to propagate electronic signals along the wiring (that has a finite resistance and slows electron travel to a fraction of the speed of light) on the printed circuit board restricts the speed of the circuit. A promising solution is to use light, rather than electrons, to enhance signal transmission. The use of light, generated by lightemitting diodes (LEDs) or lasers, in these applications is called optoelectronic packaging. Applications in which optoelectronic packaging has had a significant impact include telecommunications (fiberoptic lines), optical reading devices (scanners), and supercomputers. The physics of transmitting signals via optics is well understood. However, there is a significant challenge in the area of interconnects. Interconnects are the interface between a transmission optics line and a device (Le., a laser or LED); they must be manufacturable and have excellent reliability. The difficulty with (and most expensive aspect of) optical interconnections is thatalignmentis critical. For multiple-mode optical interconnects, the alignment between the light source and the transmission line must be between 5 /lm and 10 /lm. In a singlemode interconnect, the alignment must be on the order of 1 /lm or less. The interconnects currently used for traditional electronic packages have nowhere near this requirement of alignment, being in the range of 50 to 100 /lm. Furthermore, accurate optical alignments represent up to 80 percent of the cost of the entire package. Therefore,innovativeapproaches to the materials used in optoelectronic packages-and their processing-are needed to enhance reliabil