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In the paper, the novel topology of the resonant DC link three-level soft-switching inverter is proposed to reduce switching losses and improve the efficiency of three-level inverter at high switching frequency. Symmetrical auxiliary resonant circuits are set in the DC link of three-level hard-switching inverter. Moreover, the terminal voltage of the resonant capacitors between the DC buses periodically drops to zero via the resonance of auxiliary circuits. Furthermore, under such condition, the main switches of the three-level inverter would be operated, in order to achieve zero-voltage switching. Based on the equivalent circuits in different operating modes, the paper analyses the working process of the soft-switching inverter in detail. In addition, a 3 kW laboratory prototype of resonant DC link three-phase three-level soft-switching inverter is built. The experimental results show that the main switches and auxiliary switches of the inverter are operated under soft-switching conditions, and the efficiency is significantly improved compared with the three-level hard-switching inverter. Therefore, the proposed topology can effectively reduce switching losses and prove to be more practical in engineering. [ABSTRACT FROM AUTHOR]

An auxiliary switching device is usually set on the DC bus of the resonant DC link inverter, which restricts the efficiency of the inverter and is also one of the reasons for its not extensive application and promotion in the high-power field. To solve the problem, auxiliary circuits and DC bus of the resonant DC link soft-switching inverter designed in this paper are connected in parallel, and auxiliary switching devices and resonant elements are not connected in series on the DC bus, which help to improve the efficiency and reduce the power losses of the auxiliary resonant circuits. Based on the equivalent circuits in different operating modes, the paper analyzes the working process of the soft-switching inverter, soft-switching realization conditions and design rules. A 10 kW laboratory prototype is built, and through the comparison of the experimental results from it and the hard-switching inverter, it is shown that the efficiency improvement value of the designed inverter at full load is higher than that at light load. Therefore, the soft-switching inverter designed in this paper is conductive to reducing the power losses of the auxiliary resonant circuits and ensuring the efficient use of the electric energy. [ABSTRACT FROM AUTHOR]

Approximate computing is an emerging paradigm that can tolerate some loss of accuracy to improve the energy consumption and design complexity. Multiplication is one of the important computational components in various digital signal processing (DSP) applications. Improvement of multipliers, as the building blocks of an approximate computing systems, has received significant attention. Compressors are key elements in an approximate multiplier to have an optimal design with high performance. This paper proposes an approximate/exact 4–2 compressor and an exact 5–2 compressor in carbon nanotube field-effect transistors (CNTFET) technology for utilisation in an approximate multiplier. Four efficient designs for utilising the proposed compressors are introduced and analysed for a Wallace multiplier. All of the proposed circuits are analysed in 32 nm CNTFET Stanford technology and are simulated by HSPICE. In addition, as an image processing application of approximate multipliers, this paper compares the quality metrics of the image multiplication for the proposed designs and previously presented approximated multipliers. For example, the proposed schemes provide excellent results in structural similarity index up to 99%, and peak signal-to-noise ratio more than 45 dB. Also, it uses figure of metric (FOM) that includes the accuracy and quality metrics of the approximate multipliers. The simulation results demonstrate the efficiency of proposed designs. [ABSTRACT FROM AUTHOR]

This article is an interesting substrate material for environmental-friendly printable electronics. In this study, screen-printed RFID tags on paper substrate are examined. Their reliability was tested with low temperature, high temperature, slow temperature cycling, high temperature and high humidity and water dipping test. Environmental stresses affect the tag antenna impedance, losses and radiation characteristics due to their impact on the ink film and paper substrate. Low temperature, temperature cycling and high humidity did not have a radical effect on the measured parameters: threshold power, backscattered signal power or read range of the tags. However, the frequency response and the losses of the tags were slightly affected. Exposure to high temperature was found to even improve the tag performance due to the positive effect of high temperature on the ink film. The combined high humidity and high temperature had the most severe effect on the tag performance. The threshold power increased, backscattered power decreased and the read range was shortened. On the whole, the results showed that field use of these tags in high, low and changing temperature conditions and high humidity conditions is possible. Use of these tags in combined high-humidity and high-temperature conditions should be carefully considered. [ABSTRACT FROM AUTHOR]

This paper proposes an efficient design of Hamming (11, 7) encoder utilising Full Swing-Gate Diffusion Input (FS-GDI) approach in 65 nm technology nano-size node. The proposed design of Hamming codes aims to improve the power and area efficiency through reducing of transistors count by employing power-efficient logic style. Encoding circuits of Hamming code (11, 7) and (7, 4) are designed using the various traditional and proposed approaches. The amount of consumed power, delay time, Power Delay Product (PDP) and hardware simplicity are employed as a metrics for evaluating the efficiency of the proposed designs of encoding circuits. The simulation experiments are executed utilising Cadence Virtuoso simulator package. These experiments revealed that the proposed designs of Hamming encoding circuits achieve delay time reduction by 50.91% and 20% for Hamming codes (7, 4) and (11, 7), respectively. Also, hardware (H/W) simplicity and area efficiency of the circuits are improved by 50% compared to CMOS-based circuits. From the results analysis, the proposed FS-GDI based Hamming encoding circuits achieve efficient power and delay optimising. Hence, the power consumption, delay and area in communications systems and DSP circuits due to encoding process are reduced. The whole performance of DSP circuits can be more power/area efficient. [ABSTRACT FROM AUTHOR]

In this paper, a Dickson-based RF-DC (Radio frequency power to direct current power) rectifier for energy harvesting system is designed. Dickson double-voltage structure, voltage-dividing structure and switching transistors are integrated in the system to fulfil the synchronous rectifying function, which can upgrade PCE (Power Conversion Efficiency) value, reduce the threshold voltage and decrease the leakage current, etc.. The simulation is conducted on the designed synchronous rectifier for energy harvesting of 900 MHz signal. It shows that when the input voltage $${V_{IN}} = 1V$$ V IN = 1 V , the peak output DC voltage can be stabilised at 1.8 V with the assistance of LDO (Low dropout) regulator, while the reverse leakage current is below 20 µA and the PCE value reaches 58%. The designed rectifier is assembled and tested in the paper. Both the simulation and testing results demonstrate the feasibility of the proposed synchronous rectifier. [ABSTRACT FROM AUTHOR]

This paper describes a printed Thai character recognition method which uses topological properties. The recognition system is divided into two stages. In the rough classification stage, a thinning technique is applied to eliminate noise and fine features. The thinned characters are separated into cluster domains by using a linear decision function based on the height and width of each character. In the fine classification stage, the ‘connected numbers’ of points in the character pattern are computed. Topological properties are then used to distinguish between the characters. [ABSTRACT FROM AUTHOR]

A method of comparing the basic performance of electron guns is described. The method is applied to some recently computed results on two versions of an electron gun which has a hairpin-filament cathode.
In an interesting and useful paper by Worster (1979 a), hereafter referred to as JW, computed results are given relating to two electron guns. When the performance of the guns was compared it was concluded that one gun was better than the other in all respects. However, in making the comparison the electron beam divergence was not taken into account. Although the method of comparison used in JW may, of course, be satisfactory for some purposes, the computed results in JW are comprehensive enough to provide information for an alternative method of comparison which includes beam divergence. Such an alternative method, described in this note, leads to different conclusions. [ABSTRACT FROM AUTHOR]

Examines the characteristics of travelling waves along the non-linear transmission lines for monolithic integrated circuits. Analysis of slow-wave structures like MIS and Schottky-barrier strip lines; Examination of suitable equivalent circuits leading to characteristic wave equations; Parameters of the non-linearity, dispersion and dissipation and the boundary conditions of practical devices.

Examines the use of distributed, monolithic travelling-wave amplifiers. Guidance on reducing amplifier noise by rendering dipole-domain-generated noise contributed by the individual field effect transistor (FET); Use of insulated gate FET to permit higher gate breakdown voltage operation in the accumulation mode; Reduction of even harmonics and the improvement of efficiency.