1. Efficient modulo 2 n +1 multiply and multiply-add units based on modified Booth encoding.
- Author
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Efstathiou, Constantinos, Moshopoulos, N., Axelos, N., and Pekmestzi, K.
- Subjects
- *
COMPUTER engineering , *MULTIPLICATION , *MULTIPLIERS (Mathematical analysis) , *ELECTRICAL engineering , *COMPUTER science , *VERY large scale circuit integration - Abstract
Abstract: In this work a new efficient modulo 2 n +1 modified Booth multiplication algorithm for both operands in the weighted representation is proposed. Furthermore, the same algorithm is extended to realize modulo 2 n +1 multiply-add units. The derived partial products are reduced by an inverted end around carry-save adder tree to two operands, which are finally added by a modulo 2 n +1 adder. The performance and efficiency of the proposed multipliers are evaluated and compared against the earlier modulo 2n+1 multipliers, based on a single gate level model. Comparisons based on experimental CMOS implementations for both the multiply and multiply-add units are also given. The proposed multipliers yield area and power savings by an average of 15% and 10% respectively, while the corresponding area and power savings of the proposed multiply-add units are 14% and 21% respectively. [Copyright &y& Elsevier]
- Published
- 2014
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