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An efficient design of linear phase, FIR structure for amplitude response, approximating [1/ω] (an integrating Hilbert transformer), suitable for the midband frequency range has been proposed. Mathematical formulas for computation of weights have been derived. These weights turn out to be invariant to the order of the filter, and are, therefore, universal in nature. This property is expoited to harness the proposed design with facility of variable orders of the sturcture maintaining the optimality criteria for all possible orders. A versatile structure for such a purpose has also been given.

A straightforward method has been suggested for the design or FIR notch filters starting from a second-order DR prototype. By appropriate choice of its length, the frequency response of the designed FIR Filter can be made to match that of the llR prototype very closely. Explicit mathematical formulas for computing the required weights have also been given.

This paper proposes implementation of the Modified Discrete Sine Transform (MDST) and Inverse MDST (IMDST) using recursive structures. The formulae required for recursive structures have been derived. Discrete Hartley Transform (DHT), a real-valued transform, is closely related to Discrete Fourier Transform (DFT) of a real-valued sequence and hence its use as an alternative to the Fourier Transform avoids complex arithmetic. This paper presents Modified Discrete Hartley Transform (MDHT)/Inverse MDHT (IMDHT) using Modified Discrete Cosine Transform (MDCT)/ Inverse MDCT (IMDCT) and MDST/Inverse MDST (IMDST) recursive structures. The proposed structures are used for simultaneous computation of MDCT/MDST/MDHT of length N (divisible by four) and their Inverse (IMDST/IMDHT). The proposed structures are parallel, simple, regular and therefore highly suitable for VLSI implementation.

In this paper, novel very-large-scale integration (VLSI) algorithms for computing the Discrete Sine Transform (DST) and its inverse (IDST) are proposed. By respectively folding the inputs, the DST kernels are derived to realize it through Infinite-impulse response (IIR) structure. Single folding algorithm provides data throughput two times of that achieved by the conventional methods. The double folding recursive algorithms for DST and IDST have been suggested, which reduce the computation cycles to one forth of that in the single folding method. Moreover, the regular and modular properties of the proposed recursive structures are easily amenable to VLSI implementation.