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High-temperature electrical performances of enhancement-mode (E-mode) high electron mobility transistor with p-type Gallium Nitride (GaN) gate cap are evaluated here. The physics-based mechanisms behind the behaviours are also analysed by the simulations and analytical models. For static electrical performances, the changes of GaN bandgap and the interface states or traps are considered to be influential factors for the little variations of threshold voltage ( V T ). Meanwhile, the on-state resistance increases and trans-conductance decreases at high temperatures due to the reduction in electron mobility ( μ eff ). As for blocking characteristic, high temperature-induced increase of leakage current may result from multi-reasons, such as the increase of intrinsic carrier concentration and lowering of trap barrier. In addition, a segmental method is presented to understand the gate leakage current at high temperatures. For capacitance characteristics, the increase of channel resistance makes the measured gate capacitance lower than the intrinsic value. For dynamic electrical performances, the high temperature-induced decrease of μ eff leads to the increase of plateau voltage, bringing the decreases of total switching time and total switching energy loss, which are quite different from those of the devices with traditional metal-oxide-semiconductor structures.

To improve the constant output voltage accuracy of primary-side controlled flyback converter, this study described a digital control scheme based on accurate sampling and cable voltage drop compensation. The voltage drops of output diode and the cable were analysed first, they were two most important factors that influence the accuracy of output voltage. Then, an accurate sampling method that can eliminate the voltage drop of the output diode was proposed. With output current estimating and digital resistance capacitance (RC) filter, the compensation of cable voltage drop was also designed. Finally, the software simulation and prototype test results verified the proposed scheme, and the constant voltage accuracy of the prototype achieved −0.6 ∼ +0.6%.

This study described a novel digital regulation scheme for multimode primary-side controlled flyback converter. This approach ensured good energy continuity at the modes transition points of the converter. Compared with the normal control methods, the proposed digital regulation scheme could achieve smooth modes transition and suppress the large output voltage ripple when the converter works at the boundaries of different working modes. A prototype of a multimode primary-side controlled flyback converter had been made to verify the proposed digital regulation scheme.

This study analyses electromagnetic interference (EMI) noise sources generated from a new type of flyback converter which is operated from a self-supplied power control integrated circuit (IC). On the basis of analysis, a new analytical mathematical model of common-mode (CM) EMI noise path is presented. This model is easier to construct and allows researchers to better understand the impact of each parameter on CM EMI noise than former models. According to the proposed model, the capacitors from the traces connected to the ground (GND), voltage drain drain (VDD), current sense (CS) and feedback (FB) pins to the ground demonstrate the greatest impact on CM EMI. Two improved layouts are designed to verify the analysis result. The layouts were driven by the newly developed model. Test results show that they correspond with theoretical calculations supporting the analysis and the model that was developed in the course of this work.

A novel zero-steady-state-error (ZSSE) compensation technique based on an accurate small signal model of peak current mode buck converter is proposed for optimising the microprocessors with low power consumption needing high-definition voltage scaling. This technique eliminates the steady-state error of output voltage without negatively affecting the transient response. The main parasitic parameters of the buck converter are taken into consideration to design an excellent ZSSE compensation module; the relationships between the parameters of the compensation circuit and parameters of the other parts of the converter have been derived in this study. This technique has been implemented on a prototype. The validity of this method is shown and confirmed by test results.

For optimising the peak current mode buck converter's transient response in the application of dynamic voltage scaling, an accurate small signal model of the converter under continuous conduction mode is built. The switch conduction loss, dead-time and other main parasitic parameters are considered in the presented model. Based on the model, a novel compensation network for the voltage loop is proposed, which eliminates the zero point of the voltage loop. The relationship between the gain of the proposed compensation network and the transient response of the output voltage relative to the reference voltage ( V ref ) at the input node of error amplifier is investigated. By this way, an optimal gain for the transient output voltage is obtained and the optimaltransient response without overshoot and oscillation relative to V ref is validated by the circuit simulations and tests.

In order to improve the light-load efficiency of active clamp forward converter with synchronous rectifier (SR), power loss analysis of the converter operating in continuous conduction mode (CCM) and discontinuous conduction mode (DCM) are presented in this study. The light-load efficiency of normal ACF converter with SR is low because the output inductor current can go negative when operating in CCM. Considering the fixed frequency control only, to shift the converter's operating mode from CCM to DCM at a critical point of output current at light-load is a solution for efficiency improvement. Based on the CCM and DCM power dissipation models proposed in this study, the power loss characteristics of the converter are analysed, and the critical shift point of output current can be derived, which has also been verified by an experimental prototype.