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This paper presents an empirically grounded model, which links organizational learning to pattern-specific fixed costs in integrated device manufacturing. The approach described in this paper helps fab managers make fundamental strategic decisions concerning product design and product mix by engaging in scenario planning. Four critical aspects of managing pattern-specific fixed cost are analyzed in detail—sensitivity to time, design cost, and production volume; platform designs; process postponement solutions; and design penalties. The model suggests that designers and fabrication facilities must collaborate extensively on the design and realizations of product platforms for state-of-the-art integrated circuit products to remain economically viable.

Almost one year ago, we sent selected authors who had presented at the SEMI Advanced Semiconductor Manufacturing Conference 2015 the following letter.

This paper describes an empirical study that assesses the economic value of various forms of organizational learning that are common in semiconductor manufacturing. This study considers three business environments: very large-scale integrated circuits, commodity components, and specialty parts with high value added. This study finds that the economic value of organizational learning varies over time, the relative economic value of different learning practices varies over time, the external economic environment strongly influences the economic value of different learning practices, the economic value of learning can be positive or negative, and the synergy between different kinds of learning can be positive or negative. The primary contribution of this paper is an empirically grounded model of organizational learning in the semiconductor manufacturing industry, which potentially enhances the profitability of semiconductor manufacturing ventures. The model helps practicing managers make investment decisions through scenario planning and identifies learning strategies that are tailored to their particular economic environment. This paper also provides insight into the structure of technological knowledge in semiconductor manufacturing, which has historically been treated as a black box.

An empirically grounded model characterizes the challenges of modern multiproduct manufacturing, where products that operate in highly contrasting economic environments run in one fab. Three product classes are taken into consideration-VLSI circuits for which unit sales prices are highly time dependent; specialty chips for which unit sales prices and total demand are specified a priori; and commodity components whose unit sales prices are low, predictable, and either flat or cyclical. The model calculates the impact of manufacturing cycle time on cost structure and the ability to generate revenue, and it simulates the economic consequences of a variety of production plans involving the three product classes. The findings of this paper suggest that an integrated approach to managing scale, scope, and fab cycle time can bring about dramatic increases in fab performance as measured by the net profit that the fab accumulates.

An empirically grounded model of a fab operating curve that is sufficiently accurate to make capitalization decisions has identified preferred domains of fab performance. This finding contradicts extant theory, which argues that all operating points on the same operating curve should reflect the same level of performance. The model is used to simulate the performance of a stylized fab that operates under realistic conditions. Results of the simulation show that significant additional revenue and profit can be generated by extending the lean approach to managing the operating curve that is practiced in most fabs today to an approach that is both lean and value driven.

A survey-based, empirical study that benchmarks the productivity of photomask manufacturers has led to some significant conclusions. First, the wide variation in the productivity indicators from company to company suggests that all participants may have significant cost-reduction opportunities within their operations. Second, the high downtime of pattern generation tools is limiting productivity. Third, producing smaller feature sizes is correlated to an investment in engineering and experimentation capacity. It could not be confirmed that photomask manufacturers are successfully taking advantage of economies of scale, suggesting that the outlook for profitability of many photomask manufacturers is precarious.

An empirical study of the economics of manufacturing photomasks concludes that the uncontrolled growth of optical proximity effect correction and resolution enhancement techniques is driving up the cost of pattern generation and mask inspection to levels that threaten the profitability of photomask manufacturing. The intrinsic cost of some leading edge photomasks has already exceeded the price that customers are willing to pay for them. A model of the lifecycle of photomask manufacturing, developed from interviews involving the 1990-to-2005 operations of six mask shops and a survey of seven photomask manufacturers, shows that design for manufacturability (DFM) constitutes the most promising approach for alleviating this market impasse. Unilateral action by mask shops to increase their capital productivity is necessary but insufficient and perhaps unaffordable. DFM solutions will require the majority of participants in the lithography value chain to collaborate according to a volatile demand schedule that is driven by semiconductor manufacturers

A model based on information theory, which allows yield managers to determine an optimal portfolio of yield analysis technologies for both the R&D and volume production environments, is presented. The information extraction per experimentation cycle and information extraction per unit time serve as benchmarking metrics for yield learning. They enable yield managers to make objective comparisons of apparently unrelated technologies. Combinations of four yield analysis tools - electrical testing, automatic defect classification, spatial signature analysis and wafer position analysis - are examined in detail to determine the relative value of ownership of different yield analysis technologies.

A broadly based empirical study of problem-solving practices in the semiconductor industry reveals that the inability to transfer knowledge rapidly is limiting the profitability of semiconductor, manufacturers. Extremely high user loss rates force users and suppliers of semiconductor process and diagnostic technology to solve problems as rapidly as possible. Unfortunately, both sides possess knowledge that is required to solve problems but cannot be transferred rapidly enough for extensive losses to be avoided. Collaboration between users and suppliers, in which problem solvers physically relocate from one side's site to the other's, is minimizing losses but creating a shortage of experts that threatens the health of the industry. A series of practices that will reduce the cost of knowledge transfer is presented. Foremost among these is the establishment of an Internet-enabled toolkit for remote diagnostics and repair.

An integrated framework for yield management and defect/fault reduction is presented. A 3D space consisting of a quality axis, a process integration axis, and a scaling axis encompasses all process and manufacturing parameters. Cross-functional teams of process, equipment, operations, and materials personnel proactively explore this space, and provide process engineers with a stable and capable environment for process development and manufacturing activities. >

The multipurpose mask set described, which consists of three stepper reticles, contains 95% of all test structures required for CMOS process development and random defect detection, thereby dramatically reducing the stepper reticle inventory and the frequency of reticle changes. Realizing the mask set by two dozen standard unit processes minimizes the feedback loop for defect density data, parametric data and unit process data. >

The special section on engineering and technology management is dedicated to identifying and describing the state of the art in engineering and technology management as it pertains to semiconductor manufacturing. Each of the five papers in this special section proposes a detailed technical solution to a real-business problem germane to today's semiconductor manufacturers, and identifies business results through proof-of-concept or final implementation.