Search

High-frequency resonance (HFR) in the modular multilevel converter (MMC) has been reported in recent years frequently, yet, existing focuses on HFR are limited to the specific control strategy or grid condition, from which the conclusion may be not applicable if the control or grid changes. In this article, a unified MMC high-frequency impedance model (UHFIM) is proposed to fill this gap. By changing the gain of the model, UHFIM can reflect the high-frequency characteristics of the MMC under different control strategies in a unified form, which provides a theoretical basis for the general HFR suppression method. Analysis based on UHFIM reveals the worst cases of the HFR risk and the constraint of low-pass filter (LPF) order on the convergence of MMC high-frequency damping. In order to suppress HFR, this article proposes a joint design method for LPF and passive damper, which can completely remove the HFR risk from the entire high-frequency range without sacrificing too much dynamic performance of MMC, and it works no matter how the grid impedance varies. Besides, in the case that the damper cannot be installed, an alternative HFR suppression method based on delay time adjustment is also developed. Finally, the proposed unified model and the HFR suppression methods have been verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

This article proposes a coordinate impedance compression strategy for high frequency inverter systems. Based on a two parallel inverter structure, the strategy adopts two methodologies: 1) a passive LC network to adjust the current and voltage seen by each inverter module, and 2) an active modulation of the inverter input voltage and output voltage phase to adjust the load current distribution. For the proposed strategy, the resistance and reactance can be compressed coordinately, which can help the inverter to operate in high efficiency load range. The Half-Bridge Class D inverter is taken as an example to be analyzed. A 10-MHz prototype is built and the experimental results verify the correctness and feasibility of the proposed strategy. [ABSTRACT FROM AUTHOR]

A novel online multiparameter identification method is proposed for interior permanent magnet (IPM) machines considering cross-coupling magnetic saturation. The identification method is based on the combination of small-signal impedance model and fundamental frequency signal model under dq-axes. To analyze the nonlinearity of IPM machines, cross-coupling magnetic saturation effect is introduced into online multiparameter identification for the first time. Based on this model, a phase compensation strategy and orthogonal decomposition in phasor domain is proposed to decouple the complicated mathematical model into four linear equations. By injecting voltage small-signals into dq-axes, multiparameter of IPM machine including adjusted apparent inductance, incremental self-inductance, incremental mutual-inductance can be identified online in a wide operation region. During this process, no additional computing equipment is required. The proposed method is carried out on a tested IPM machine and verified by the finite-element analysis. [ABSTRACT FROM AUTHOR]

Medium-voltage silicon carbide (SiC) power modules are a critical component in grid-bound power conversion systems, and the packaging of these modules dictates the performance and reliability of the systems. One of the key issues for packaging the modules is managing the tradeoff between heat dissipation and insulation. To improve thermal performance without sacrificing insulation, a 10-kV SiC full-wave diode rectifier was designed and fabricated by incorporating double-sided cooling and wirebond-less interconnection and by utilizing thin alumina direct-bond copper substrates. To ensure that the substrates met insulation requirement, triple points on the substrates were coated by a nonlinear resistive polymer-nanoparticle composite to reduce electric field concentration. The nonlinear resistive coating increased the partial discharge inception voltage of the substrate with 0.5-mm thick alumina to 17.3 kV, an 84% improvement over that of the substrate without the coating. Electrical and thermal simulations of the module showed a low power loop inductance of 3.51 nH and a low junction-to-case thermal resistance of 0.114°C/W. The feasibility of the packaging techniques was demonstrated from successful fabrication and functional testing of the packagedmodule. [ABSTRACT FROM AUTHOR]

This article presents a piezoelectric energy harvesting interface circuit with high adaptability to external inductors, transducer types, and vibration frequencies. High output power can be obtained with the help of triple bias-flip and optimal flipping time control. The triple bias-flip enables both higher efficiency and the use of an inductor with lower volume compared to conventional bias-flip topologies. Besides, owing to the highly adaptive circuit design and reverse current reduction in the LC resonant loop, the proposed interface circuit not only automatically adjusts flipping time according to external inductance and piezoelectric transducer, but also reduces the reverse current of the inductor effectively. Also, an active rectifier that can reduce conduction loss of the diode-based rectifier has been implemented. The prototype integrated circuit has been fabricated in 180-nm CMOS technology and the chip area is 0.646 mm2. The measurement results show that the proposed circuit achieves cold start-up without any external power supply, and can work with high efficiency when the external inductor is varying from 0 to 10 mH, transducer capacitance is changing from 20 to 90 nF, and vibration frequency is ranging from 35 to 200 Hz. The measured maximum output power of the proposed design can achieve as high as 473% enhancement to the full-bridge rectifier. [ABSTRACT FROM AUTHOR]

Under the background of clean energy connected to the grid, the high-capacity power electronics device integrated gate commutated thyristor (IGCT) has a bright future. In order to increase the convenience of replacement and longevity of service, a novel detachable gate driver unit (DGDU) concept for IGCT is proposed in this letter. To ensure the turn-off capability, both connection scheme and board optimization on DGDU are applied to minimize the stray inductance. Besides, the effects because of the detachable connecter on the structure and thermal characteristics are analyzed. Afterward, an overlapping scheme of DGDU with ultralow inductance is proposed for IGCT. Finally, a 4-inch prototype and a single-phase full-bridge platform are developed for the test. The turn-off capability of DGDU is verified by pulse experiment, which could turn-off a 5 kA current successfully. The stray inductance of DGDU is calculated based on the experimental result and is only 4% larger than conventional GDU, which means the commutation capability has little decrease. Furthermore, the continuous running reliability is verified by 2200 V-dc-voltage, 1300 A-effective-current power cycling experiments. [ABSTRACT FROM AUTHOR]

Switched-capacitor (SC) multilevel inverters (MLIs) offer various advantages over conventional series MLIs owing to the operation from a single dc source, self-balanced capacitor voltages, and inherent voltage gain. However, these advantages come at the cost of high current stress on the capacitors, associated semiconductors, and the dc source. This inrush current has limited the practical application of SC-MLIs to a fractional kilowatt rating. This article proposes a practical solution by introducing a unity gain nine-level active-neutral-point-clamped SC-MLI with an alleviated capacitor charging current. Switching loss in the SC circuit semiconductors is reduced by using a modified switching sequence that allows the charging current to flow with a minimum interruption till it is turned off at zero-current crossing. The structure also integrates protection against the detrimental effects of voltage transients across the charging inductor. The inverter exhibits a maximum efficiency of 98.03% at 583.91 W output power. Compared with similar SC-MLIs with hard-charging, the proposed inverter significantly reduces the losses and improves efficiency. Experimental results from a 2 kVA laboratory prototype validate the theoretical analysis and show the capacitor voltages stable under varying load impedance and modulation index. [ABSTRACT FROM AUTHOR]

The wireless heat transfer (WHT) system is proposed to ensure the reliability and flexibility of the electrical heat tracing for domestic and industrial applications. In this article, the inherent coupling relationship among coil dimension, resistance, distance, and inductance of a WHT system is investigated, which illustrates the intrinsic link between thermal energy and electromagnetic feature of the WHT system under multiple mediums. Besides, the magnitude and distribution of the thermal energy among different coils are analyzed according to equivalent circuits and magnetic coupling mechanisms. For further studying the power distribution characteristic, the power flow model of the multiple coil system is established. On this basis, the uniform thermal energy distribution scheme of the WHT system is proposed to ensure all coils have equal heating power. Moreover, the heating power in the partial compensation condition is also investigated. The result indicates the compensation states of the transmitter coil only affect the magnitude of the heating power. Thus, the transmitter coil compensation states which can be used to adjust the heating capacity of the WHT system. The simulation and experiments are carried out to validate the feasibility of the proposed uniform thermal energy distribution scheme. [ABSTRACT FROM AUTHOR]

In this article, a promising design of power electronics in the field of battery electric vehicles is proposed. The presented parallel enhanced commutation integrated nested multilevel inverter is a symmetrical cascaded multilevel inverter characterized by a minimal number of semiconductor switches compared to its range of functions. In addition to regular four-quadrant operation, the topology is able to reconfigure individual battery cells between serial and parallel interconnection to minimize the internal resistance of the reconfigurable battery system during operation. In particular, by separately considering the internal resistance of the power electronics and the variable internal resistance of the reconfigurable battery, a minimum overall internal resistance is achieved. After a detailed review of related modern topologies, the topology’s inherent structural advantages are presented. Functional spectrum, internal resistance, and efficiency behavior are compared with related topologies frequently studied in the literature. Measurements on a 17-level three-phase prototype show the function and performance of the proposed structure in terms of functional spectrum, low total harmonic distortion, and efficiency. It turns out that the parallel enhanced commutation integrated nested multilevel inverter is a competitive topology that should be investigated further. [ABSTRACT FROM AUTHOR]

A silicon/silicon carbide (Si/SiC) hybrid switch (HyS), comprised of a high-current Si insulated gate bipolar transistor and a low-current SiC metal oxide semiconductor field effect transistors, gains attention because it offers lower on-state loss under both light and heavy loads. However, the dynamic overcurrent stress experienced by the HyS under the heavy load has to be coped with to avoid reliability degradation and the maximum current rating limitation. This article comprehensively studies how gate resistances regulate the dynamic behavior of the HyS under the heavy load condition. Experiments and analyses are conducted for both turn-on and turn-off processes. It is found that the gate resistance is important for not only the dv/dt control but also the overcurrent suppression. Moreover, the lower switching loss can be achieved by adjusting gate resistances when the HyS operates at a heavy load, compared with the gate timing control. A guideline is developed for the design of the gate resistances. This study offers an insight into the role of gate resistances in switching performances of the HyS and an alternative way of coping with the dynamic overstress stress. [ABSTRACT FROM AUTHOR]

Class-E power amplifiers are widely used in megahertz frequency power conversion systems due to their high efficiency, which can further be enhanced by virtue of wide-bandgap devices such as GaN high-electron-mobility transistors. Here, a GaN-based cross-quadrant mode Class-E amplifier is proposed, which addresses one of the major challenges for such amplifiers, i.e., to achieve both high power and high efficiency with low-voltage-rating devices. By utilizing the reverse conduction of GaN transistors, a cross-quadrant mode Class-E amplifier with small dc-feed inductance is constructed, whose circuit model is derived by virtue of the Laplace transform technique. We demonstrate an experimental prototype operating at 3.11 MHz with a 100-V GaN transistor, achieving an output power of about 6 W with the efficiency being almost 90% when the input voltage is 10 V and the load resistance is 28 $\mathrm{\Omega }$. Compared with conventional Class-E amplifiers, the power conversion capability of the proposed amplifier is increased up to three times from 0.49 to 1.69 with a slight reduction in efficiency. Such cross-quadrant mode amplifiers can be used to improve the power conversion capability and to reduce the peak switch voltage at the same output power level. [ABSTRACT FROM AUTHOR]

This article presents a sensorless control strategy by injecting high-frequency (HF) voltage into the d-axis for the interior permanent magnet synchronous motor (IPMSM) in the full speed range. The defined quadratic virtual back electromotive force model can be adopted in the full speed range, and thus, there is no need to design a transition algorithm from the zero–low speed to the medium–high speed. Besides, the accurate model of IPMSM is applied to eliminate the error caused by ignoring the stator resistance. Furthermore, the estimation error caused by the filter and system delay during demodulating the HF current in the conventional HF voltage injection method is avoided. Compared with the method of injecting HF voltage into the q-axis, the proposed method has smaller torque ripple and smaller injected voltage. The effectiveness of the proposed method is verified by experimental results. [ABSTRACT FROM AUTHOR]

Although the wireless charging system (WCS) achieves flexible power transmission, high system operating performance needs strong anti-misalignment capability and excellent charging controllability. Hence, this article proposes a mistuned WCS that features dual transmission channels using half-bridge inverters, magnetic flux controlled inductors (MFCIs), magnetic couplers with hybrid coils (HMCs), and the series–series compensation. Then, high misalignment tolerance and high-efficient constant power (CP) charging are achieved. First, the interrelation among the mutual inductance, adjustable inductance, load resistance, charging power, and system efficiency is analyzed based on the optimally designed system structure. Second, the circuit structure and working principle of the MFCI are illustrated. Third, the anti-misalignment capability of the optimized HMC is verified by analyzing its coupling characteristics. Then, the relative spatial position between the two HMCs is determined to ensure the negligible cross-coupling influence. In addition, the closed-loop controller's working principle and design method is analyzed to achieve high-efficient and high-controllable CP charging within a wide range of misalignment distance and load resistance. Finally, the experimental results validate the feasibility of the proposed WCS. For CP charging of 150 W, x- and y-direction misalignment ranges reach ±95% and ±47%, and system efficiency exceeds 90%, superior to the commonly used anti-misalignment methods. [ABSTRACT FROM AUTHOR]

This article describes the design and performance of a dielectric fluid cooling concept for automotive power electronics. The concept combines a low-thermal-resistance package (which eliminates metalized ceramic substrates) with a high-performance convective cooling strategy (slot jets impinging on finned surfaces). Modeling was first used to design the cooling system to maximize thermal performance and minimize pumping power. A prototype was then fabricated, and experiments were conducted to validate the model predictions using three fluids at various fluid flow rates (16.7 cm3/s [1 L/min] to 68.3 cm3/s [4.1 L/min]) and inlet temperatures (30 °C and 70 °C). The final design was compact (120-cm3 total volume, including heat exchanger and conceptual power modules) and cooled 12 devices (e.g., silicon carbide [SiC]). The validated model was then used to predict the junction-to-fluid thermal resistance and pumping power for various conditions, including −40 °C fluid temperature. The results predict thermal resistance values as low as 19 mm2·K/W is possible using the dielectric fluid cooling approach. The dielectric fluid cooling system is predicted to provide thermal resistance and pumping power values that are approximately 56% and 90% lower, respectively, compared to an automotive power electronics cooling system. Moreover, the dielectric fluids can be used for direct cooling of the bus bars, which can be an effective capacitor and gate driver cooling strategy and enable the use of new driveline fluids tailored for this application. [ABSTRACT FROM AUTHOR]

In this article, an online dual-parameter identification strategy for linear induction motors (LIMs) is investigated. Considering the influence of unique end effects in LIMs and the critical impact on control system performance, the magnetizing inductance and secondary time constant are chosen as the targets of estimation. Compared with rotary induction motors, the influence factors in LIMs are much more complex, which can heavily affect the parameter value especially for the high-speed condition. As a result, the online identification is vital for high performance applications. Based on the model reference adaptive system with magnetizing current as state variable, this article starts from the adaptive law of secondary time constant derived by Popov's criterion for hyperstability. Then, the physical significance and stable range are analyzed in details, based on which a handy magnetizing inductance identification method is combined. To further ensure the precision of estimation, one simplification scheme is specially designed. Besides, to eliminate the pure integrator, the derivatives of magnetizing current are chosen as the state variables. Finally, the dual-parameter identification system that utilizes only one PI controller and has low coupling property is constructed. Comprehensive simulation and experiments have fully demonstrated the effectiveness and superiorities of the proposed method. [ABSTRACT FROM AUTHOR]

Relying on the advantages of small size, good controllability, and consistency, printed circuit board (PCB) inductors are being widely used. For PCB inductors, reducing copper loss is one of the key issues. Although some research works focus on fringing effect in PCB planar winding, there are few methods to reduce proximity loss for PCB inductor. Regarding the abovementioned issues, this letter first improves the Ferreira’s 1-D copper loss model to accommodate the core feature of PCB winding: variable number of turns per layer. With this model, pyramid theorem is proposed that putting the layer with fewer turns into positions farther away from the air gaps can lower the total winding loss. Based on the theorem, this letter proposes a novel PCB inductor-winding structure named pyramid winding, which has fewer (or equal) turns on layers farther from air gaps. Pyramid winding has less copper loss, fewer copper layers, smaller size, and lower cost. In the experiment, inductor prototypes with the same six turns and ferrite pot cores but different PCB winding arrangements are built for a 300-kHz 2700-W LLC converter. Tests on inductor resistance and converter efficiency are done, and the pyramid theorem and the effectiveness of pyramid winding are verified. [ABSTRACT FROM AUTHOR]

Wind turbines (WTs) are prone to lose the synchronization during severe grid faults due to the absence of equilibrium point. To cope with the issue, this letter proposes a power compensation control for doubly fed induction generator based WT to enhance the transient synchronization stability from the new perspective of active power balance. In the method, the active power of WT is controlled to compensate the power loss on the network. Compared with the existing methods, the proposed method has more widely application scenarios because it avoids using the frequency error as control signal. Experimental tests are performed to validate proposed method. [ABSTRACT FROM AUTHOR]

A dc arc faultdetection has been studied to improve the reliability of renewable energies and energy storage systems. In this Letter, the control algorithm of dc optimizer is proposed to detect the dc series arc fault condition between the PV panel and dc optimizer. The operational principle of the detection algorithm considers the characteristics of both the PV panel and arc fault, which can detect and extinguish the dc series arc fault condition. The validity of the proposed algorithm is verified through the simulation and experimental results. [ABSTRACT FROM AUTHOR]

Wireless charging of automated guided vehicles (AGVs) has been widely used because of its high security and convenience. However, due to the inevitable misalignment between the coupling coils, the charging system cannot maintain the constant current (CC) or constant voltage (CV) output. Therefore, this article proposes a misalignment-tolerant fractional-order wireless power transfer (FOWPT) system with CC or CV output. According to the principle of the fractional-order autonomous circuit, the natural resonant frequency and operating frequency can be adjusted adaptively with the change of transfer distance and load. Benefiting from the frequency characteristics and the new implementation method of the FOWPT, the system maintains CC and CV output, and the horizontal and vertical misalignment tolerances are within 44.4% and 22.2%, respectively. Therefore, the proposed system improves the freedom and convenience of charging, and provides a new wireless charging solution for AGVs. Future article will focus on more concise modeling and implementation methods of fractional-order systems, and improving the performance of the FOWPT. [ABSTRACT FROM AUTHOR]

The lowest input voltage for a single-inductor switched-inductor (SL) boost charger to draw power is critical for energy-harvesting applications. When a battery is fully discharged, the charger solely relies on the millivolt input-source voltage vS to wake the system. When the charger is awake and operates in static mode, it needs to draw power from low voltage vS efficiently. Thus, the major contribution of this article is theorizing the fundamental limits of SL converters, and experimentally validating the lowest vS possible for a single-inductor boost to operate, both in wake and static mode. This article derives closed-form design expressions for all circuit components and validates the design theory with a 1.6-μm CMOS prototype. When source resistance is 350 Ω, this prototype validates that the lowest-possible vS for SLs in wake mode is 225–285 mV. In static mode, the lowest-possible vS for SLs is 40 mV. Despite recent literature shows that switched-capacitors (SCs) can wake with lower vS, theorizing and experimentally validating the lowest vS possible for SL converters can prove the fundamental limits of SL chargers. Moreover, since this article also validates that SLs operate with lower vS than SCs in static mode, thus, SC-SL hybrids are the best system. [ABSTRACT FROM AUTHOR]

This article proposes a grid-forming based decoupling approach, which effectively mitigates the dynamic interactions between active and reactive power, especially suitable for system stabilization in ultrastrong grids with short-circuit ratio over 30. The physical coupling behaviors are first revealed by analytical studies, where two potential resonances, respectively, located in 40–50 Hz and 0–10 Hz are discovered with mathematical proofs. Based on the results, the decoupling controller is then designed with transfer function approximation for practical usage. The control method not only suppresses the couplings but also cancels two pairs of conjugate poles through decoupling paths. Thanks to the cancellation, the stability margin is remarkably increased in stiff grids, and therefore, a significant bandwidth boost on the power synchronization control can be realized if desired. The experimental results are finally performed to verify the proposed decoupling method. [ABSTRACT FROM AUTHOR]

This article proposes a new low-impedance transient-current enhanced (LTE) buffer, which is applied for low-dropout regulator (LDO) with large off-chip capacitor. The LTE buffer is based on current-shunt feedback technique and two ac coupling networks, which can achieve an extremely low output impedance and high charging/discharging current of the gate of power transistor at load transient response, while maintaining low-quiescent current consumption under the full-load range. In addition to containing the LTE buffer, the proposed LTE-LDO employs recycling-folded-cascode amplifier as the error amplifier, which has the advantage of high loop gain, loop bandwidth, and current efficiency. Meanwhile, simple Miller compensation with a nulling resistor is employed for frequency compensation and a complete small-signal analysis under different load current conditions is given in this article. This design has been implemented in semiconductor manufacturing international corporation 0.18 $\mu$ m complementary metal–oxide–semiconductor process and the experimental results show that the quiescent current consumption is about 48 $\mu$ A, and the maximum current efficiency of the LTE-LDO is 99.976 $\%$. The measured transient response shows that under the condition of 1 $\mu$ F load capacitance, when the load current changes to 200 mA/100 ns, the output voltage change is 76 mV. [ABSTRACT FROM AUTHOR]

In wireless power transfer (WPT) system, the information of mutual inductance and load resistance is usually needed for the front-end to regulate power and efficiency. To acquire the values of these two parameters without wireless communication system and without affecting the output power, this article proposes an identification method based on the pulse density modulation (PDM) technique. The underlying principle is to obtain a range of interharmonics by altering the sequence of PDM. First, the PDM strategy brings in interharmonics, which can be identified through fast Fourier transmission (FFT). Then, these interharmonics are used to established multiple sets of equation related to front-end impedance and the two unknowns. Finally, with the least-square approximation, mutual inductance and load resistance can be estimated. This article notices that the sequence of PDM strategy could affect the amplitudes of interharmonics, and selects the sequences to maximize the magnitudes for less sensitivity to measurement errors. Experimental results show that the relative errors of identification are less than 5% when the nominal values of capacitors are the same as actual values, and reach 7.40% when considering the nominal values may deviate from the actual values. Besides, the output power and efficiency are not affected during the identification process. This proposal requires only magnitudes of voltage and current in the transmitter side, no other hardware is needed, and works with the fixed frequency, which is suitable for any frequency range. [ABSTRACT FROM AUTHOR]

Three-phase grids imbalance causes serious alternating input current distortion in three-phase pulsewidth modulation (PWM) rectifiers where the conventional control scheme is employed. In this article, a generalized Clarke transformation is proposed to convert three-phase unbalanced sinusoidal quantities to two orthogonal sinusoidal quantities with equal amplitudes. Then, these two orthogonal sinusoidal quantities could be converted to two direct quantities by the Park transformation. Furthermore, based on the generalized Clarke transformation, an enhanced dual-loop control (EDLC) scheme is proposed to control the three-phase PWM rectifier in the synchronous rotating frame. Finally, a 5-kW Vienna-type rectifier prototype was built to verify the proposed generalized Clarke transformation and the proposed EDLC control scheme. Experimental results show that, by using the proposed EDLC scheme, the low current total harmonic distortion is achieved even both the amplitude and phase of the utility grid voltages are unbalanced. [ABSTRACT FROM AUTHOR]

Accurate measurements of the junction-to-case thermal resistances of power devices or module packages are necessary for validating the thermal design of the package as well as of the entire converter system. Although accurate measurements can be obtained for Si and SiC packages by the JESD51-14 standard, no standard has been established for gallium nitride (GaN) packages. A main reason for this shortcoming is the lack of accurate techniques for measuring the device's junction temperature. In this letter, a custom package of a (650 V, 150 A) eGaN high-electron mobility transistor with two gate pads was fabricated, and then its junction-to-case thermal resistance was measured by combining two techniques to improve the accuracy: using the device's gate-to-gate electrical resistance as the temperature-sensitive electrical parameter; and measuring the thermal resistance as a function of added layers of thermal interface materials. The first gives a sensitivity of 4.7 mΩ/°C and is instantaneous and immune to any transient behavior of the device. The second eliminates the need for accurate measurement of the case temperature. The package's junction-to-case thermal resistance was determined by extrapolating the discrete thermal resistance data points in the plot to zero layer of thermal interface. An analytical expression was derived to guide the extrapolation and was validated by finite-element analysis simulations. The measurement procedure was tested using two different thermal interface materials. The difference between the two experimental measurements was within 24%, and both are in good agreement with the simulated result. [ABSTRACT FROM AUTHOR]

The stitch wire configuration is widely adopted for large-area IGBT chips. However, an inhomogeneous wire current density introduces uneven self-heating and nonuniform chip heating, which exacerbates the chip thermal stress. In this article, a multicellular electro-thermal model considering the stitch-bonding wires is derived to optimize the wire layout parameters. Furthermore, the current density alleviation of wire bonds is investigated to be the most sensitive and effective method to comprehensively mitigate the thermal nonequilibrium and local overheating. Consequently, an improved multitier layout is proposed to further achieve thermal stress suppression without any additional components and advanced materials. Finally, a triple-tier-bonded IGBT module with optimal design parameters is fabricated to validate the thermal mitigation performance. The prototype experimental results demonstrate that the modeling error is less than 3.0%. The multitier layout decreases the current density by 57.6%, hence, the maximum and average chip temperature are reduced by 21.8% and 12.4%, respectively. [ABSTRACT FROM AUTHOR]

This article presents a precise derivation of the prevalent voltage-drop problem in pulsewidth modulation high step-up converters with a transformer-based voltage multiplier. The corresponding solution is proposed and analyzed with an isolated interleaved full-bridge high step-up converter as an example. By introducing a resonant capacitor, the improved converter solves the voltage-drop problem caused by the reverse recovery process of the leakage inductor. Meanwhile, the zero-current switching condition is achieved for output diodes due to the resonance between the leakage inductor and the resonant capacitor. Moreover, the proposed solution can be extended to other high step-up converters with voltage-multipliers utilizing transformers or coupled inductors. The voltage-drop problem is analyzed in detail first, followed by the operational principles and steady-state analysis of the improved converter. Experimental results based on a 450-W laboratory prototype at 25-kHz switching frequency verify the validity of the theoretical analysis. [ABSTRACT FROM AUTHOR]

A digital low-dropout (DLDO) regulator is described which is controlled by voltage-controlled oscillator (VCO) based feedback loop. There are two VCOs in the control loop whose frequencies are controlled by the output voltage and reference level, respectively. By comparing the phase between the output clocks of the two VCOs and modulating the number of enabled power transistors and their on-times, the output voltage is regulated. The proposed VCO-based control is a hybrid of digital and analog control schemes because the number of enabled power transistors is controlled in discrete step while the on-time is modulated continuously. In order to improve the transient speed, transient detector is employed in the DLDO regulator. The DLDO regulator with the proposed VCO-based control has been implemented in a 65-nm CMOS process. The DLDO regulator can provide the output from 0.5 to 1.1 V from the input ranging from 0.9 to 1.2 V. The load transient time is smaller than 90 ns for both step-up and step-down changes of load current. The peak current efficiency is 99.3%. [ABSTRACT FROM AUTHOR]

Modular converters or reconfigurable battery energy storage systems are a promising approach to eliminate the dependence on the weakest element in previously hard-wired battery packs and to combine heterogeneous batteries (so-called mixed-battery systems). But their need for expensive sensors and complex monitoring as well as control subsystems hinders their progress. Estimating the parameters of each module can substantially reduce the number of required sensors and/or communication components. However, the existing estimation methods for cascaded modular circuits neglect important parameters such as the internal resistance of the battery, resulting in large systematic errors and bias. This article proposes an online estimator based on a dual Kalman filter (DKF) that exploits the slow dynamics of the battery compared to the load. The DKF algorithm estimates the open-circuit voltage (OCV) and internal resistance of each module by measuring only the output voltage and current of the system. Compared with the state-of-the-art, the proposed method is simpler and cheaper with only two sensors compared to $ \geq N + 2$ ($N$ is the number of modules). Furthermore, the proposed algorithm achieves a fast convergence through an optimal learning rate. Simulations and experimental results confirm the ability of the proposed approach, achieving <1.5% and <5% estimation error for OCV and the internal resistance, respectively. [ABSTRACT FROM AUTHOR]

For silicon carbide power mosfets, high dv/dt in switching may bring about a high level of electromagnetic interference. This letter shows that the dv/dt rate decreases at lower load currents. A dynamic dv/dt control strategy is then proposed for switching loss reduction in the whole operating range, by maintaining the dv/dt at the maximum acceptable level. The effectiveness of the proposed control strategy is verified by an experiment, showing that the total switching loss can be reduced by as much as 22% at 30% load. Furthermore, the simulation shows that a power loss reduction of 11.4% can be obtained for an electric vehicle converter which typically operates at light loads for most of the time. [ABSTRACT FROM AUTHOR]

Voltage–current (V–I) droop control is becoming a promising alternative to achieve proper power sharing among the parallel-operated voltage-sourced inverters (VSIs). Compared with the conventional droop control, this method has a simpler structure and a better dynamic performance because it saves the power loop (including the low-pass filters). However, due to the absence of the power loop related to the system frequency, the synchronization of VSIs becomes an intractable issue. To tackle this, a communication-free algorithm to synchronize and control the VSIs is proposed. Initially, the principle of V–I droop control is presented straightforwardly based on the virtual impedance. Then, a synchronization algorithm is incorporated into the V–I droop controller for accurate power sharing. This algorithm adaptively adjusts the phase step of each VSI according to the phase differences between VSI and the ac bus. In this way, the phase differences of each VSI to the ac bus eventually converge to an identical value, thus realizing the synchronization of VSIs. A detailed parameter design method is also implemented considering both system stability and power quality. Finally, the proposed strategy is validated experimentally using a three-parallel-VSIs system. [ABSTRACT FROM AUTHOR]

In a practical alternating current (ac) machine drive system, a zero-order hold equivalent discrete-time machine model motivates the development of a direct discrete-time current regulator structure. However, it is complicated to establish the direct discrete-time current regulator for asymmetric machine 1 Asymmetric machine denotes a ac salient machine in this article, whereas the symmetric machine denotes a ac non-salient machine. model due to the involvement of complex matrix exponential related to unequal machine inductance parameters. In order to overcome this barrier, a novel direct discrete-time current regulator based on the flux model is proposed, where a modified ac machine model considering delay compensation is developed and a new feed-forward voltage compensation is designed to eliminate the matrix exponential. In addition, a discrete-time flux observer is proposed and can work in the proposed current regulator to suppress the adverse one-step delay effect on the feed-forward voltage compensation and current regulator. The theoretical analysis has shown that the proposed discrete-time current regulator and flux observer have good parameter robustness and stability. Also, the experimental verification is performed on an ac machine drive test rig. [ABSTRACT FROM AUTHOR]

A typical charging profile for the Li-ion batteries in electric vehicles (EVs) includes a constant current (CC) charging stage and a constant voltage (CV) charging. This letter proposes a simple and reconfigurable topology for CC and CV outputs in an EV wireless charging system. The proposed system can be switched to series–series topology for CC output and inductor–capacitor–capacitor-series topology for CV output. Only one relay is introduced, unlike existing solutions where many passive components and relays are utilized for reconfiguration. Also, there is no need for frequency variation to achieve the shift of CC and CV. An experimental prototype is implemented to validate the proposal. [ABSTRACT FROM AUTHOR]

For the conventional resistive active power filter based on impedance matching idea in transmission line theory, which aims to damp out background harmonic propagation on the distribution feeders. The so-called damping refers to the suppression of the existing harmonic propagation, but there is no ability to attenuate the source harmonic voltages along the feeder under all cases theoretically. This article focuses on how to attenuate the source harmonic voltages along the feeder to achieve better performance. Not being based on the impedance matching idea, the proposed standing wave phase shifting active power filter moves the phase of the harmonic voltage standing wave so that the antinode of standing wave closes to or exactly located at the beginning of the feeder to achieve harmonic attenuation. According to the relationship between the wavelength of the harmonics and the feeder length, the application range and the control parameters of standing wave shifting to the left and to the right strategy are discussed, respectively. Finally, the correctness of the theoretical analysis and the effectiveness of the proposed scheme is verified by the simulations and experiments. [ABSTRACT FROM AUTHOR]

Metal oxide varistors (MOV) is often used to limit the overvoltage generated by the current breaking of dc breaker to protect power electronic device from breakdown. However, while suppressing overvoltage, the MOV also causes the degradation of continuous operating voltage capability. This letter proposes a novel solid-state switch scheme with high voltage utilization efficiency by using modular gapped-MOV (MG-MOV) for dc breakers. The breakable gap is first applied to the protection of power electronic devices. By using the gap to share the voltage in the static-state and be broken down in the dynamic state, the overvoltage and continuous operating voltage of the solid-state switch can be decoupled. Moreover, based on the modular scheme, the instability of the gap discharges and the voltage imbalance of the series devices can be solved well. The working mechanism, voltage-balance and stability issue of the MG-MOV are discussed in detail in this letter, and a 15-kA prototype is developed to verify the feasibility of the novel solid-state switch scheme. The experiment under results show that voltage utilization efficiency can be increased from 44.4% to 72.0% by using MG-MOV. [ABSTRACT FROM AUTHOR]

Various advantages are directing the attention to modular multilevel converters (MMCs). Simple ways to balance the voltage difference of MMC modules are strongly desired but an open problem. The modular multilevel series/parallel converter (MMSPC) can be an efficient solution for this problem. However, implementing an effective control method is essential for close-to-optimum operation of MMSPCs. Generally, on the higher level of control, various modulation techniques can control the output, while a scheduler balances the module voltages on a lower control level. This article proposes a simple yet powerful module scheduling method for MMSPCs. This scheduling method can be combined with many modulation techniques, such as nearest-level modulation (NLM). It reduces the control complexity using the sensorless balancing capability, improves efficiency by minimizing the conduction loss, and achieves a compromise between balancing the module voltages and switching loss, alhough applicable to other modulation methods, simulation, and experiments combine the proposed method with NLM for a comparison with the prior art of scheduling. Based on the presented results and analysis, the algorithm is suited particularly for MMSPCs with a low to medium number of modules. The proposed technique achieves 18%–55% reduction in power loss and 7.5% improvement in averaged capacitor currents compared to other algorithms. [ABSTRACT FROM AUTHOR]

This article proposes a compensation method of position estimation error for high-speed surface-mounted permanent magnet synchronous motors based on robust inductance estimation. The proposed method relies on the variation of the estimated $\delta$ -axis back back-electromotive force when a small current is injected into the $\gamma$ axis. The inductance estimation error is limited within ${\bf \pm \!5\%}$ when the nominal resistance and inductance vary $\bf \pm 30\%$ of their real values. With the estimated inductance, the position estimation error can be well compensated. Compared with the conventional current-injection method, the proposed method has enhanced robustness against the system noises. Benefiting from this, it is effective to estimate the inductance with a small injected current ($ \bf 0.5\%$ of the rated current), where the conventional methods fail. Finally, the effectiveness of the proposed method is validated by simulation and experiment results on a 100 kr/min (1.67 kHz) high-speed permanent magnet synchronous machines accurately with 10-kHz sampling frequency. [ABSTRACT FROM AUTHOR]

In grid-forming control, the swing equation of a synchronous machine is emulated by a power controller. Thereby, frequency droop, power-oscillation damping, and/or virtual inertia can be obtained. In this letter, it is shown that a phase-locked loop—which is normally grid following—can be designed so as to, in turn, emulate a generic power controller, thus, becoming grid-forming. [ABSTRACT FROM AUTHOR]

The low energy storage quadratic boost converter (LES-QBC) was recently proposed as an advantageous topology in terms of reduced output voltage ripple and fast dynamic response, besides high power density and reduced energy storage. The topological configuration can be exploited mainly through a 180° phase shift between the controlled switch gate signals. Nevertheless, this feature imposes a relevant challenge in terms of modeling, since traditional averaging an ripple estimation techniques cannot provide an accurate approximation to the actual switching dynamics of the converter. Motivated by this issue, in this article, we provide a complete quantitative analysis of both the steady-state and dynamic behavior of the LES-QBC, giving a fine understanding of their operation in continuous conduction mode when a pulse width modulator is used. The voltage gain, ripple factor, and dynamic behavior are modeled considering parasitic resistances and a wide operation range for the input voltage and the load. The demonstrated performance corroborates the high value of the converter for several applications in the industry. Every theoretical prediction is fully validated via simulations and experimental results. [ABSTRACT FROM AUTHOR]

Litz wire (LW) is a common tool used in high-frequency power electronic applications to reduce eddy loss. Uninsulated twisted wire (UTW) with lower manufacturing costs is often ignored by both researchers and designers. LW and UTW have similar geometry structures, however, there has been little research on the performance evaluation of UTW so far. This article proposes a novel calculation method of UTW based on the multilevel partial element equivalent circuit method and the results are verified by the experimental measurement. Then, the performance of LW and UTW is compared and discussed under various conditions. The simulation results show that LW and UTW have almost identical performance and may replace each other for single-level wires. For two-level wires, these two types of wires may be interchangeable when the ratio of bundle radius to skin depth is less than a specific value, otherwise, LW always has a better performance. [ABSTRACT FROM AUTHOR]

This article presents a distributed hierarchical control structure for parallel uninterruptible power supplies. A dynamic approach with separation of concerns is proposed for the secondary control, where a so-called grid forming inverter is responsible for restoring the amplitude and frequency of the output voltage, while the remaining inverters, called grid supporting, are responsible for enhancing long-term power sharing. This strategy aims to minimize the tradeoff between voltage regulation and power sharing through secondary control, which uses a low bandwidth communication link. For the primary controller, resistive droop control with virtual resistance is employed to accomplish short-term power sharing. Simple design guidelines for the secondary controllers based on simplified models developed in the article are provided. Extensive experimental results obtained from two 500-VA prototypes demonstrated the good performance of the proposed strategy. The amplitude and power sharing errors remained below 1% and 2%, respectively, for the entire load range evaluated. [ABSTRACT FROM AUTHOR]

For the two-stage single-phase power factor correction (PFC) converter, its instantaneous input power pulsates at twice the line frequency, generating the second harmonic current (SHC) at the dc-bus port. The dc–dc stage is used to regulate the output voltage or the dc bus voltage in different applications, and the SHC reduction schemes for the dc–dc stage with different control objectives are discussed in this article. When the dc–dc stage regulates the output voltage, it is pointed out that the control bandwidth of the dc–dc stage is required to be high enough and the dc bus capacitor should be large enough to suppress the SHC, and the design of the dc bus capacitor is given. When the dc–dc stage regulates the dc bus voltage, a virtual impedance is added in series with the input/output of the dc–dc stage to suppress the SHC, and a virtual impedance is added in parallel with the dc bus to improve the dynamic performance. The selection and design of the virtual impedances are also given. Based on that, three specific control schemes are proposed for the dc–dc stage to suppress the SHC, and the parameters design method is also presented. Finally, a 3.3-kW two-stage single-phase PFC converter is fabricated and tested in the lab to verify the effectiveness of the proposed SHC reduction schemes. [ABSTRACT FROM AUTHOR]

In the voltage-source-converter-based dc system, the short-circuit current increases rapidly due to neighborhood dc-link capacitance. The protection system using a high-speed fuse has been applied in the industry to protect before the current freewheeling that ruins a semiconductor device. For proper protection system design, the capacitor-discharge I2t must be analyzed and set higher than the melting I2t of the fuse by securing sufficient capacitance. However, due to the implicit characteristics of the I2t function, it is difficult to calculate the required capacitance directly considering unknown fault resistance. In this article, the normalized I2t map of capacitor-discharge is presented as a calculation reference. After calculating the base values, the normalized I2t value can be calculated easily from the map without complicated formula. Since it is expressed as a function of the damping factor (half of the normalized resistance) and normalized capacitor's voltage, it helps I2t design with the range of fault resistance and voltage drop simultaneously. The proposed normalization and its result were verified through the experimental tests under various fault resistance. [ABSTRACT FROM AUTHOR]

With the increase of load resistance, the impedance angle of the rectifier with passive C filter also increases, which may have some negative effects on the characteristics of the inductive power transfer (IPT) system. This article presents an impedance analysis method for C-filter rectifiers in continuous conduction mode. The calculation formula of critical load resistance is given and the relevant values are calculated. An improved C-filter rectifier circuit is proposed to reduce the phase angle of the IPT system. A very tiny capacitance is connected in parallel at the input end of the rectifier to reduce the impedance angle as load resistance changes, with hardly increased costs. This improved method not only improves the system efficiency, but also reduces the fluctuation of output voltage or current. Simulation and experiment results verify the feasibility of the proposed topology. A 1 kW prototype with primary series, secondary series compensation topology was built. The maximum system efficiency from dc power supply to the load is 94.5%. The efficiency under rated load is as high as 93%. Compared with traditional method, it has increased by 0.6%. [ABSTRACT FROM AUTHOR]

To realize the misalignment insensitivity and stable constant current/voltage (CC/CV) charging without using the extra dc–dc converter, composite compensation topology, and wireless communication modules, a primary-side control method based on the phase-shift full-bridge inverter and the laminated magnetic coupler (LMC) is proposed for the wireless charging system. First, the load-independent output current and voltage characteristics for the series–series compensation are analyzed. The equations for estimating the charging current and voltage are deduced by only using the primary-side parameters. Second, the excellent antimisalignment capability of the LMC with the primary-side integrated auxiliary coil is verified. As a result, the influence of horizontal misalignment on the estimation precision is reduced; the controllability of the charging current is ensured. Third, the dual-loop cascade PI controller is designed, and CC/CV charging is realized by adjusting the phase-shift angle. Finally, both the simulation and experimental results show that the primary-side control method realizes CC/CV charging with high precision within the reasonable horizontal misalignment range. Compared to the conventional primary-side control methods, the proposed one avoids both the load resistance estimation and mutual inductance identification. Meanwhile, the compact and lightweight receiver module is ensured. [ABSTRACT FROM AUTHOR]

This letter demonstrates an on-silicon integrated thin film coupled inductor using a novel cascade matrix concept to suit multiphase integrated voltage regulator (IVR) applications. The novel cascade matrix coupled (CMC) stripline inductor facilitates all-phase-coupled configuration to reduce the phase ripple current in IVRs. It also shows excellent scalability and neat floor planning. Moreover, the proposed CMC inductor uses double layer metal scheme for windings and interconnects, which significantly reduces the ac winding resistance. A four-phase CMC inductor has been successfully fabricated on-silicon substrate and characterized, which uses conventional thin film magnetic core deposition process to achieve in-plane magnetic uniaxial anisotropy. The device occupies 3.2 × 1.7 mm2 floor area and provides 19.5 nH phase inductance with 120 mΩ dc resistance. The saturation current for each phase is up to 0.4 A when the phase inductance drops by approximately 20%. The coupling coefficient between any two phases of the proposed CMC inductor is 0.27, much higher and more controllable than that of toroid core-based coupled inductors. [ABSTRACT FROM AUTHOR]

The accurate state of charge (SoC) estimator has great significance for ensuring the safety and reliability of Li-ion battery systems. However, the accurate SoC estimation for a series–parallel connected battery pack is a remaining challenge due to the strong inconsistency characteristic caused by cell open-circuit (COC) faults. Therefore, a novel fault-tolerant multimodule SoC estimation method for the series–parallel connected battery pack is proposed. An average module model is used to describe the performance of the battery pack. A bias correction model considering SoC, series resistance, and polarization characteristic inconsistency is developed to describe in-pack modules. A noise adaptive H ∞ filter-unscented H ∞ filter is employed to estimate SoC for the average module. The SoCs of in-pack modules are obtained by an optimized recursive least square method. A correlation coefficient-based method is developed to detect COC fault and isolate the fault module. Finally, several experiments on a 4s-3p battery pack are taken to evaluate and verify the real-time performance, stability, and accuracy of the proposed method. The result shows that both online and offline SoC estimation error is less than 1% for healthy modules, and it is less than 2.5% for the fault module in which one-third capacity is lost randomly. [ABSTRACT FROM AUTHOR]

High-precision torque estimation and control of induction motor drives is an important research field due to the extensive use of these motors in torque controlled applications, for example, in electric vehicles. The open-loop torque control performance depends strongly on the accuracy of both the motor model and the flux estimation. To address this appropriately, an adaptive Kalman filter with offline parameter and observer design optimization is proposed in this article. Thereby, the basic induction motor model is extended by magnetic saturation, iron losses, and skin effect influences. All uncertain motor model and observer configuration parameters are offline identified by a global optimization technique, namely particle swarm optimization. The identification utilizes a comprehensive data set consisting of test bench measurements and leads to an optimized observer enabling precise torque estimation and control. In experimental validation, for both torque estimation and control, the root-mean-square error is below 1  % of the nominal torque over the entire operating range. With the help of an accurate gray-box inverter model for phase voltage estimation and a speed-adaptive Kalman filter tuning scheme, the proposed observer is able to operate also at slow speeds including standstill. [ABSTRACT FROM AUTHOR]

This article presents load independent zero-voltage-switching (ZVS) parallel resonant Class E inverter, which is based on parallel resonant Class E inverter. A new detailed analysis and design procedure at any duty ratio are introduced. This circuit can maintain ZVS and a constant amplitude ac output current over a wide range of load resistance from a nominal value to short circuit without additional elements or feedback control. A prototype circuit was designed with the proposed equations at the nominal load resistance 20.0  $\Omega$ , the output power 10.0 W, the output current 1 A, and the operating frequency 1.00 MHz. In circuit simulation using PSIM and in circuit experiments, ZVS and constant amplitude ac output current were confirmed at the load resistance 1.00, 5.00, 10.0, 15.0, and 20.0  $\Omega$. [ABSTRACT FROM AUTHOR]

The short circuit (SC) behavior of a newly developed GaN-HEMT/SiC-JFET cascode device is investigated in this work. The reverse leakage current through the drain-side PN junction (IR) of the SiC JFET under SC conditions is measured simultaneously during the SC event. IR of the SiC JFET increases to 6.4 A at the end of a 5-μs nondestructive SC pulse. The increase of IR during the SC pulse induces a turning point in the SC current waveform and a dramatic negative threshold voltage shift (>30 V) in the SiC JEFT, resulting in high transient drain-to-source voltage in the GaN HEMT. The underlying mechanism is associated with the increase of local potential in the P-type layer of the SiC JFET with inevitable spread resistance (RSPD). It is suggested that reducing RSPD can improve SC capability and high IR should be considered in SC failure mechanism analysis and the design of external gate resistance of the SiC JFET. [ABSTRACT FROM AUTHOR]