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Fuel cell stacks produce a dc output with a 2:1 variation in output voltage from no-load to full-load. The output voltage of each fuel cell is about 0.4 V at full-load, and several of them are connected in series to construct a stack. An example 100 V fuel cell stack consists of 250 cells in series and to produce 300 V at full-load requires 750 cells stacked in series. Since fuel cells actively convert the supplied fuel to electricity, each cell requires proper distribution of fuel, humidification, coupled with water/thermal management needs. With this added complexity, stacking more cells in series decreases the reliability of the system. For example, in the presence of bad or malperforming cell/cells in a stack, uneven heating coupled with variations in cell voltages may occur. Continuous operation under these conditions may not be possible or the overall stack output power is severely limited. In this paper, a modular fuel cell powered by a modular dc--dc converter is proposed. The proposed concept electrically divides the fuel cell stack into various sections, each powered by a dc--dc converter. The proposed modular fuel cell powered by modular dc--dc converter eliminates many of these disadvantages, resulting in a fault tolerant system. A design example is presented for a 150-W, three-section fuel cell stack and dc-dc converter topology. Experimental results obtained on a 150-W, three-section proton exchange membrane (PEM) fuel cell stack powered by a modular dc-dc converter are discussed. Index Terms--DC--DC converters, fuel cells, power conditioning, renewable power.

This paper focuses on a new three-phase high power current-fed dc/dc converter with an active clamp. A three-phase dc/dc converter with high efficiency and voltage boosting capability is designed for use in the interface between a low-voltage fuel-cell source and a high-voltage dc bus for inverters. Zero-voltage switching in all active switches is achieved through using a common active clamp branch, and zero current switching in the rectifier diodes is achieved through discontinuous current Conduction in the secondary side. Further, the converter is capable of increased power transfer due to its three-phase power configuration, and it reduces the rms current per phase, thus reducing conduction losses. Moreover, a delta-delta connection on the three-phase transformer provides parallel current paths and reduces conduction losses in the transformer windings. An efficiency of above 93% is achieved through both improvements in the switching and through reducing conduction losses. A high voltage ratio is achieved by combining inherent voltage boost characteristics of the current-fed converter and the transformer turns ratio. The proposed converter and three-phase PWM strategy is analyzed, simulated, and implemented in hardware. Experimental results are obtained on a 500-W prototype unit, with all of the design verified and analyzed. Index Terms--Active clamp, leakage inductance, three-phase dc-dc converter, three-phase pulsewidth modulation (PWM) strategy, voltage transfer ratio, zero-voltage switching (ZVS).

High power telecommunication power supply systems consist of a three-phase switch mode rectifier followed by a dc/dc converter to supply loads at -48 V dc. These rectifiers draw significant harmonic currents from the utility, resulting in poor input power factor with high total harmonic distortion (THD). In this paper, a digitally controlled three-phase switch mode power supply based on a matrix converter is proposed for telecommunication applications. In the proposed approach, the matrix converter directly converts the low frequency (50/60 Hz, three-phase) input to a high frequency (10/20 kHz, one-phase) ac output without a dc-link. The output of the matrix converter is then processed via a high frequency isolation transformer to produce -48 V dc. Digital control of the system ensures that the output voltage is regulated and the input currents are of high quality under varying load conditions. Due to the absence of dc-link electrolytic capacitors, power density of the proposed rectifier is expected to be higher. Analysis, design example and experimental results are presented from a three-phase 208-V, 1.5-kW laboratory prototype converter. Index Terms--Three-phase switch mode rectifier, total harmonic distortion (THD).

In this paper, the development of a low cost fuel cell inverter system is detailed. The approach consists of a three-terminal push-pull dc-dc converter to boost the fuel cell voltage (48 V) to [+ or -]200 VDC. A four switch [insulated gate bipolar transistor (IGBT)] inverter is employed to produce 120-V/240-V, 60-Hz ac outputs. High performance, easy manufacturability, lower component count, safety and cost are addressed. Protection and diagnostic features form an important part of the design. Another highlight of the proposed design is the control strategy, which allows the inverter to adapt to the requirements of the load as well as the power source (fuel cell). A unique aspect of the design is the use of the TMS320LF2407 DSP to control the inverter. Two sets of lead-acid batteries are provided on the high voltage dc bus to supply sudden load demands. Efficient and smooth control of the power drawn from the fuel cell and the high voltage battery is achieved by controlling the front end dc-dc converter in current mode. The paper details extensive experimental results of the proposed design on Department of Energy (DoE) National Energy Technology Laboratory (NETL) fuel cell. Index Terms--Current mode, dc-dc converter, fuel cell.

In this paper, a robust anti-islanding algorithm for distributed fuel cell powered generation (DFPG) is proposed. Three different islanding scenarios are explored and presented based on analysis of real and reactive power mismatch. It is shown via analysis that islanding voltage is a function of real power alone, whereas its frequency is a function of both real and reactive power. Following this analysis, a robust anti-islanding algorithm is developed. The proposed algorithm continuously perturbs ([+ or -]5%) the reactive power supplied by DFPG while simultaneously monitoring the utility voltage and frequency. If islanding were to occur, a measurable frequency deviation takes place upon which the real power of DFPG is further reduced to 80%; now a drop in voltage positively confirms islanding, and the DFPG is safely disconnected. This method of control is shown to be robust, able to detect islanding under resonant loads, and fast acting (operable in one cycle). Possible islanding conditions are simulated and verified with analysis. Experimental results on a 0.5-kW fuel cell inverter system connected to 120-V 60-Hz utility are discussed. Index Terms--Anti-islanding algorithm, distributed fuel cell powered generation (DFPG), islanding.

In this paper, a new parallel-connected single phase power factor correction (PFC) topology using two flyback converters is proposed to improve the output voltage regulation with simultaneous input power factor correction and control. This approach offers lower cost and higher efficiency by parallel processing of the total power. Flyback converter-I primarily regulates output voltage with fast dynamic response and processes 55% of the power. Flyback converter-II with ac/dc PFC stage regulates input current shaping and PFC, and processes the remaining 45% of the power. This paper presents a design example and circuit analysis for 200 W power supply. A parallel-connected interleaved structure offers smaller passive components, less losses even in continuous conduction inductor current mode, and reduced volt-ampere rating of dc/dc stage converter. TI-DSP, TMS320LF2407, is used for implementation. Simulation and experimental results show the performance improvement. Index Terms--Circuit analysis, PFC.

Utility capacitor-switching transients (CSTs) are responsible for numerous nuisance tripping of PWM adjustable speed drives (ASDs) and result in costly down times. During a CST event, the dc link voltage of the ASD can momentarily rise to greater than 1.3 p.u. resulting in nuisance tripping. In this paper, a new approach to mitigate nuisance tripping of PWM ASDs is discussed. In this approach, the soft-charge resistor available in most ASDs, is momentarily introduced in the series path of the power flow to effectively damping the CST. Further, damping effect is electronically adjusted. The proposed approach demonstrates a method that can be incorporated within an ASD to electronically damp the oscillatory transient generated during a CST event. The advantages of the proposed approach are i) electronic damping for CST event is achieved by low cost modifications to ASD hardware; ii) it adapts to several utility resonance conditions. The required additional hardware for ASDs to be immune to CSTs, can be viewed as an add-on option. This paper discusses the analysis, simulation and experimental performance on a 480 V, 16 kVA commercial ASD equipment. Index Terms--Adjustable speed drives, capacitor switching transients, electronic damping, power quality.

In this paper, a new hybrid active power filter topology is presented. A higher-voltage, low-switching frequency insulated gate bipolar transistor (IGBT) inverter and a lower-voltage high-switching frequency metal oxide semiconductor field effect transistor (MOSFET) inverter are used in combination to achieve harmonic current compensation. The function of the IGBT inverter is to support utility fundamental voltage and to compensate for the fundamental reactive power. The MOSFET inverter fulfills the function of harmonic current compensation. To further reduce cost and to simplify control, the IGBT and MOSFET inverters share the same dc-link via a split capacitor bank. With this approach harmonics can be cancelled over a wide frequency range. Compared to the conventional APF topology, the proposed approach employs lower dc-link voltage and generates less noise. Simulation and experimental results show that the proposed active power filter topology is capable of compensating for the load harmonics. Index Terms--Hybrid active power filter, IGBT inverter, MOSFET inverter, DSP.

In this paper, an improved inverter output filter is proposed for pulsewidth-modulated (PWM) drive systems. The proposed filter is shown to effectively reduce both the differential and common modes dr/dt at the motor terminals, even in the presence of long motor leads. Reducing differential mode dr/dt reduces overvoltages at the motor terminals and lowers the stress on the motor insulation. Lowering common mode dr/dt is shown to significantly reduce high-frequency leakage currents to ground and induced shaft voltage in the motor. An important advantage of the approach is that the filter can be installed within the inverter enclosure to achieve both the differential and common modes dr/dt reductions at the motor terminals. Thus, the use of the filter can contribute to enhanced bearing life and improve reliability of PWM drive systems. Analysis, design equations, and experimental results on a 480-V 20-hp PWM drive system are presented. The filter configuration is an excellent candidate for many new and retrofit PWM 480-V/575-V drive systems. Index Terms - Common mode dv/dt, common mode impedance, differential mode dv/dt, induction motor, inverter output filter, leakage current, long motor leads, power converter, pulsewidth modulation inverter, shaft voltage.

In this paper, a zero-voltage-switching (ZVS) scheme for a boost converter is proposed and discussed. This lossless zero-voltage scheme is shown to improve the performance of active power-factor-correction circuits. The results are validated by both simulation and experimental results.

In this paper polyphase transformer arrangements with reduced kVA capacities are presented for harmonic current reduction in high power diode rectifier-type utility interface systems. Based on the concept of an autotransformer, a 12-pulse rectifier system is realized with a resultant transformer kVA rating of 0.18[P.sub.o] (pu). In this arrangement the 5, 7, 17, 19, etc. harmonics are absent from the utility input line current. In the second scheme an 18-pulse rectifier is realized with the kVA rating of 0.16[P.sub.o] (pu) and the 5, 7, 11, 13, etc. harmonics are canceled in the utility line currents. Analytical design equations are presented to facilitate the design of system components. Simulation results verify the proposed concept, and experimental results are provided from a 208 V, 10 kVA 12-pulse rectifier system. The advantage of employing the proposed system for utility interface of rectifier/PWM-inverter motor drive systems is also explained.

In this paper an Active Power Filter is proposed for balancing unbalanced loads. A 3-phase, PWM ac to dc converter topology with inductive energy storage is controlled to continuously inject desired negative sequence currents into the system to achieve balancing of continuously varying unbalanced loads. The principal of operation is as follows: the negative sequence components of the load currents are measured in magnitude and in phase and the PWM-controlled active power filter is controlled to inject currents opposite to these quantities, thereby achieving the balancing function. The operation of the proposed system along with the selection of the active power filter components are discussed in detail. Finally, experimental filter operation is verified for an unbalanced load.

Abnormal harmonics of significant magnitude are generated at the output and input terminals of a PWM ac to dc converter under unbalanced operating conditions. A new control strategy is presented here to selectively cancel the generated lower order abnormal harmonics at the output and input terminals and thereby to preserve the high performance features of a PWM ac to dc converter. The proposed technique essentially involves computing the sequence components of the unbalanced input supply and suitably counter-unbalances the PWM gating signals of the converter switches to cancel the generated abnormal harmonics. The technique is essentially a feed forward approach and is suitable for higher power G.T.O. type PWM ac to dc converters. A procedure for implementing this technique in real time is discussed. Finally selected results are verified experimentally on a prototype PWM ac to dc converter.

In this paper, several new component minimized circuit topologies for single-phase to three-phase conversion are proposed. The proposed topologies employ fewer semiconductor devices and generate high-quality output voltages. Suitable modification to achieve active input current shaping feature is also illustrated in detail. Analysis and simulation of the proposed schemes is carried out to show the high-performance features. Suitable guides for the selection of filter components and for facilitating circuit design is presented. Finally, selected results are verified experimentally on laboratory prototype converters.

In this paper analysis of common mode voltage or 'neutral shift' in the new emerging voltage source inverter type medium voltage adjustable speed drive (MV-ASD) systems is presented. Both cascaded multilevel (CML) inverter and 3-level NPC inverter topologies are analyzed. An equivalent circuit model to determine the common mode voltage stress is presented. Analysis and simulation results are discussed and worst case common mode voltage excursion is computed for an example 800 Hp, 4160 V MV-ASD. It is shown that certain system components are excessively stressed and in the MV-ASD system these data are particularly useful in specifying system components and for proper design of the system. Possible effects of common mode voltage and its dv/dt on medium voltage motor bearings are discussed. A new multilevel PWM strategy is introduced which results in zero common-mode voltage. Simulation results are shown to illustrate the effectiveness of these schemes. Finally, experimental results from a 800 hp, 4160 V, MV-ASD system are presented. Index Terms--Common mode, medium voltage drove.

A transformer performs many functions such as voltage transformation, isolation, and noise decoupling, and it is an indispensable component in electric power distribution systems. However, at low frequencies (60/50 Hz), it is a bulky and expensive component. In this paper, the concept of electronic transformers is further extended and explored for its suitability in power distribution systems. It should be noted that from the input/output behavior, the electronic transformer and the conventional transformer are identical. Possible topologies employing static converters connected on the primary and secondary sides are explored to realize high-frequency operation of the magnetic core. To assist the commutation process, a four-step switching has been developed which does not require the use of snubbers. Reduced size, losses, higher efficiency, and better voltage regulation are some of the advantages of this approach. A 10-kVA design example along with experiment results are discussed. It is shown that a transformer designed with a conventional grain-oriented silicon--steel core can process three times the power at 1-kHz operating frequency as compared to 60 Hz. The proposed method is scalable in voltage/current with the currently available insulated gate bipolar transistor (IGBT) devices connected in series without special snubbers. Index Terms--Electronic transformers, four-step switching, high-frequency switching.

With wide-spread application of power electronic converters in high power systems, there has been a growing interest in system reliability analysis and fault-tolerant capabilities. This paper presents a comprehensive review of conventional fault-tolerant techniques regarding power electronic converters in case of power semiconductor device failures. These techniques can be classified into four categories based on the type of hardware redundancy unit: switch-level, leg-level, module-level, and system-level. Also, various fault-tolerant methods are assessed according to cost, complexity, performance, etc. The intent of this review is to provide a detailed picture regarding the current landscape of research in power electronic fault-handling mechanisms. [ABSTRACT FROM AUTHOR]

This paper focuses on a new three-phase high power current-fed dc/dc converter with an active clamp. A three-phase dc/dc converter with high efficiency and voltage boosting capability is designed for use in the interface between a low-voltage fuel-cell source and a high-voltage dc bus for inverters. Zero-voltage switching in all active switches is achieved through using a common active clamp branch, and zero current switching in the rectifier diodes is achieved through discontinuous current conduction in the secondary side. Further, the converter is capable of increased power transfer due to its three-phase power configuration, and it reduces the rms current per phase, thus reducing conduction losses. Moreover, a delta-delta connection on the three-phase transformer provides parallel current paths and reduces conduction losses in the transformer windings. An efficiency of above 93% is achieved through both improvements in the switching and through reducing conduction losses. A high voltage ratio is achieved by combining inherent voltage boost characteristics of the current-fed converter and the transformer turns ratio. The proposed converter and three-phase PWM strategy is analyzed, simulated, and implemented in hardware. Experimental results are obtained on a 500-W prototype unit, with all of the design verified and analyzed. [ABSTRACT FROM AUTHOR]

In this paper, a new parallel-connected single phase power factor correction (PFC) topology using two flyback converters is proposed to improve the output voltage regulation with simultaneous input power factor correction and control. This approach offers lower cost and higher efficiency by parallel processing of the total power. Flyback converter-I primarily regulates output voltage with fast dynamic response and processes 55% of the power. Flyback converter-II with ac/dc PFC stage regulates input current shaping and PFC, and processes the remaining 45% of the power. This paper presents a design example and circuit analysis for 200 W power supply. A parallel-connected interleaved structure offers smaller passive components, less losses even in continuous conduction inductor current mode, and reduced volt-ampere rating of dc/dc stage converter. TI-DSP, TM8320LF2407, is used for implementation. Simulation and experimental results show the performance improvement. [ABSTRACT FROM AUTHOR]

Discusses a study that proposed a hybrid active power filter (APF) topology. Various APF topologies; Advantages of the hybrid APF topology approach; Function of insulated gate bipolar transistor; Possible APF topologies with series and parallel combination.