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This paper describes a flow control of the dye in the paper mill with the quasi-Z-source indirect matrix converter (QZSIMC) fed induction motor drive. More than a decade the voltage-source inverter (VSI) and current-source inverter (CSI) have been used to control the speed of the induction motor, which in turns controls the flow of dye. Recently, the matrix converter (MC) has been an excellent competitor for the VSI or CSI for its compactness. The voltage transfer ratio of the VSI, CSI, and MC has been limited to 0.866. Thus, the efficiency of these converters is less. To improve the voltage transfer ratio the quasi-Z-source network (QZSN) is to be used between voltage source and indirect MC (IMC). The modification in the shoot-through duty ratio of the QZSN varies the voltage transfer ratio greater than 0.866. Different voltage transfer ratios are needed for different voltage sag conditions. For a variation of the duty ratio of the QZSN, the fuzzy logic controller has been presented. To control the IMC vector control with space vector modulation has been presented. This paper proposes the implementation of QZSIMC adjustable speed drive for the flow control of dye in paper mill during different voltage sag conditions. A 4-kW prototype has been built and the effectiveness of the proposed system is verified with simulation results and experimental setup. Simulation is done in MATLAB, Simulink platform. Experimental setup is done with the aid of a TMS320F2812 (Texas Instrument) processor. The experimental results validate the maintenance of the speed of an induction motor at the set condition, thus controlling the perfect flow of dye in paper manufacturing technology.

This paper presents a novel loss minimization based nonlinear controller for interior permanent magnet synchronous motor (IPMSM) drive to achieve both high efficiency and high dynamic performance. Traditionally, the dynamic performance of the drive is often ignored for any loss minimization controller or, loss minimization is ignored for robust controller. Therefore, in this paper, a loss model based controller is integrated to an adaptive backstepping based nonlinear controller in the design stage. In order to cope with parameter uncertainties, some motor parameters are also estimated online for the proposed loss model based nonlinear controller (LMNC). Moreover, stability of the proposed drive is demonstrated through Lyapunov's stability criterion and global asymptotic stability is assured through the application of Barbalat's lemma. The proposed LMNC-based IPMSM drive is implemented using a digital signal processor board DS1104 for a laboratory 5-hp motor. The performance of the proposed control scheme is investigated in both simulation and experiment at different load and speed conditions. The performance of the proposed LMNC is also compared with the conventional PI as well as nonlinear controller without any loss minimization. It is found that the proposed LMNC is superior to the conventional benchmark PI controller or nonlinear controller.

This paper presents a unified framework for the modeling, analysis, and design of load-independent Class E and Class EF inverters and rectifiers. These circuits are able to maintain zero-voltage switching and, hence, high efficiency for a wide load range without requiring tuning or use of a feedback loop, and to simultaneously achieve a constant amplitude ac voltage or current in inversion and a constant dc output voltage or current in rectification. As switching frequencies are gradually stepping into the megahertz (MHz) region with the use of wide-bandgap (WBG) devices such as GaN and SiC, switching loss, implementing fast control loops, and current sensing become a challenge, which load-independent operation is able to address, thus allowing exploitation of the high-frequency capability of WBG devices. The traditional Class E and EF topologies are first presented, and the conditions for load-independent operation are derived mathematically; then, a thorough analytical characterization of the circuit performance is carried out in terms of voltage and current stresses and the power-output capability. From this, design contours and tables are presented to enable the rapid implementation of these converters given particular power and load requirements. Three different design examples are used to showcase the capability of these converters in typical MHz power conversion applications using the design equations and methods presented in this paper. The design examples are chosen toward enabling efficient and high-power-density MHz converters for wireless power transfer (WPT) applications and dc/dc conversion. Specifically, a 150-W 13.56-MHz Class EF inverter for WPT, a 150-W 10-MHz miniature Class E boost converter, and a lightweight wirelessly powered drone using a 20-W 13.56-MHz Class E synchronous rectifier have been designed and are presented here.

This paper presents an inverter topology named the multi-source inverter that aims to connect several independent DC sources to the same AC output using a single stage of conversion. This power converter has been developed for applications, such as electrified powertrains. Compared to the conventional hybrid powertrains that use a DC/DC converter to provide an adaptable voltage to the load, the multi-source inverter can drive a traction motor from variable DC voltages without the use of an additional power converter. Hence, the high power DC/DC converter can be dissociated from the traction mode and its use will be restricted to the engine $^{\prime }$ s start-up and regenerative braking, allowing a significant reduction of its power rating from tens of kWatts to a few kWatts. The overall efficiency of the electrified traction drive can also be improved due to the single conversion stage between the battery and the motor. In this paper, the multi-source inverter topology is introduced and its different operating modes are determined through the study of the inverter circuit. Closed-loop control simulations and experiments with a scaled-down prototype and an induction motor were performed to validate the effectiveness of the proposed topology and concept.

This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme.

Class $E^2$ DC–DC converter composed of Class $E$ power amplifier (PA) and rectifier is a promising candidate for MHz wireless power transfer. It is soft-switching based and able to achieve high efficiency at MHz frequency. However, the converter implemented through traditional static design is sensitive to the variations of operation condition. Its performance gets deteriorated when DC load and coil coupling deviate from their respective optimum values. This paper demonstrates that the degradation of system efficiency is mostly due to the mismatch of PA load, and the efficiency drop can be efficiently improved by adding an L-type impedance matching network (IMN) after PA. A fixed IMN is sufficient to maintain a high efficiency, while a tunable IMN is required to ensure stable output power when operation condition dramatically changes. Key techniques, particularly system-level optimization, are discussed in this paper that ensure high efficiency over a wide range of variation in operation condition and also with reduced capacitor/inductor tuning ranges in the IMN. The 6.78-MHz Class $E^2$ DC–DC converters with and without the fixed/tunable IMN are fabricated and measured for validation purposes. The experimental results show that both high efficiency ( $>$ 66%) and stable output power (around 9 W) are maintained for the tunable converter when there are variations in the DC load and coil coupling.

High-performance cloud computing enables many key future technologies such as artificial intelligence (AI), self-driving vehicle, big data analysis, and the Internet of things (IoT), using clustered CPU and GPU servers in the datacenter. To improve the power efficiency and the infrastructure flexibility, the computing industry is adopting 54 VDC to power the servers in the open compute racks. In this paper, a new modeling technique for a soft-switched dc–dc converter is presented and suitable to guide optimal design in different applications, for example, 54 V to point of load (PoL) for the new open compute rack. To improve the model accuracy and reduce the complexity, this paper proposes a reduced-order linear differential equation (LDE) based modeling technique to discover the following: 1) the tank resonance involving the output inductor; 2) the output current ripple and its impact on power efficiency; 3) the proper on-time control for soft switching; 4) the unique bleeding mode under the heavy load; 5) the output power capability of the converter; and 6) component tolerance analysis and impact on the performance of the converter. With the power loss estimation, design guidelines are provided for a reference design and design improvement based on this new modeling technique. Using the proposed method, great accuracy can be expected in the efficiency estimation. Simulation and experimental results are provided to verify the modeling technique in a 54–1.2 V 25 A dc–dc converter prototype.

The soft-switching solid-state transformer (S4T) employs only 12 main active devices and an auxiliary resonant circuit to implement a bidirectional solid-state transformer, with an attractive feature of achieving a full range of zero-voltage-switching conditions for all the main devices. This paper covers detailed design of the power stage, auxiliary resonant circuit, and control of the S4T. The high-frequency transformer is an essential element for the S4T, and it has a unique feature of dc-biased flux. Design of such a high-frequency transformer is also discussed in detail in this paper. Soft startup, shutdown, and fast dynamic response under load transients are also attractive behaviors because of the low inertia of the S4T. Experimental results from a 208-V/10-kV·A S4T unit are presented.

In order to increase the efficiency of modern microprocessors power supplies used in data centers, the 48-V dc distribution bus is gaining growing attention. For such applications, voltage regulation modules (VRMs) are currently obtained using two-stage conversion systems with an intermediate 12-V dc bus. This paper presents an innovative single-stage approach for the 48-V VRM based on a quasi-resonant constant on-time (COT) operation. The proposed topology inherently integrates the multiphase approach, providing fast phase shedding and flat high-efficiency curves even at light load conditions. This is a unique advantage, usually not available in the two-stage approach, that is very important in server architectures, where high efficiency is required even at light load conditions. The paper analyses the circuit topology, and proposes a control architecture for fast transient response, including the current sharing capabilities, and a solution for implementing the integrated magnetics. The digital controller has been implemented in 0.16- $\mu$ m lithography together with a digital pulse-width-modulation with a 195 ps resolution, and a 40 MS/s, 7-bit ADC. Experimental results show an efficiency of 93.1% for a 250 A, 1.8 V VRM, and of 93.2% for a 102 A, 1.2-V double data rate (DDR) power supply.

In this paper, a new structure of nonisolated boost dc–dc converters based on voltage-lift technique is proposed. In comparison with conventional nonisolated boost dc–dc converters, the proposed converter generates higher voltage gain. In this paper, the relations between voltage and current of all elements in continuous conduction mode and discontinuous conduction mode are calculated as well as voltage gain in each mode. Then, the critical inductance and stress of switch current are extracted. Finally, the validity of given theories is examined by using the experimental results.

This paper proposes a dual-coupled LCC -compen-sated inductive power transfer system with a compact magnetic coupler to improve misalignment performance. In the magnetic coupler, the main coils form the first coupling, and compensation inductors are integrated with the main coils to form a second coupling. In the design presented in this paper, the main coils are unipolar and the compensation inductors are in a Double D structure. The fundamental harmonics approximation method is used to analyze the circuit, and the couplings between the main coils and compensation inductors are considered to determine the net power flow. In misalignment cases, it is shown that the coupling between the compensation inductors, and the cross couplings between the compensation inductors and main coils, contribute to increasing the system power. A 3.5 kW prototype is designed and implemented to validate the proposed dual-coupled system. The primary coil size is ${\text{450 mm}\times \text{450 mm}}$ , and the secondary coil size is ${\text{300 mm}\times \text{300 mm}}$ . Experimental results show that the proposed dual-coupled system can significantly improve the misalignment performance, and retains at least 56.8% and 82.6% of the well-aligned power at 150 mm misalignment in the x - and y -directions, respectively.

Fast-switching power converters are a key enabling technology for the more electric aircraft (MEA), but the generated electromagnetic interference (EMI) poses significant challenges to the electrification effort. To meet the stringent aerospace EMI standards, passive filters are commonly employed, despite the weight and size constraints imposed by the MEA. Alternatively, the EMI source, i.e., the high $dv\text{/} dt$ and $di\text{/} dt$ slew rates, can be addressed through waveform-shaping techniques. For example, while most soft-switching converters can reduce switching loss, they do so by switching the semiconductor devices in a slower and smoother manner, resulting in the attenuation of high-frequency harmonics. This paper examines the auxiliary commutated pole inverter (ACPI) topology, and its first contribution is the attenuation of the high-frequency content of its EMI source, that is, the output voltage, in a predictable manner, through the active control of the resonant circuit. This is achieved by first, discussing the time-domain characteristics of trapezoidal and S-shaped pulse-trains that lead to attenuated high-frequency harmonic content, and second, by analyzing the equivalent LC circuit of the ACPI. The design of the inverter is then focused on the active control of the resonant parameters, for a predetermined and enhanced output voltage high-frequency response. The second contribution of this paper is the comparison of the EMI performance of hard switching and of three soft-switching modes, fixed-timing control, variable-timing control, and capacitive turn- off s, and how this informs important metrics such as power efficiency, current stress, and implementation complexity. Finally, the third contribution is on the trade-offs that arise when the primary design goal is enhanced EMI performance as opposed to switching loss reduction. A 5-kW, 3-phase ACPI prototype is used for validating the high-frequency content attenuation at source. It is shown that the ACPI can achieve a 37 dB harmonic attenuation of its output voltage at 4 MHz, compared to a hard-switched inverter.

In the traditional three-resistor-based current sampling scheme, the sampled currents will become inaccurate when the duration of zero-voltage vectors of an inverter is too short, which leads to a limited modulation index (MI). To overcome this problem, an improved three-resistor sampling method is proposed by establishing a predictive current model of an inverter load, which is that of an induction motor on the synchronous rotating frame for the demonstration purpose in this paper. The principle of this method is detailed in the paper. Then a simulation model of a vector-controlled induction motor drive that utilizes the proposed current sampling scheme is built in the Simulink environment. Finally, the experiment on the new sampling scheme is performed in both steady-state and dynamic conditions. The results verify that the existing current sampling problems can be solved effectively and the motor can perform well with higher MI under the new scheme. As a result, the loading capacity of the system can be enhanced notably.

An optimal dual-phase-shift control strategy of an isolated buck–boost converter is proposed in this paper. The theoretical analysis of dual-phase-shift control strategy is complemented, and the three-dimensional graphs of the output current versus two control variables are given. The optimal operating point is determined by the peak current of a clamped inductor and is shown as control trajectories in the three-dimensional graphs. Moreover, with the optimal dual-phase-shift control strategy, low current value, soft-switching operation, wide input voltage range regulation, whole load range regulation, and high-efficiency performance can be achieved. Furthermore, parameter design method deriving from the minimum peak current of the clamped inductor is given. At the end of this paper, a 1000 W-output prototype is fabricated to verify the effectiveness of the proposed control strategy.

An analytical steady-state model of the modular multilevel converter (MMC) can be used for component sizing and assessment of the impact of different parameters on the MMC performance. Thus, this paper proposes an enhanced steady-state model for the MMC, which enables one to calculate the amplitudes of the harmonic components of MMC arm currents, submodule capacitor voltages, and arm voltages. In addition, the proposed model allows for the calculation of the amplitude and phase angle of the modulating signal, and it also presents a criterion for resonance of the arm currents. This is achieved by means of a polynomial function of the modulation index, and through checking the stability criteria established by the proposed model. The capability of formulating the modulating signal enables a more accurate calculation of the steady-state amplitudes of the variables, as compared to the previously published models. This paper also presents an accurate method of submodule capacitor sizing, based on the proposed steady-state model. The proposed method gives the exact value of the submodule capacitance (i.e., the capacitance that results in dc voltage fluctuations within a desired range) for a prespecified submodule capacitor voltage variation and a given circulating current amplitude. The stability criterion given by the proposed steady-state model, used for sizing the arm inductance, and the submodule capacitor voltage variation given by the proposed capacitor sizing method, used for sizing the submodule capacitor, allows for the determining of the operating limits of the MMC in terms of its parameters. Extensive simulation results are presented to demonstrate the efficacy of the proposed steady-state model and the capacitor sizing method. Further, the results obtained from the proposed capacitor sizing method are compared with experimental results from the literature.

Cascaded H-bridge (CHB) converter technology is actually the most popular solution for grid-connected converters in both medium- and high-voltage applications. This paper introduces a new control of a single-phase CHB active rectifier. The control uses a direct grid current control based on adaptive resonant controllers. The resonant controllers are adapting to slow fluctuation of ac grid frequency. The challenging problem of CHB converters is dc-link capacitor voltage balancing especially under unbalanced load conditions. This paper presents a reliable voltage-balancing technique utilizing energy estimation of particular dc-link capacitor banks and simple prediction of the changes of their energies. A nonlinear behavior of the converter caused by power semiconductors voltage drops and dead-time effects is minimized by auxiliary adaptive resonant controllers. The resulting control has very good performance, including the operation under unbalanced load conditions, and achieves low total harmonic distortion of converter grid current. The theoretical results were verified by experiments made on the developed CHB active rectifier prototype with three power cells in cascade.

This paper provides an experimental and theoretical discussion on dynamic braking for a medium-voltage induction motor fed by a modular multilevel double-star chopper-cell (DSCC) inverter. It is intended to apply the motor drive to large-capacity fans and compressors with a large moment of inertia. Each chopper cell consists of a bidirectional chopper and a braking chopper connecting a single small-rated braking resistor in series with a single IGBT. This configuration results in a “distributed” dynamic brake that provides a distinctive welcomed side effect of protecting all the bidirectional-chopper cells against sudden overvoltage. An experimental system rated at 400 V and 15 kW is designed, constructed, and tested to verify operating performance of the distributed dynamic brake. Experimental waveforms, along with simulated waveforms, confirm firmly that the distributed dynamic brake is feasible and effective in an induction motor fed by a medium-voltage high-power DSCC inverter for fans and compressors. Finally, this paper gives a design example of a distributed dynamic-braking resistor for the 11-kV, 12-MW induction motor driving a large-capacity fan equipped with a large moment of inertia.

The recent advancements in power switching device material and manufacturing technology have enabled the design of highly efficient and compact high-speed motor direct drives. The use of high-switching frequency pulse width modulation in these drives provides speed and torque control capabilities and it can also serve as an effective phase current shaping method for torque ripple minimization. This paper builds upon the previous paper introducing a torque ripple minimization technique for gallium nitride high-electron mobility transistor-based high-speed single-phase brushless dc motor drive. It presents an in-depth performance analysis in comparison with the conventional high-speed control techniques. Four different high-speed control techniques are implemented and tested to quantify the maximum speed, efficiency, torque ripple, and vibration. The vibration of the motor drive is measured using a microelectromechanical systems accelerometer with a ferroelectric random access memory for high-speed data acquisition with the maximum bandwidth of 1 kHz.

A switched-capacitor-based dual-switch dc–dc converter with a high-boost voltage gain is proposed in this paper. The proposed converter can obtain a high-voltage gain with a small duty cycle, which decreases the voltage stress and the conduction loss on the power switches. This paper presents the key waveforms, the operating principles at the continuous conduction mode and the discontinuous conduction mode, and the parameter design. Moreover, a comparison between the proposed converter and other nonisolated converters has been completed. To verify the operating principle, a 200 W prototype is constructed with an input voltage of 25–50 V and an output voltage of 200 V. The simulation and experimental results are shown.

With the power of high-orbit satellites now reaching dozens of kilowatts, solar energy sources play an important role in nonterrestrial applications. However, most of the existing high-power solar array simulators (SASs) are designed for simulating energy sources in terrestrial applications, and may not have suitable dynamic performance for nonterrestrial applications. This paper proposes a design for a high-power high-dynamic-performance space solar array simulator (SSAS) system, which combines a linear power stage unit and a multilevel bus tracking converter unit, in order to achieve a fast step-switching capability and high-power-handling capacity. In this paper, we consider the SSAS power system as two separate parts: the I–V power curve simulator that uses a linear power stage with 20 linear voltage-controlled current paths in parallel; and the multilevel bus tracking converter unit that provides the variable voltage levels tracking the SSAS output voltage, in order to decrease the power dissipation in the linear power stage. This paper establishes a mathematical model for the multilevel converter under this particular system architecture, and presents the application qualification conditions and system design principles. The proposed 2.4-kW SSAS can react quickly to a load step between the short-circuit and open-circuit states, which are the most challenging working conditions, at a stepping frequency of 3 kHz; this is a superior dynamic performance compared to other similar devices. The experimental results of testing the spacecraft power supply with a shunt regulator architecture demonstrating better performance, when compared to the results from four SAS modular products in parallel.

This paper proposes an optimized mathematical model of the voltage-source inverter parallel-operation system (VSIPS) and proposes an improved droop control method based on this model, which can realize accurate power sharing in VSIPS. First, this paper analyzes VSIPS as a multi-input and multioutput system and proposes a precise definition of circulating current. The circulating-current model, the steady-state model, and the small-signal model are proposed subsequently based on the optimum design of wire impedance, which constitute the optimized mathematical model of VSIPS in s -domain. The circulating-current phasor model and the circulating-current power phasor model (CCPPM) are also proposed. Second, the mathematical model of traditional droop control is built and analyzed based on CCPPM, which elaborates the tradeoff of droop control between the steady-state voltage bias and the load-sharing accuracy, and proves that the $V- Q$ droop control cannot realize accurate reactive-power sharing. Third, an improved droop control method ( $\omega - P_{{\text{cir}}}$ and $V- Q_{{\text{cir}}}$ control) is proposed, which can realize the accurate active- and reactive-power sharing and eliminate the steady-state voltage bias simultaneously. Finally, simulation and experimental results are presented, which validate the proposed mathematical model of VSIPS, the analysis of droop control, and the performance of the proposed method.

This paper analyzes the benefits of the active damping applied to transformerless three-phase grid-connected photovoltaic (PV) inverters using modified LCL (MLCL) filter for leakage current reduction. In comparison with passive damping techniques, the active damping can reduce the MLCL filter resonance peaks, improving the dynamic performance of the control system without addition of power losses. Besides these classical advantages, this paper demonstrates that the active damping also contributes for PV leakage current reduction, preserving the high-frequency attenuation of the MLCL filter. Additionally, an active damping for the inverter common-mode circuit is also proposed, reducing the low-frequency leakage current caused by the common-mode signal used to extend the inverter modulation index. Experimental results are given to demonstrate the leakage current reduction and the grid current control for a 10 kW PV inverter.

This paper proposes a new battery cell voltage equalization approach using multiple-receiver wireless power transfer (WPT) working at megahertz (MHz). Compared with existing multiwinding transformer, the MHz multiple-receiver WPT system is advantageous in terms of saved weight and space, ease of implementation, and improved safety. In this paper, the unique operating principle of the WPT-based equalization is first explained, through which equalization currents are naturally determined by the battery cell voltage distribution. The currents are also analytically derived. This facilitates the discussion on power amplifier (PA) design. Performance analysis is then provided to investigate the influences of system parameters on the efficiency and equalization ability of the proposed WPT-based equalization system, and thus guide following design and implementation. Considering the uncertainty in PA load due to the random cell voltage distribution, a current-model Class $E$ PA is designed that enables approximately constant PA output current. Experimental results show that the proposed multiple-receiver WPT-based battery cell equalization system can achieve high overall system efficiency (above 71%) when equalizing six lithium-ion battery cells under loosely coupling ( $k$ = 0.065). A good match between the experimental and calculation results also validates the correctness of the theoretical discussion.

Selective harmonic extraction plays an important role in power quality assessment, harmonic compensation, and so on. Among the various methods, discrete Fourier transform (DFT)-based algorithms has found wide and popular applications due to advantages like simplicity and excellent selectively filtering properties. However, DFT suffers from disadvantages like slow dynamics and sensitivity to frequency variations. In order to alleviate these drawbacks, an improved and extended DFT—generalized DFT (GDFT) is proposed. It is revealed in this paper that the conventional DFT can be viewed as a comb filter connected in series with complex resonators, and DFT relies on the mechanism of pole-zero cancellation for harmonic extraction. More importantly, the key reason behind the DFT slow transient responses is the large delay introduced by the comb filter. Therefore, this paper proposed to reconfigure the comb filter according to specific harmonic patterns of the input signal for improving the dynamic responses and system flexibility. The proposed GDFT not only maintains the advantages of simplicity and selectively filtering properties but also features fast transients, around 0.3 fundamental cycle for typical applications, which is much shorter than the one-cycle settling time of the conventional DFT. A phase-locked-loop block is also incorporated into the harmonic-detection system to deal with possibly large frequency variations in practical applications. Extensive tests are provided to validate effectiveness of the proposed method.

The quality factor of coils should be high enough to deliver power efficiently during inductive power transfer. To achieve a higher quality factor, coils are designed either with a larger size and thicker wire or with a special structure, making the coils bulky and complicating the fabrication. This paper presents a systematic method to design the coils in series–series inductive power transfer with the smallest possible value of quality factor to realize the requirements of power transferability and efficiency. The electrical parameters of the coils are normalized, decoupled in equations, and designed sequentially. It is found that the smallest value of the quality factor for required efficiency is achieved using an optimal normalized impedance. The physical parameters of the coils are selected sequentially to realize the electrical parameters. This paper presents two operating conditions of series–series inductive power transfer, and example sets of coils with a 100-mm air gap are designed for these operating conditions using the same procedure. The coils were fabricated and tested in a 3.3-kW converter. The measured output voltage (200–400 V for 400 V input) and the coils' efficiency (98.9% at peak power) met the specifications. All switches turned on with zero voltage.

This paper proposes a current sensorless control strategy for the dual active bridge (DAB) converter with nonlinear disturbance observer (NDO)-based load current feedforward. The proposed method can regulate both the dc-bus voltage and the current of the DAB converter without current sensors. Several performance indexes are established for the parameter design and a detailed design method is presented in this paper. When a single-phase H-bridge inverter is connected, the double-frequency oscillation from the feedback path is suppressed by proper parameter design, while the transient response of dc-bus voltage can be further improved by the NDO-based load current feedforward with a notch filter in the feedforward path. The performance of the proposed control method and the effectiveness of the parameter design are verified in a prototype by experimental results.

This paper presents a hybrid nonisolated dc–dc commutation cell, which is generated by the integration between conventional commutation cell and ladder-type passive switched capacitor (SC) cell. From the resulted hybrid cell are derived three different dc–dc converters: a buck-type, a boost-type, and a buck–boost-type. The three structures are analyzed in this paper and are presented the topological stages, static gain characteristics in continuous conduction mode and discontinuous conduction mode, steady-state analysis. The analyses are generalized in relation to the number of switched-capacitor cells employed, which allows the increase of the rated gain of the converters by adding more SC cells. In addition, the proposed hybrid nonisolated dc–dc commutation divides naturally the voltage stress among the semiconductors and capacitors of the power stage. A 1-kW prototype was developed to verify the operation of the three proposed converters and their theoretical analysis. For the buck-type topology, designed with an input voltage of 600 V and output voltage of 450 V, a peak efficiency of 99.2% and efficiency at rated power of 99% were obtained.

This paper proposes a new topology of a hybrid ac/dc microgrid, where there are multiple subgrids connected to the common bus by bidirectional ac/dc converters (BADCs) and bidirectional dc/dc converters (BDDCs) in the system. The rated ac frequencies in different ac subgrids and the rated dc voltages in different dc subgrids can be different for different applications. All the storages in the system are concentrated to form a storage subgrid for convenient management and high efficiency, which maintains the common bus voltage. To ensure the hybrid microgrid operates well, a proper power management method is necessary to control the power flow among multiple subgrids. This paper proposes a decentralized power management method for the hybrid microgrid to make the interacted subgrids operate in coordination and support each other. First, taking the characteristics of the common bus configuration into consideration, a ${P_{{\rm{dc}}}} - v_{{\rm{dc}}}^2$ droop control strategy is proposed to maintain the common bus voltage and to realize power sharing among storages in the storage subgrid. Second, as the interaction among multiple subgrids is more complicated compared to the conventional hybrid, a coordinated power control strategy based on the common bus voltage, ac subgrid frequency, and dc subgrid voltage is designed for the BADCs and BDDCs to realize the power interaction among different subgrids. Furthermore, the proposed strategy takes the capacities and load types of each subgrid into consideration; hence, it is still suitable when the capacities of subgrids are mismatched and it can ensure the power quality of the subgrids with high proportion of critical loads. The effectiveness of the proposed power management method is verified by the real-time hardware-in-loop tests.

The modeling and control of a buck–boost and stacked dual half-bridge (DHB) integrated bidirectional dc–dc converter have been studied in this paper. This converter features high-voltage transfer ratio, high efficiency, and the minimum number of switches. In this paper, an extended, continuous, full-order, state-space averaging modeling method is proposed. Compared with existing methods, the proposed method exhibits higher coincidence with the switching circuit simulation, in steady and especially dynamic states. Due to its high dynamic accuracy and low complexity, the proposed modeling method provides a better theoretical analysis and a fast simulation tool for transient process and control design of converters with dual-active-bridge units, especially with DHB units. By using this method, the high-frequency transformer series inductance current is directly divided into a sampled dc component and a fluctuant component. Only the sampled dc one is included into state variables, but both components are considered into state equations. Besides, this method regards the entire converter as a linear superposition of its subsections, which provides a stepwise modeling based on linearization of subsections. Moreover, a decoupled proportional-integral control method is proposed to enhance the stability and dynamic response of the converter. This control method is analyzed by the proposed models, which can be regarded as an application of the proposed modeling method. Simulation and experiments have validated both the proposed modeling and the decoupled control strategy.

© 1986-2012 IEEE. This paper proposes an active switching harmonic current reduction method within the dc-link capacitor of two-level, three-phase, back-to-back converters. This method is based on the derived analytical solution for switching harmonic currents in the dc-link. It is shown that by controlling the pulse width modulation carrier waveform's phase angles, the harmonics in the second carrier band of the rectifier and the inverter can be synchronized such that cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. The feasibility of the proposed approach has been verified experimentally and results are presented in this paper.

These days, constant on-time current mode (COTCM) control scheme is widely used in the voltage regulator (VR) controllers because it has a higher light-load efficiency and a higher BW design capability while maintaining a simpler compensation requirement. One issue plaguing the COTCM control is its slow transient response which is caused by its fixed T ON operation. During the heavy-load step-up transient, the duty cycle becomes saturated and the inductor current increment becomes limited by T ON and the minimum off time ( T OFF $\_$ MIN) ratio, which can create a large undershoot at load step up. On the other hand, in the load step-down case, if the load step down occurs at the beginning of T ON, a large overshoot can be created at the output. To solve this issue, this paper presents a method designed to increase the T ON at load step up and then very quickly, decrease at load step down in order to reduce the undershoot and overshoot at output or otherwise save the output capacitor. In this proposed method, the increase or decrease of T ON is proportional to the output change which eliminates the chance of any overcorrection or ring-back problem unlike the methods presented in prior forums. This feature enables the control to work seamlessly in a high-frequency load repetitive case in VR applications. Since this T ON change occurs only in the transient period when duty cycle is saturated, it does not affect the small-signal property of the COT control. Moreover, the proposed methods are very much compatible with the state-of-the-art single and multiphase COT control structures. Simulation and test results in both single and multiphase operations are also presented in the paper to verify the proposed concept.

Sheppard–Taylor power factor correction (ST-PFC) rectifier could obtain a high power factor due to its capability of overcoming the control detuning issue. However, it needs a bulky electrolytic capacitor at the load side to buffer the double-frequency ripple power (DFRP), which reduces the reliability and power density significantly. This paper proposes a control method to divert the DFRP to the small energy transfer capacitor. Consequently, the bulky electrolytic capacitor is replaced with a small film capacitor. The proposed method is carried out by introducing the freewheel state (one switch is turned on and the other is turned off ) into the control. So no extra hardware is added, which makes the proposed method cost-effective. A low electromagnetic interference emission is also achieved due to the continuous input–output currents. In addition, the proposed method can be extended to other topologies easily. This paper first gives the detailed analysis of the proposed control method, and then introduces the controller design. The selection of the passive components is also briefly discussed. Finally, the simulation and experimental results verify the effectiveness of the proposed control method.

It is mandatory to keep the total harmonic distortion in the output of most inverters below the limits prescribed by different international standards. The harmonic distortions caused due to nonlinear loads may not get corrected by typical magnitude controller, like PID controller. Repetitive controller is more effective in such situations. Often, repetitive controller is used as add-on block to the conventional magnitude controller. Design of repetitive controller can be easily implemented on digital platform. Rapid change in phase and magnitude of inverter-filter's transfer function near corner frequency causes instability problems in repetitive controller. Various techniques have been proposed by researchers to overcome this problem. Most of the reported techniques rely on digital compensation. However, it is hard to find a digital compensator, which simultaneously meets the phase and gain requirements at moderate computational effort. Here, a new output voltage feedback scheme has been proposed, which simplifies the requirement of digital compensation. The proposed scheme requires an extra hardware but at negligible added cost. In spite of this extra hardware, the proposed circuit turns out to be more energy efficient in comparison to few popular schemes, reported in literature, where some resistance is introduced in the inverter's filter for better stability of controller. In addition to the proposed modification the paper presents a simplified explanation of the various factors affecting stability of repetitive controller. The paper also discusses a novel experimental method for verifying the efficacy of repetitive controller in suppressing distortion of any particular harmonic order.

In order to substantially improve multiphase interleaved bidirectional buck/boost converter's (IBC) current ripples and efficiency, this paper proposes a more symmetric four-phase inverse coupled inductor (ICI) structure and its comprehensive design solution. First, this paper presents a more symmetric four-phase ICI structure which has the advantages of larger inductance values and more symmetric inductance parameters comparing to existing four-phase ICI of similar volume. Second, this paper presents the four-phase ICI's two magnetic circuit analytical models, the four-phase ICI's inductance calculation results from the two models are verified with Maxwell 3-D simulation and experiments. Third, this paper presents the four-phase ICI's comprehensive design solution with the two models and Maxwell 3-D piecewise linear transient simulation. Finally, the advantages of the four-phase ICI are verified with experiments. When the four-phase ICI is used in multiphase IBC, the IBC will have smaller current ripples, more symmetric phase current waveforms, lower output voltage ripple, and higher efficiency both in buck and boost modes.

In this paper, a current-fed modular multilevel dual-active-bridge (CF-MDAB) dc–dc converter is proposed for medium-voltage dc (MVDC) application. The proposed converter inherits favorite characteristics of DAB circuits including soft switching and small passive components. Thereby, high efficiency and high power density can be achieved. Moreover, with direct input and output dc current control, the CF-MDAB is suitable for a breakerless MVDC system since it can realize dc fault ride-though operation. In addition, the dv / dt in the converter is mitigated with the quasi-three-level modulation. In this paper, the proposed converter is applied to integrate the battery energy storage to a MVDC grid as an example to illustrate its operation principles and fault current control capability. The operation principles are presented for both normal and dc fault conditions; the dynamic models are also derived not only under normal operation mode but under dc fault operation mode as well. The control systems under different operation modes are designed, respectively, based on the developed mathematical models. A downscaled 40-kHz 3-kW CF-MDAB prototype was built in the laboratory. The experimental results under both normal condition and dc fault condition verified the analysis as well as the control performance of the proposed converter.

This paper proposes a novel three-phase transformerless hybrid series active filter (THSeAF) based on voltage-fed type of converters (VSCs) to address major power quality issues related to residential and commercial buildings. This power quality compensator presents an affordable solution to overcome current-related issues as well as integrating renewables to ensure a sustainable supply to the loads. The controller is based on a novel combination of the synchronous reference frame and pq theory to extract voltage and current harmonics as well as voltage unbalances. A proportional resonant (P+R) regulator is producing gate switching signals for the three-phase THSeAF. The generated duty-cycle waveforms will produce compensating voltage to rectify harmonic currents initiated from typical nonlinear loads. The device ensures a reliable and dynamically restored power supply on the load's point of common coupling by means of three auxiliary dc supplies. This paper describes mitigation of power-quality-related issues of a microgrid systems and smart distribution grids along with the proposed solution to enhance the power system performances. A combination of simulations and experimental laboratory results are carried out to validate the study.

A novel soft-switching interleaved coupled-inductor boost converter is proposed in this paper. Only a single active soft-switching module is needed to simultaneously achieve the soft-switching property of the two switches in the interleaved coupled-inductor boost converter. The better efficiency is achieved with the less components and cost. The two main switches can achieve the ZVT turn-on and smaller-current turn-off simultaneously when the single active soft-switching module is active. Due to the coupling characteristic of the inductors, the voltages across the two inductors are changed at the same time; therefore, the equivalent circuit is equal to the parasitic capacitors of the two main switches in parallel to resonate with the auxiliary inductor. By coupling two input inductors, the volume and cost of the circuit can be reduced. The interleaved coupled-inductor topology can also reduce the input and output current ripples and share the input and output currents. The operating modes, analysis, and design of the proposed circuit have been discussed in this paper. Simulation and experiments are finally conducted to verify the validity of the proposed circuit.

Supporting the grid and improving its reliability have recently become major requirements for large distributed generation units. Under most grid faults, the accuracy of the traditional voltage support schemes (VSSs) is dramatically affected due to the existence of the zero-sequence voltage. Also, the traditional VSSs have been used only in the STATCOM applications, where the active power is zero. This paper proposes an advanced VSS in the converter-interfaced units, called zero-sequence compensated voltage support (ZCVS), to accurately regulate the three-phase voltages of the connection point within the pre-set safety limits. The proposed scheme not only compensates the zero-sequence component but also considers the active power injection. Unlike the traditional methods, the proposed VSS is adapted even in resistive distribution systems. The contribution of this paper is, however, ternate. As the second contribution, the limited active power oscillation (LAPO) is proposed to be augmented to the ZCVS. This feature limits the oscillation to a specified value which provides an adjustable dc-link voltage oscillation setting while simultaneously supporting the ac host grid, even under severe unbalanced faults. Third, the maximum active power delivery (MAPD) to the ac grid is also formulated for the ZCVS. The successful results of the proposed support scheme and complementary strategies are verified using selected simulation and experimental test cases.

Multiple transmitters powering a single receiver simultaneously is a good alternative to upgrade the power capacity of the wireless power transfer (WPT) system by using multiple modular inverters manufactured in a larger quantities, since the demand for high power applications is on the rise. A multiple overlapped transmitters based WPT system is presented in this paper. In order to alleviate the effects of the cross couplings between the transmitters, additional capacitors are adopted in the transmitters and the configuration of additional capacitors is provided. Virtual active and reactive powers are defined to decompose the transmitter current into active and reactive components. A transmitter current control scheme based on the proposed current decomposition method consisting of one reactive current control loop and one active current control loop is also presented in this paper. Finally, a low-scale experimental setup using two overlapped transmitters WPT system is provided to verify the proposed approach. The experimental results indicate that the proposed method could improve the stability of output voltage control and achieve minimal current difference amongst transmitters. Besides, the overall system efficiency is improved to 90.34% with the proposed control method at 1.45 kW output power, which demonstrates that the proposed method is a potential solution for high power applications.

Cascaded H-bridge (CHB) based active power filters (APF) can compensate high-order harmonics in medium and high-voltage systems with relatively low switching frequency. This paper reveals that a severe dc capacitor energy unbalance can be induced by harmonic energy exchange if the frequency of APF output current coincides with the switching harmonic frequency of CHB cells. The mechanism of harmonic energy exchange is analyzed, and it is found that the dc capacitor energy unbalance is essentially affected by the carrier frequency of CHB. A noninteger ratio carrier frequency can be adopted to avoid the divergence of dc voltage, but there is still a significant low-frequency ripple on the dc voltage. This paper proposes an adaptive carrier frequency optimization method. By predicting the dc voltage ripple amplitude under different carrier frequencies, this method can adaptively select the optimal carrier frequency to minimize the dc voltage ripple. The proposed method is also proved to be robust against system parameter variations, and it can be implemented by a practical and simple linear computation method. Results obtained from simulation, experimental prototype, and field test are finally presented to verify the proposed adaptive carrier frequency optimization method.

DC electric springs (DCES) are emerging technologies for the (i) regulation of mains voltage against the intermittent renewable generations and (ii) harmonic cancellation in dc microgrids. When conventional converter topologies (e.g., half-bridge or full-bridge converter) are adopted as DCES, the battery storage of the DCES has to process both the dc power and the ac harmonic power. The pulsating ac power can severely reduce the lifetime of the battery. To address this issue, a hybrid-DCES (H-DCES) is proposed in this paper to perform (i) and (ii) in a decoupled manner. With a modified topology and control method, the H-DCES can divert the ac current to the ground and retains the function of manipulating noncritical load for dc voltage regulation. The immediate benefits of this H-DCES are the reduction of storage capacity and a prolonged lifetime of the battery. Both the operating principle and the mathematical model of the proposed H-DCES are analyzed in this paper. A prototype of the H-DCES is practically tested in a 48-V dc grid. The experimental results show that the H-DCES can realize the decoupled operation of dc voltage regulation and harmonic cancellation. Simulation studies further demonstrate that the H-DCES requires less storage capacity than its counterparts.

This paper documents a new three-switch, isolated boost dc–dc converter. The major features of the proposed converter are as follows: 1) continuous input current; 2) reduced one active switch, one additional diode, and one additional capacitor; 3) unchanged primary and secondary voltage waveforms of the transformer when the duty cycle is changed; and 4) removal of the snubber circuit. This paper presents the operating principles, analysis, parameter design guidelines, and simulation results for the proposed converter. To verify the performance of the proposed converter, a 400 W prototype was constructed with a 40–60 V dc input. A PID controller was used to maintain the dc output voltage at 400 V. The simulation and experimental results matched those of the theoretical analysis.

In this paper, a voltage balance control strategy based on dual active bridge (DAB) dc/dc converters in a power electronic traction transformer (PETT) is proposed. Based on this strategy, the output-parallel DAB converters can be equivalent to an input-series-output-parallel system. Furthermore, a PETT starting control method is put forward, which can effectively avoid risks of overcurrent and overvoltage in the PETT starting process. In order to carry out the controller design and system stability analysis, three different kinds of mathematical models of DAB converters are set up. The first model is related to a single DAB converter, the second model reflects the equivalent relation between an output-parallel DAB system and a single DAB converter in terms of the output-voltage control loop, and the third model indicates that the voltage balance control system based on DAB converters is a multiinput-multioutput system. Due to the nonzero off-diagonal elements of the controlled plant, there is a mutual effect between different control loops, which is defined as “interaction” in the multivariable feedback control theory. The stability of the voltage balance control system is made up of two parts, including the stability of each single-input-single-output (SISO) control loop and the influence of the interaction on the system stability. The research is carried out to measure the intensity of the interaction in this paper, and a criterion directly based on the controlled plant is proposed to predict the influence of the interaction, which can obviously simplify the system stability analysis. Considering the particular traction onboard application, a new control structure toward the voltage balance controller is introduced. Based on the new structure, the controller is designed and the stability of the SISO system is analyzed. Finally, a five-cell PETT prototype with rated power of 30 kW is taken to carry out further research, and the experiment results verify the effectiveness and correctness of the proposed algorithms.

The modular multilevel converter (MMC) with nearest level modulation (NLM) is widely used in the high voltage applications for low switching frequency and easy implementation. Existing literature has not provided a complete submodule (SM) fault ride-through scheme for MMC with NLM. In this paper, a strategy including fault detection, localization, redundancy, and recovery is proposed to ensure continuous operation of MMC under IGBT open-circuit faults conditions. It only requires a few hardware and software resources. The features of MMC and SMs with three types of failures are studied, respectively. Based on these, the fault detection method is proposed by using a simple hardware circuit, thus high computation complexity is avoided. Since current fault localization schemes are limited to MMC with carrier phase shifted pulse width modulation, this paper further proposes a strategy for MMC with NLM to locate the faulty SM and identify the fault type. After this, the fault redundancy and the proposed fault recovery method are applied to eliminate the fault and then exit the failure state. Therefore, the ability of SM fault ride-through can be realized. Analysis of failure characteristics are verified in simulation. Experimental results based on a single-phase MMC prototype with 11 SMs per arm are presented to demonstrate the validity of the proposed fault ride-through strategy.

This paper proposes a sliding-mode direct power control (SMDPC) strategy for doubly fed induction generator (DFIG) under both balanced and unbalanced grid conditions using extended active power. When the traditional power theory is used under unbalanced grid condition, the control strategies usually need to be modified and become more complicated. Therefore, an extended active power is proposed in this paper, which is effective under both balanced and unbalanced grid conditions with a simple control strategy. Based on the extended active power, elaborated analysis of the mathematical model of DFIG is obtained. Furthermore, an SMDPC strategy using the extended active power is proposed, which can obtain sinusoidal stator currents and restrain electromagnetic torque ripples under unbalanced grid condition without the need of decomposition process and phase-locked loop (PLL). Comparative experimental studies of the SMDPC using the extended and traditional active powers for DFIG are conducted to validate the effectiveness of the proposed strategy under both balanced and unbalanced grid conditions. In addition, the dynamic performance and robustness of the proposed SMDPC are also proved to be satisfying by the experimental results.

The performance of a standard model predictive controller (MPC) is directly related to its predictive model. If there are unmodeled periodic disturbances in the actual system, MPC will be difficult to suppress the disturbances, thus causing fluctuations of system output. To solve this problem, this paper proposes an improved MPC named predictive-integral-resonant control (PIRC). Compared with the standard MPC, the proposed PIRC could enhance the suppression ability for disturbances by embedding the internal model composing of the integral and resonant loop. Furthermore, this paper applies the proposed PIRC to PMSM drives, and proposes the PMSM control strategy based on the cascaded PIRC, which could suppress periodic disturbances caused by the dead time effects, current sampling errors, and so on. The experimental results show that the PIRC can suppress periodic disturbances in the drive system, thus ensuring good current and speed performance. Meanwhile, the PIRC could maintain the excellent dynamic performance as the standard MPC.

Two carrier-based unipolar-sinusoidal pulse width modulation (SPWM)-oriented modulation techniques for an isolated bidirectional dc–ac converter are proposed, compared, and validated in this paper. The dc–ac converter is composed of a full-bridge (FB) inverter cascaded with a cycloconverter through a high-frequency transformer. Both modulation techniques proposed in this paper can realize zero-voltage switching (ZVS) for the FB inverter and zero-current switching or ZVS for the cycloconverter in all load range, and are able to suppress the voltage spikes introduced by the transformer leakage inductance as well. In order to increase the converter efficiency and power density, we propose to utilize SiC MOSFETs for the converter. The first modulation technique enables the utilization of Si-SiC hybrid switches with no synchronous rectification (SR), for the purpose of lowering the converter cost. The second modulation technique requires all switches to be SiC MOSFETs, but with SR, which increases the converter efficiency. A 400-V dc to 240-V ac 1.2-kW prototype has been developed to validate the effectiveness and performance of the proposed carrier-based unipolar-SPWM-oriented modulation techniques.

A novel control strategy for single-phase current-source inverters connected to an ac grid is proposed in this paper. The control strategy aims to inject maximum power to the grid under transient and steady-state conditions by the tracking of sinusoidal references. This paper presents the modeling and the design of the control strategy based on the exact linearization of the inverter model. Results are obtained by computational simulation and validated experimentally. By using error performance indexes in the analysis of the results, it is demonstrated that the proposed controllers achieve correct tracking of the sinusoidal reference while keeping a low switching frequency, which helps to minimize the commutation losses.

This paper presents a hybrid seven-level converter based on T-type converter and H-bridge cascaded suitable for low-voltage and high-power-density applications. The operation principles and conduction paths are analyzed comprehensively. Voltage balance control of the floating capacitors is the key point of this paper. Mathematical expressions of capacitor voltage balance conditions are deduced based on sinusoidal pulse width modulation (SPWM). The results show that floating capacitor voltages are only balanced when the modulation index is below 0.82 under SPWM. In order to enlarge the modulation index ensuring the capacitor voltage balance, space vector modulation (SVM) is also applied to regulate floating capacitor voltages taking advantage of redundant switching vectors. Meanwhile, in SVM, there are no additional control requirements for the capacitor voltage. Taken both SPWM and SVM into consideration, the limit to the range of operation for this seven-level converter is presented, which is a function of the modulation index and the power factor. The merit of dc voltage utilization improvement in this topology is also analyzed based on simulation results. Simulations and experimental results under different modulation index and RL load are presented to verify the modulation strategies illustrated in this paper.

This paper presents a new system for reactive power compensation and suppression of negative-sequence current for power quality improvement in electrical railways and the feeding three-phase utility grid, based on YNvd-connected balance transformer. Different from the conventional railway static power conditioner based compensation systems, this system integrates multiplex back-to-back converters (MBTBC) into phase- β side flexible taps through a cascade connection instead of into phase- β side feeder via a coupling transformer, thus the installation space and initial costs are reduced significantly. In addition, a new power distribution strategy with simple implementation is adopted in this paper, by which the compensation capacity of MBTBC can be decreased by 25%, compared with the commonly used full compensation scheme. As the first part of this topic, this paper focuses on the theoretical analysis, including the system topology, basic and partial compensation principles and its implementation method. While, the controller design on converter-level, stability analysis, and simulation and experimental verification are the main tasks of the second part of this topic.