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High-voltage direct current (HVDC) circuit breaker development and deployment strongly depend on the testing process, which ensures that the HVDC circuit breakers will satisfy design requirements. This article presents an HVDC circuit breaker test bench circuit configuration that can provide controllable large output currents to simulate different fault conditions for the current breaking test and high output voltage for the dielectric withstand test. The current breaking test circuit is based on multiple cascaded power converters connected in parallel to provide the necessary output current capability. Each cascaded power converter is composed of multiple cells that are operated by a phase-shifted pulsewidth-modulated signal for greater controllability and higher quality of the output waveform. The dielectric withstand test circuit is a simple high-voltage source with a low power rating that can also be used to charge the test bench and the internal circuitry of the circuit breaker that is to be tested. The proposed test bench ensures that fault conditions can be replicated accurately and offers greater flexibility by being able to test mechanical, semiconductor-based, or hybrid HVDC circuit breakers with different current and voltage ratings on the same hardware without any changes. The idea and the operating principle of the proposed test bench are verified experimentally on a downscaled system that consists of three cascaded power converters connected in parallel with three cells per cascaded power converter and with a total equivalent switching frequency of 92.5 kHz. [ABSTRACT FROM AUTHOR]

It has been widely accepted to apply dc circuit breakers (DCCBs) to protect dc grids. Nevertheless, existing DCCBs have one or more following limitations: insulation recovery scheme of mechanical switch, additional precharge power supply, high conduction loss, unreliable current-breaking process, and unidirectional design. In this letter, a new DCCB with low conduction loss, simple precharging scheme, and reliable breaking ability is proposed. The proposed DCCB could break both fault and operating current actively with the same simple operation sequences. Moreover, bidirectional topology possessing all advantages mentioned previously is also presented. Topology introduction, parameters designing, and scaled-down experiment of the proposed DCCB are all presented in the letter. [ABSTRACT FROM AUTHOR]

A new series-type hybrid circuit breaker (S-HCB) concept for dc fault protection is reported that is fundamentally different from other prior-art hybrid circuit breakers (HCB) or solid-state circuit breakers (SSCB) in the literature. The S-HCB conducts its load current through metal wires instead of power semiconductor switches and curtails its fault current to near zero throughout the entire opening process of a series mechanical switch. It offers the low on-resistance of the conventional mechanical contacts for normal operation and µs-scale fault response even faster than the fast-acting SSCBs. A proof-of-concept S-HCB prototype experimentally demonstrates the interruption of a fault current of 30 A within 10 μs at a dc voltage of 600 V. The operating principle, simulation, and experimental results are discussed in this letter. [ABSTRACT FROM AUTHOR]