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A 55-71-GHz fully integrated power amplifier (PA) using a distributed active transformer (DAT) is implemented in 90-nm RF/MS CMOS technology. The DAT combiner, featuring efficient power combination and direct impedance transformation, is suitable for millimeter-wave (MMW) PA design. Systematic design procedures including an impedance allocation plan, a compensation line, and a gain boosting technique are presented for the MMW DAT PA. The monolithic microwave integrated circuit (MMIC) performs a high and flat small-signal gain of 26 [+ or -] 1.5 dB from 55 to 71 GHz, which covers a full band for 60-GHz wireless personal area network applications. Using cascode devices and a DAT four-way power combination, the CMOS PA delivers 14.5-and 18-dBm saturated output power with 10.2% and 12.2% power-added efficiency under 1.8- and 3-V supply voltage, respectively, at 60 GHz. The maximum linear output power ([P.sub.1 dB]) is 14.5 dBm. To the best of our knowledge, the MMIC is the first demonstration of a V-band CMOS PA using a DAT combining scheme with highest linear output power among the reported 60-GHz CMOS PAs to date. Index Terms--CMOS, distributed active transformer (DAT), gain boosting, power amplifier (PA), V-band.

A compact and broadband 0.8-77.5-GHz passive distributed drain mixer using standard 0.13-[micro]m CMOS technology is presented in this paper. To extend the operation bandwidth, a uniform distributed topology is utilized for wideband matching. This paper also analyzes the device size and number of stages for the bandwidth of the CMOS distributed drain mixer. To optimize the conversion gain performance of the CMOS drain mixer, a gate bias optimization method is proposed and successfully implemented in the mixer design. This mixer consumes zero dc power and exhibits a measured conversion loss of 5.5 [+ or -] 1 dB from 0.8 to 77.5 GHz with a compact size of 0.67 x 0.58 [mm.sup.2]. The output 1-dB compression point is -8.5 dBm at 20 GHz. To best of our knowledge, this monolithic microwave integrated circuit has the widest operation bandwidth among CMOS wideband mixers to date with good conversion efficiency and zero dc power consumption. Index Terms--CMOS, distributed mixer, drain mixer, millimeter wave (MMW).

Sub-harmonic modulator and demodulator are presented in this paper using 0.13-[micro]m standard CMOS technology for millimeter-wave (MMW) wireless gigabit direct-conversion systems. To overcome the main problem of local oscillator (LO) leakage in direct-conversion systems, the sub-harmonically pumped scheme is selected in this mixer design. An embedded four-way quadrature divider is utilized in the sub-harmonic Gilbert-cell design to generate quadrature-phases LO signals at MMW frequency. For broadband applications, a broadband matching design formula is provided in this paper to extend the operational frequency range from 35 to 65 GHz. To improve the flatness of conversion loss at high frequency, high-impedance compensation lines are incorporated between the transconductance stage and LO switching quad of the Gilbert-cell mixer to compensate the parasitic capacitance. The sub-harmonic modulator and demodulator exhibit 6 [+ or -] 1.5 dB and 7.5 [+ or -] 1.5 dB measured conversion loss, respectively, from 35 to 65 GHz. For MMW wireless gigabit applications, the gigabit modulation signal test is successfully performed through the direct-conversion system in this paper. To our knowledge, this is the first demonstration of the MMW CMOS sub-harmonic modulator and demodulator that feature broadband and gigabit applications. Index Terms--CMOS, demodulator, direct conversion, millimeter wave (MMW), modulator, sub-harmonically pumped.

A 44-GHz monolithic microwave integrated circuit (MMIC) low-loss built-in linearizer using a shunt cold-mode high-electron mobility transistor (HEMT), based on the predistortion techniques, is presented in this paper. The proposed cold-mode HEMT linearizer can enhance the linearity of the power amplifier (PA) with a low insertion loss (IL < 2 dB), a compact die-size, and no additional dc power consumption. These advantages make the linearizer more suitable for millimeter-wave (MMW) applications. The physical mechanism of the gain expansion characteristics of the proposed linearizer is analyzed. A systematic design procedure for a low-loss linearizer is developed, which includes: 1) insertion loss minimization through a device-size selection and 2) linearity optimization through a two-tone test. To demonstrate the general usefulness of the proposed linearizer, the linearizer was applied to a two-stage 44-GHz MMIC medium PA and a commercial MMW PA module. After linearization, the output spectrum regrowth is suppressed by 7-9 dB. To keep the adjacent channel power ratio below -40 dBc, the output power has been doubled from 15 to 18 dBm at 44 GHz. The error vector magnitude of the 16-quadrature amplitude modulation signal can be reduced from 6.11% to 3.87% after linearization. To the best of our knowledge, this is the first multistage MMW PA with a low-loss built-in linearizer. Index Terms--Linearizer, millimeter-wave (MMW), monolithic microwave integrated circuit (MMIC), nonlinear, power amplifier (PA).

CMOS broad-band compact high-linearity binary phase-shift keying (BPSK) and IQ modulators are proposed and analyzed in this paper. The modulators are constructed utilizing a modified reflection-type topology with the transmission lines implemented on the thick Si[O.sub.2] layer to avoid the lossy silicon substrate. The monolithic microwave integrated circuit (MMIC) chips were fabricated using standard bulk 0.13-[micro]m MS/RF CMOS process and demonstrated an ultracompact layout with more than 80% chip size reduction. The broadside couplers and 180[degrees] hybrid for the modulators in the CMOS process are broad-band designs with low phase/amplitude errors. The dc offset and imbalance for the proposed topology are investigated and compared with the conventional reflection-type modulators. The measured dc offset was improved by more than 10 dB. Both BPSK and IQ modulators feature a conversion loss of 13 dB, a modulation bandwidth of wider than 1 GHz, and second- and third-order spur suppressions of better than -30 dBc. The IQ modulator shows good sideband suppression with high local-oscillator suppression from 20 to 40 GHz. The modulators are also evaluated with a digital modulation signal and demonstrate excellent modulator quality and adjacent channel power ratio. Index Terms--Binary phase-shift keying (BPSK), CMOS, coupler, millimeter wave (MMW), quadrature amplitude modulator (QAM).

The design and performance of two new miniature 360[degrees] continuous-phase-control monolithic microwave integrated circuits (MMICs) using the vector sum method are presented. Both are implemented using commercial 0.18-[micro]m CMOS process. The first phase shifter demonstrates all continuous phase and an insertion loss of 8 dB with a 37-dB dynamic range from 15 to 20 GHz. The chip size is 0.95 mm x 0.76 mm. The second phase shifter can achieve all continuous phase and an insertion loss of 16.2 dB with a 38.8-dB dynamie range at the same frequency range. The chip size is 0.71 mm x 0.82 mm. To the best of the authors' knowledge, these circuits are the first demonstration of microwave CMOS phase shifters using the vector sum method with the smallest chip size for all MMIC phase shifters with 360[degrees] phase-control range above 5 GHz reported to date. Index Terms--CMOS, monolithic microwave integrated circuit (MMIC), phase shifter, vector sum method.

Three broad-band miniature monolithic transformer singly balanced diode mixers for operation in the microwave and millimeter-wave bands are reported in this paper. The coupled-line equivalent models are used to synthesize the initial design of these transformers up to 50 GHz. The first one is a broad-band spiral transformer mixer, and the second one is a 21-GHz Marchand-type transformer mixer. These two mixers with chip sizes around 0.29 [mm.sup.2] exhibit bandwidths of 105% and 54.5%, respectively. We also propose a 30-GHz single-coiled transformer mixer, which has comparable performance with the first two mixers and reduced chip size. The single-coiled transformer mixer achieves a bandwidth of 100% with the chip size smaller than 0.25 [mm.sup.2]. In order to save chip area, all these transformers provide broad-band matching to the diodes directly. To the authors' knowledge, these mixers achieve the widest bandwidths with the smallest chip sizes among all passive balanced mixers using monolithic-microwave integrated-circuit processes in dc-40-GHz frequency range. Index Terms--Diode, mixer, monolithic microwave integrated circuit (MMIC), transformer.

Two monolithic 3-bit active phase shifters using the vector sum method to K-band frequencies are reported in this paper. They are separately implemented using commercial 6-in GaAs HBT and high electron-mobility transistor (HEMT) monolithic-microwave integrated-circuit (MMIC) foundry processes. The MMIC HBT active phase shifter demonstrates an average gain of 8.87 dB and a maximum phase error of 11[degrees] at 18 GHz, while the HEMT phase shifter has 3.85-dB average measured gain with 11[degrees] maximum phase error at 20 GHz. The 20-GHz operation frequency of this HEMT MMIC is the highest among all the reported active phase shifters. The analysis for gain deviation and phase error of the active phase shifter using the vector sum method due to the individual variable gain amplifiers is also presented. The theoretical analysis can predict the measured minimum root-mean-square phase error 4.7[degrees] within 1[degrees] accuracy. Index Terms--Active phase shifter, HBT, high electron-mobility transistor (HEMT), K-band, monolithic microwave integrated circuit (MMIC), vector sum method.

Reflection-type binary phase-shift keying and in-phase and quadrature modulator monolithic microwave integrated circuits (MMICs) are reported in this paper. These MMICs are fabricated by 1-[micro]m HBT process and evaluated successfully under vector signal characterization. A cold-mode HBT device model with varying bias conditions is proposed, which is suitable for millimeter-wave circuit design and simulation. The analysis and design equations of imbalance effects for the reflection-type modulators are also presented. These MMICs demonstrate measured error vector magnitude of less than 12%, a carrier rejection of better than 15 dB, and an adjacent channel power ratio of better than -21 dBc from 50 to 110 GHz. Index Terms--Binary phase-shift keying (BPSK), cold-mode HBT model, HBT, in-phase and quadrature (IQ), millimeter wave, modulator, monolithic microwave integrated circuit (MMIC).

Using the concept of traveling-wave gain stages, novel GaAs pseudomorphic high electron-mobility transistor monolithic-microwave integrated-circuit (MMIC) distributed amplifiers (DAs) are demonstrated to achieve high gain and over several octaves of bandwidth performance simultaneously for microwave and millimeter-wave frequency applications. The cascaded single-stage distributed amplifier (CSSDA) is used as traveling-wave gain stages to improve the gain performance of the conventional distributed amplifier (CDA). By adopting the low-pass filter topology between the CDA and CSSDA and tuning the gain shape of CDA and CSSDA separately, a broad-band and high-gain DA, called CDA-CSSDA-2, was accomplished. The detailed design equations are derived for the broad-band matching design of this CDA-CSSDA-2. Two other MMICs, namely, a two-stage CSSDA called 2-CSSDA, and another two-stage design called CDA-CSSDA-1, are also included in this paper. This CDA-CSSDA-2 achieves 22[+ or -]1.5-dB small-signal gain from 0.1 to 40 GHz with a chip size of 1.5 x 2 [mm.sup.2]. It also produces a gain-bandwidth product of 503 GHz, which is the highest among all reported GaAs-based DAs. The flat group delay also demonstrates the feasibility of this design for future digital optical communications and broad-band pulse applications. Index Terms--Broad-band, cascaded single-stage distributed amplifier (CSSDA), conventional distributed amplifier (CDA), distributed amplifier (DA), monolithic microwave integrated circuit (MMIC), traveling-wave gain stage.

This paper presents the design, fabrication, and test results of a three-stage 155-GHz monolithic low-noise amplifier (LNA) fabricated with the 0.1-[[micro]meter] pseudomorphic (PM) InAlAs/InGaAs/InP HEMT technology. With this amplifier in a test fixture, a small-signal gain of 12 dB was measured at 155 GHz, and more than 10-dB gain from 151 to 156 GHz. When the amplifier was biased for a low noise figure (NF), an NF of 5.1 dB with an associated gain of 10.1 dB was achieved at 155 GHz. All the results above are referred to the monolithic-microwave integrated-circuit (MMIC) chip with the input and output waveguide-to-microstrip-line transition losses corrected. Index Terms - InP, LNA, MMIC, pHEMT.

This paper presents a 94-GHz power amplifier (PA) module. This module contains three identical monolithic microwave integrated circuit (MMIC) PA chips and demonstrates 0.35-W output power at the waveguide output port with a miniature size. The MMIC PA is a two-stage monolithic W-band PA using 0.1-[[micro]meter] pseudomorphic AlGaAs/InGaAs/GaAs T-gate power high electron mobility transistor (HEMT) process. This MMIC PA exhibits a measured linear gain of 8 dB and a maximum output power of 300 mW with 10.5% peak power-added efficiency (PAE) at 94 GHz. To our knowledge, both the 300-mW output power MMIC PA and the 0.35-W PA module represent the highest output power amplification component performance at this frequency. Index Terms - HEMT, MMIC, PA.

The time-domain Diakoptics is implemented in the finite-difference time-domain (FDTD) method with two types of connecting interfaces: i) directional interface (TLM-type), and ii) total-field interface (FDTD-type). The FDTD-type interface provides a more efficient way to realize time-domain Diakoptics than TLM, especially for device optimization problems. To emulate the TLM-type interface in FDTD, two novel algorithms are developed in this paper. One is to implement an ultra-wideband absorbing boundary on the excitation plane during excitation. The other is to separate directional waves without the knowledge of incident waves. For a large circuit with cascaded modules, sequential and parallel algorithms are provided to connect them. With these connecting algorithms, time-domain Diakoptics is one candidate method to realize modular and parallel computation in FDTD simulations. The validity of these algorithms is confirmed by comparison with simulated results from Microwave SPICE.

A full-wave analysis based on the mode-matching technique is applied to analyze cascaded junction discontinuities of coplanar type transmission lines, coplanar waveguide (CPW) and finline. Results for a CPW-finline transition, a shielded CPW gap and a symmetric notch incorporating the finite metallization thickness effect are presented. The influence of metallization thickness on the coupling effect between cascaded junction discontinuities is also presented and discussed for the first time.