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The parallel three-phase grid-connected converters sharing dc and ac bus can increase the system power level effectively. However, the zero sequence circulating current (ZSCC) will occur inevitably under space vector pulse width modulation or discontinuous pulse width modulation (DPWM). In this paper, the mechanism and the mathematical model of ZSCC are studied. Then, a hybrid PWM (HPWM) strategy is proposed to suppress the ZSCC based on the same zero sequence voltage injected, which is dependent on the common grid information. The dc voltage utilization of HPWM can be extended compared with sinusoidal PWM (SPWM). The number of parallel modules can be infinity theoretically by using HPWM. It is noted that there is no internal commutation among modules (expect the dq current reference). Finally, the feasibility and the effectiveness of the proposed method are verified by experiments. [ABSTRACT FROM AUTHOR]

The parallel three-phase grid-connected converters sharing dc and ac bus can increase the system power level effectively. However, the circulating current will occur inevitably. The existing studies primarily focus on dc, fundamental, and low-frequency circulating current. The high-frequency circulating current (HFCC) caused by asynchronous carriers is studied emphatically in this paper, which is based on the analysis of the change of circulating current in one control cycle. A novel method to suppress HFCC caused by asynchronous carriers of modules is proposed. In this method, the carrier period of slave module is adjustable and the carrier period of the master module is constant. When a large phase shift between modules occurs, an adjusting cycle is inserted to carrier of slave module to realize resynchronizing with master module. It is noted that there is no other commutation between the two modules (expect the dq current reference), such as the carrier information. Finally, the feasibility and effectiveness of the proposed method are verified by experiments. [ABSTRACT FROM PUBLISHER]

A converter system for high-power applications, connected to a medium-voltage network using a step-up transformer, is presented in this paper. The converter-side winding of the transformer is configured as an open-end, and both the ends of the windings are fed from two different converter groups. Each converter group comprises of two parallel voltage-source converters (VSCs), whose carrier signals are interleaved to improve the harmonic quality of the resultant switched output voltage of that converter group. However, an additional inductive component is required to suppress the circulating current that flows between the parallel-interleaved VSCs. An integrated inductor is proposed, which suppresses the circulating current in both the converter groups. In addition, the functionality of the line filter inductor is also integrated. Flux in various parts of the integrated inductor is analyzed, and a design procedure is also described. The volume and the losses of the proposed solution are compared with that of the state-of-the-art solution. The control of the proposed converter system is also discussed. The analysis has been verified by the simulation and experimental results. [ABSTRACT FROM PUBLISHER]

The interleaving of the carrier signals of the parallel voltage-source converters can reduce the harmonic content in the resultant switched output voltages. As a result, the size of the line filter inductor can be reduced. However, in addition to the line filter, an inductive filter is often required to suppress the circulating current. The size of the system can be reduced by integrating these two inductors in a single magnetic component. An integrated inductor, which combines the functionality of both the line filter inductor and the circulating current filter inductor, is presented. The pulsewidth modulation (PWM) schemes to reduce the flux in some parts of the integrated inductor are also analyzed. The flux reduction achieved by using these schemes is demonstrated by comparing these schemes with the conventional space vector modulation and the 60° clamped discontinuous PWM scheme. The impact of these PWM schemes on the harmonic performance is also discussed. Simulation and experimental results are presented to validate the analysis. [ABSTRACT FROM PUBLISHER]

This paper proposes a phase-shift interleaving control method for variable-phase switched-capacitor (SC) converters that can perform voltage conversions with little electromagnetic interference over a wide range of operating condition. This is achieved by having multiple units of SC converter connected in parallel and an N-state hysteresis unit selection control scheme which works along the interleaving control to vary the number of converters in operation. By having the capacitors of inactive units connected to the output and the converters operating with output interleaving operation, the output capacitor that is typically required in SC converters for maintaining a small voltage ripple is made redundant in this configuration. A three-unit SC converter of the proposed configuration is described in this paper. Experimental results show that the proposed solution works satisfactorily with good regulation, input and output interleaving operations, and dynamic response for a wide operating range. [ABSTRACT FROM PUBLISHER]

In this paper, a real-time circulating current reduction method for parallel harmonic-elimination pulsewidth modulation (HEPWM) inverters is proposed. HEPWM techniques are often used in high-capacity inverters. For instance, in a hybrid microgrid, the inverters are employed to transfer power between the dc and ac buses. If the inverters are in parallel operation, the zero-sequence path can be established, and the zero-sequence circulating current will circulate among the inverters. The proposed method installs a cascade null-vector control system behind the conventional three-phase HEPWM modulator. The proposed null-vector control system can be disabled to save switching losses when the zero-sequence circulating current is small, whereas it can be enabled when the zero-sequence circulating current becomes large. The proposed method does not affect the line-to-line voltage waveforms of HEPWM inverters, and it can easily enable/disable the null-vector control system to provide bumpless transfer. Compared with the conventional HEPWM with zero-sequence harmonics elimination, the proposed method can provide an extra 15% modulation index range. Results that were obtained from both simulation and experiments confirmed the performance and effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

In common dc-link parallel-inverter systems, the amplitudes and the phase angles of three-phase inverters can be separately adjusted to control power sharing. However, when the space-vector modulation technique is used in a parallel-inverter system without the output transformers, the zero-sequence circulating current will occur. This paper provides detailed analysis of the zero-sequence circulating current and proposes a novel dual-modulator compensation technique for eliminating the zero-sequence circulating current caused by power-sharing control systems. Results obtained from both simulation and experiments confirmed the performance and the effectiveness of the proposed compensation method. [ABSTRACT FROM AUTHOR]

Abstract-The input-series-output-parallel (ISOP) converter, which consists of multiple dc-dc converter modules connected in series at the input and in parallel at the output, is an attractive solution for high input voltage and high power applications. This paper reveals the relationship between input voltage sharing (IVS) and output current sharing of the constituent modules of the ISOP converter. A novel IVS control strategy, which is decoupled with the output voltage regulation, is proposed. This control allows IVS and output voltage regulation to be designed independently. An ISOP converter, which uses the phase-shifted full-bridge (PS-FB) converter as the basic module, is considered. Based on the proposed control strategy, this ISOP converter together with the control circuit can be decoupled from several independent singleinput and single-output systems. An ISOP converter consisting of three PS-FB modules is used to illustrate the design procedure, and a 3-kW experimental prototype is fabricated and tested. [ABSTRACT FROM AUTHOR]