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This article proposes a three-stage dead-time adjustment scheme for the leading-leg and lagging-leg switches of phase-shift full-bridge converter (PSFBC) according to the load conditions to enhance the conversion efficiencies at light loads. This article also investigates an iterative rigorous loss calculation for light loads under dead-time adjustment. The proposed iterative calculation can be used to modify the duty ratio of the transition region and estimate the operating currents more accurately; therefore, the losses of a PSFBC at light loads and under the dead-time adjustments can be effectively estimated. A PSFBC prototype with an input voltage of 380 V, an output voltage of 48 V, and a rated output power of 480 W is designed and implemented in this article. Experimental results show that comparing with the PSFBC without the dead-time adjustment and with the conventional dead-time adjustment, the conversion efficiency enhancements of 12.13% and 5.97% can be achieved by the proposed three-stage dead-time adjustment scheme at about 5% load condition, respectively. For a small-scale data center with 100 designed PSFBCs, simulated results indicate that about 3.21 MWh of electricity and 1.03 tons of carbon dioxide emission can be saved and reduced per year, respectively, by the proposed dead-time adjustment scheme. [ABSTRACT FROM AUTHOR]

In order to improve the speed regulation performance of induction motors, a multimodulation times space vector pulsewidth modulation (MMT-SVPWM) is proposed for the three-level neutral point clamped (NPC) converter. This method can eliminate the dead-time effect (DTE), which is caused by the addition of the dead time (DT) in the SVPWM. This article first analyzes the deviation of the output voltage that is caused by the DTE in the SVPWM, and then proposed the MMT-SVPWM. The generation of driving signals in this method is different from the ideal SVPWM. According to the directions of three-phase currents, the driving signals of a pair of complementary power switches are obtained by comparing a pair of multiple modulation times with the triangular carrier. Thus, this method directly eliminate the DTE, which is different from the SVPWM with DT. The output voltage vector is the same as that of the ideal SVPWM, and there is no zero-current clamping effect. Finally, the simulation and experimental results show that the proposed method effectively eliminates the DTE and improves the output currents of the three-level NPC converter. [ABSTRACT FROM AUTHOR]

In mobile applications, power density highly affects mobility, cost, form factor, and battery time. To improve power density, high switching frequency operation is highly desirable for a power converter. However, with high switching frequency, switching power loss increases significantly, compromising efficiency and battery time. This article presents an on-chip 3-level DC–DC converter, using all NMOS devices as power switches, which reduces switching power loss and silicon cost. To facilitate the all-NMOS power stage operation and enhance the robustness to input supply variation, a 3-switch boost-strap gate driver is designed. Meanwhile, an interception coupling dead-time (ICDT) control is introduced to minimize dead-time related power loss. An integrated circuit prototype was fabricated using a 0.35 μm CMOS process. Robustly working with a variable input voltage from 3 to 6 V, it regulates a programmable power output from 0.4 to 1.6 V, with a maximum power efficiency of 85.5% over a full power range of 800 mW and a maximum power density of 1.07 W/mm2. Thanks to the ICDT control, it achieves a 0.5 ns dead-time over a full-load range of 500 mA. [ABSTRACT FROM AUTHOR]

This paper presents the development of a Class-D full-bridge zero-voltage switching (ZVS) inverter, applicable to wireless power transfer (WPT) systems, operating at 13.56 MHz switching frequency with dynamic dead-time control (DDTC). Resonant-coupled WPT systems are being designed at ultrahigh switching frequencies to reduce the size of the wireless link and the passive components. Maintaining ZVS while controlling the output power delivered to a fixed or variable load is one of the major challenges of designing inverters at multi-MHz switching frequencies. DDTC is the approach deployed in this paper to sustain soft switching of a Class-D full-bridge inverter over the full range of output power while regulating the input dc bus voltage. Simulation results are presented to show that dynamically controlling the dead-time during input dc bus voltage variations reduces switch-node voltage overshoot, prevents large current spikes in the switching devices, and reduces associated high switching loss. Practical results obtained show that DDTC reduces switch-node voltage overshoot, increases the inverter efficiency, and reduces the steady-state temperature of the inverter during output power regulation. [ABSTRACT FROM AUTHOR]

The insertion of dead time will lead to the distortion of output waveforms, which seriously affects the characteristics of the ac induction motor control system. In order to reduce the output distortion of three-level T-type inverters caused by dead time insertion, an online feedback dead time compensation method is developed. In this method, the compensation time is obtained and further corrected by the online feedback of duty cycle. Meanwhile, current polarity judgment is accurately realized by sampling the neutral point (NP) potential and three-phase output terminal voltage potentials. In addition, in this article, we take the NP potential fluctuation into account to approximate the true situation. The developed method can be applied to both open-loop and closed-loop motor drive systems. To verify the effectiveness of the method, essential simulation and experiments are carried out. Compared with the traditional methods, the developed method can prominently reduce the output waveform distortion. Simulation results emphasize that the proposed scheme can significantly improve the performance of three-level inverters, and the identical conclusion is obtained on 210 V/2.24 kW motor platform. [ABSTRACT FROM AUTHOR]

To reduce the common-mode voltage (CMV) and eliminate the CMV spikes for two-level voltage source inverters (2L-VSIs), an improved model predictive control (MPC) based CMV reduction method is proposed in this paper considering dead-time effects. First, an improved voltage vector (VV) preselection strategy is proposed to reduce the CMV spikes caused by the dead time. Second, a new hybrid VV preselection strategy based on a delay compensation strategy and a modified current sector division strategy is proposed to completely eliminate the CMV spikes. As the proposed hybrid VV preselection based MPC strategy makes full use of the six nonzero VVs of the 2L-VSI, the current total harmonic distortions and ripples are reduced. The simulation and experiments are carried out to verify the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

This paper will present a dead-time elimination scheme for a pulsewidth-modulation (PWM)-controlled inverter/ converter. The presented dead-time elimination scheme does not require separated power supplies for freewheeling-current detection of high- and low-side power devices. The presented scheme includes the freewheeling-current polarity detection circuit and the PWM control generator without dead time. It will be shown that the presented scheme eliminates the dead time of PWM control for inverter/converter and therefore dramatically improves output voltage loss and current distortion. Experimental results derived from a field-programmable-gate-array-based PWM-controlled inverter are shown to demonstrate the effectiveness. Index Terms--Dead-time elimination, pulsewidth modulation (PWM).

This paper proposes a technique to compensate the effects of dead time in sinusoidal pulsewidth-modulated voltage-source inverters. The compensation is implemented by adjusting the switching frequency to avoid unfeasible pulsewidths of the gating signals, as well as to minimize the total harmonic distortion of the inverter output voltage. The technique can be used at any switching frequency, but the best results are obtained in the high-frequency range. The experimental results of the proposed technique that is applied in a three-phase induction motor drive system are presented. Index Terms--Dead time, harmonic distortion, sinusoidal pulsewidth modulation (PWM), voltage-source converter.

A new dead-time compensation method for vector-controlled ac motor drives is proposed. The method only compensates the fundamental and sixth harmonic component of the inverter-output distortions in synchronous reference frame. The fundamental component is compensated by feedforwardly adding a predetermined compensation signal to the voltage reference of ac motor drive. To compensate the harmonic distortions, the harmonic compensator with all-pass-based adaptive bandpass filter is proposed and builds up the feedback loop with current controllers in order to minimize the distortions due to dead-time effects. The method is software intensive and independent of the polarity of the phase currents and nonlinear-switching characteristics varied with operating conditions of the inverter. It is simulated and implemented on a 750-W laboratory ac motor drive, where its effectiveness is verified. Index Terms--AC drives, dead-time compensation, induction motor.

Compensation of nonlinear effects generated by dead-time and semiconductors voltage drop has been widely studied in the literature about two-level converters. This paper takes a closer look at those analyses for multilevel converters, specifically for a cascaded H-bridge (CHB) converter modulated with phase-shifted pulse width modulation. The interaction between the cells is analyzed for a generic $n$ -cell converter, from which a general expression for the distortion generated by the nonlinearities has been obtained. Based on this expression, a compensation signal for the overall converter is calculated on each sample time, which is a fraction of the triangular carrier used to modulate each cell, thus significantly improving the quality of the output voltage signals. Experimental validation of the proposed compensation method is presented using a three-phase four-cell CHB converter prototype of 5.5 kW. [ABSTRACT FROM AUTHOR]

Conventional dead-time compensation methods, for pulsewidth-modulated (PWM) inverters, improve the current output waveforms; however, the zero-current crossing effect is still apparent. This letter proposes a new method, based on angle domain repetitive control, to reduce the distortions in the PWM inverters output waveforms caused by the dead time and the zero-crossing problem. Index Terms--AC servo drive, angle domain, dead-time compensation, pulsewidth-modulated (PWM) inverter, repetitive control, zero-current crossing.

The dead time necessary to prevent the short circuit of the power supply in pulsewidth-modulated (PWM) voltage inverters results in output voltage errors. Although individually small, when accumulated over an operating cycle, the voltage errors are sufficient to distort the applied PWM signal. This paper presents a method to correct for the dead-time errors. The pulse-based dead-time compensator (PBDTC) is less hardware- and software-intensive than other dead-time compensation methods providing a low-cost solution. The pulse-based technique is developed by analyzing the effects of dead time on a pulse-by-pulse basis and correcting each pulse accordingly. The technique is evaluated through simulation and experimental results. Other compensation methods are evaluated, and the results compared with the pulse-based technique. This comparison indicates previous methods can produce magnitude and phase errors in the applied terminal voltage, whereas the proposed method compensates for the dead time without significant magnitude and phase errors in the terminal voltage of PWM voltage source inverters. Index Terms - Dead time (DT), instabilities, power semiconductor devices, pulse-based dead-time compensator (PBDTC), turn-on delay (TD), unsymmetrical pulses.

This paper proposes a new method of dead-time effect compensation. The proposed solution is based on additional phase current measurements realized by analog-to-digital converters. These measurements are carried out at the time instants specified by a pulsewidth-modulation (PWM) strategy. This makes it possible to estimate inverter currents at the commutation instants and, finally, to estimate the voltage error caused by dead time. This voltage error is compensated during the next switching period by modification of a reference voltage. The proposed solution can be used to compensate the voltage error in multilevel multiphase voltage source inverters. The experimental research studies were carried out on three-phase two-level and three-level neutral-point-clamped inverters supplying 55- and 160-kW motors, respectively. The results of the experimental investigations are presented in this paper. [ABSTRACT FROM PUBLISHER]

The term dead time refers to a prime safety factor for most power electronic converter topologies, and it is included either in the control software or in the gate/base driver hardware, depending on the application as well as the control requirements. In this paper, the authors present a comprehensive numerical analysis of dead-time effects on the output voltage of a three-level neutral-point-clamped (NPC) inverter. To incorporate the dead-time effect in the output voltage, 3-D models of three-level carrier pulse width modulation (PWM) methods are modified for two dead-time implementations. Closed-form expressions of inverter phase voltage harmonics for phase opposition disposition (POD) PWM are derived based on the double Fourier series approach and modified contour plots. The harmonic spectra from numerical evaluations, simulations, and experiments for natural sampling (NS), symmetrical regular sampling (SRS), and asymmetrical regular sampling (ARS) are compared to validate the mathematical models. In addition, the fundamental voltage with respect to the dead time and the load phase angle is presented based on analytical results and simulation. [ABSTRACT FROM PUBLISHER]

In this paper, a speed controller considering the effects of system dead time and parameter variations for indirect field-oriented induction motor drives is presented. First, an indirect field-oriented induction motor drive is implemented, and its dynamic model is found based on the stochastic approach. Second, a two-degree-of-freedom speed controller is designed to match the prescribed speed command tracking and load regulating specifications. Since the performances of the closed-loop controlled plant are much influenced by the presence of the inherent system dead-time and parameter variations during wide-range operations, a dead-time compensator and a model following controller are proposed to enhance the robustness of the two-degree-of-freedom speed controller. The simulated and experimental results show that good control performances both in speed command tracking and load regulating characteristics are achieved.

Dead-time insertion increases noise and torque pulsation in motors under open-loop constant V/f control, and it results in instability in motors under sensorless field-orientated control or direct torque control at low speed, degrading performance of motor drive systems. In order to overcome the drawback of dead-time insertion, a novel current-detection-independent dead-time compensation technique based on terminal voltage A/D conversion is proposed in this paper. Both current polarity and compensation time can be extracted from the sampled terminal voltage. Experiments on an induction motor rated at 210 V, 2.2 kW demonstrated the proposed technique can significantly improve the performance of the fixed compensation, online compensation, and even the feedback compensation method. The proposed scheme does not rely on current sensors, and thus can be applied to both open-loop and closed-loop motor drive systems. When combined with the fixed compensation method, the performance of the proposed technique is even comparable with the feedback compensation method within a large frequency range, making it very attractive for open-loop constant V/f drives where current sensors are not available. [ABSTRACT FROM PUBLISHER]

This paper introduces a combination of two proposed efficiency improvement techniques for a microinverter with current mode control zero-voltage switching output stages. The first technique is dynamic dead-time optimization wherein pulse width modulation dead times are dynamically adjusted as a function of load current. The second method is advanced phase skipping control which maximizes inverter efficiency by controlling power on individual phases depending on the available input power from the photovoltaic source. Neither of the techniques requires any additional circuit components and both can be easily implemented in digital controller firmware. The two techniques were designed and implemented in a 400-W three-phase microinverter prototype. The experimental results validate the theoretical analysis of these techniques and demonstrate that a significant efficiency improvement can be achieved by combining the two proposed control techniques. [ABSTRACT FROM AUTHOR]

Zero voltage switching (ZVS) of power semiconductor devices is an effective way to improve the efficiency and power density of the power electronic converters with extremely high switching frequency. This article aims to analyze and realize the true full-range ZVS operation of a totem-pole power factor correction circuit. The available ZVS control strategies are investigated, and the conditions for the realization of full-range ZVS operation are analyzed. It is revealed that the existed control strategies did not consider the influence of the dead-time, resulting in the failure of ZVS operation in some input voltage ranges. To address this issue, two feasible retrofitted control strategies, namely the turn-off current optimization control and the adaptive dead-time control, are proposed. The merits and drawbacks of the two control strategies are carefully analyzed and compared. It is found that the adaptive dead-time control can not only achieve the true full range ZVS but also significantly reduce the loss of the freewheeling diodes. The design consideration of key parameters is discussed. Finally, the feasibility of the proposed control and the correctness of the theoretical analyses are verified by simulation and experiment. [ABSTRACT FROM AUTHOR]

A simple parameter-independent online compensation scheme for the dead time and inverter nonlinearity in an interior-permanent-magnet-synchronous-motor drive through waveform analysis is presented. The effectiveness of the proposed scheme is verified through the simulations and experiments using the DSP TMS320F28335. Without requiring any additional hardware, the proposed scheme can effectively compensate the dead time and inverter nonlinearity even in the presence of the parameter uncertainty. [ABSTRACT FROM AUTHOR]

A simple and iterative algorithm is devised in this letter with the help of the small-gain theorem to determine the current polarities of pulsewidth-modulation voltage-source-inverter drives. Experimental results are also presented to show the effectiveness of the method when used in the dead-time compensation. Index Terms--Dead-time compensation, small-gain theorem.

The performance of Voltage Source Inverter (VSI) is affected by power semiconductor nonlinearities, dead time, and control delay. The compensation of these nonlinear effects is necessary to meet requirements in terms of current quality and high efficiency, especially for grid-connected power conversion systems. In this paper, the effects of nonlinearities are widely analyzed and a new compensation technique for a steady-state current-controlled VSI is proposed. It is based on a step-by-step voltage compensation on the basis of the current error evaluated within each control interval. As a result, a complete compensation is achieved within a whole period of the fundamental. To cope with the zero-current clamping effect, the proposed compensation technique is implemented in a recursive way. For slow-dynamic applications, such as photovoltaic systems, this method allows achieving high performance with very low computational requirements. [ABSTRACT FROM PUBLISHER]

A new dead-time compensation method for vector-controlled ac motor drives is proposed. The method only compensates the fundamental and sixth harmonic component of the inverter-output distortions in synchronous reference frame. The fundamental component is compensated by feedforwardly adding a predetermined compensation signal to the voltage reference of ac motor drive. To compensate the harmonic distortions, the harmonic compensator with all-pass-based adaptive bandpass filter is proposed and builds up the feedback loop with current controllers in order to minimize the distortions due to dead-time effects. The method is software intensive and independent of the polarity of the phase currents and nonlinear-switching characteristics varied with operating conditions of the inverter. It is simulated and implemented on a 750-W laboratory ac motor drive, where its effectiveness is verified. [ABSTRACT FROM AUTHOR]