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Compared with integrated gate commutated thyristors (GCTs), an integrated emitter turn-off thyristor (IETO) has a potential of higher turn-off current capability and requires lower power consumption for gate driver units, which is more suitable for high-power applications. Thus, in this article, an advanced design of 4-in IETO was presented. To reduce the gate commutation impedance and enhance the turn-off current, the turn-off circuit with low impedance DirectFETs was integrated into the housing. And the housing structure was carefully designed to provide a compact current commutation path. Then, a 4-in IETO prototype based on a 4.5 kV/5 kA GCT wafer was developed. Experimental results show that its maximum turn-off current was over 8.1 kA with an extremely short commutation time of 130 ns. And the total commutation inductance was only 0.38 nH. Additionally, the thermal and mechanical characteristics of the housing were also taken into consideration during design and verified by the thermal simulation and mechanical stress test. Consequently, according to this article, IETO has the potential to be a competitive device in high-power applications in the near future. [ABSTRACT FROM AUTHOR]

Gate electrode inductance is a key factor for the controllable current capacity of unity-gain turn-off devices. However, the precise and credible measurement of this nH-level inductance is very difficult due to the compact structure of housing package. In this article, a precise measurement methodology of nH-level gate electrode inductance based on calculation-error-free algorithm for unity-gain turn-off devices is proposed. First, the turn-off process was modeled and discussed. Based on the feature of different stages, a customized extraction method is proposed for nH-level inductance measurement with ultrahigh accuracy. Then, a gate current measurement method for separate cathode rings with minimum inductance introduction was invented and discussed. After careful measurement and calculation, the gate electrode inductance for each region was derived and the abrupt change in gate contact region was observed and analyzed. The inductances measured in this article can be further utilized for housing structure optimization and lateral arrangement of segments on unity-gain turn-off chips. [ABSTRACT FROM AUTHOR]