Search

This paper concerns the application of a result of Arden and Arthurs to a particular finite-state machine, the accumulator. Arden and Arthurs have shown that given a complete set of devices for some fixed sequence rate, any finite-state machine may be constructed from these devices to operate at this maximum rate. In this paper we consider the construction of a good representation (in terms of overall delay) of the m-bit accumulator, operating at the maximum rate. Examples are presented using state-of-the-art devices which illustrate the construction and give measures of usefulness and cost Of this accumulator.

A data-handling unit is described which permits binary or decimal arithmetic to be performed on data fields of any length from one to sixty-four bits. Within the field, character structure can be further specified: these processing entities, called bytes, may be from one to eight bits long. Fields may be stored with or without algebraic sign. On all operations, the relative offset or shift between the operand from memory and that from the accumulator can be specified. Besides the arithmetic operations, three new logical instructions allow any of the sixteen logical connectives of two variables to operate upon each pair of bits in the memory and accumulator operands. The variable field length, variable byte-size features, extend the use of connective operations to a surprisingly wide variety of logical, house-keeping, and editing tasks. These arithmetic and connective instructions are general and powerful programming tools which greatly simplify complex manipulations. Programming of typical tasks, with both the new instructions and with the instruction set of a conventionally-organized computer, has shown that the new set requires substantially fewer instructions to be written, stored, and executed. Furthermore, the new instruction set has considerably fewer distinct operations than the more conventional set. This is possible because the general-purpose instructions of the new set replace many ad hoc instructions which deal with pieces of instructions or data words, or which perform shifting, packing, or editing functions. The initial application of the variable field length data-processing unit is in the IBM Stretch computer.

This paper describes the logical design of an accumulator register for a general purpose digital computer. The only logic gates used are NOR gates and inverter gates and the sole storage device is a gated clocked flip-flop which takes the value on a single input line when the gate line is high. The accumulator register operates in conjunction with another register called the memory exchange register. The memory exchange register can be added to the accumulator, subtracted from the accumulator, ANDed with, and ORed with the accumulator; the result in each case being placed in the accumulator. The accumulator can also be shifted right or left. The problem of carry propagation during addition is alleviated by carry bridging. The accumulator circuitry has been made simpler by treating the operations to be performed collectively rather than individually, and by careful assignment of input-values to the storage devices.

In this paper the system design of a 250 Mc tunnel-diode computer is presented. To resolve the disparity between the obtainable arithmetic and main memory speeds, a sophisticated advanced control is used. The advanced control fetches instructions and operands from the main memory before they are actually needed by the arithmetic unit. These instructions and operands are stored in two small, high-speed tunnel-diode memories which are called queues. A third queue, the Storage Access Queue, is used for saving a storage access request if it cannot be serviced immediately. Hence, advanced control is split into four parts, the Instruction, Operand, Store and Arithmetic Controls, which operate independently (except for appropriate interlocks) of one another. In the design of any computing system which has advanced control, care must be taken to prevent the old value of a memory location from being used instead of a recently computed value. The proposed system insures that the latter is always used and in this respect the system appears as a conventional computer to the user. However, the system is not entirely conventional in its appearance; the use of a stack in place of the accumulator in the arithmetic unit is proposed. The arithmetic, modifier and input-output units are all designed to operate independently of one another and execute simple algorithms at high speeds. This permits the system to be built with an estimated 12,000 tunnel diodes and four 8000 word sections of memory. The system is expected to operate at very high speeds.

A family of parallel synchronous comparitors and adders are described which can be constructed entirely of either NOR or NAND circuits. An adder is shown combined with registers to form a high speed but inexpensive 20-bit accumulator. The standard accumulator functions of ADD, UNITE, EXTRACT, LEFT SHIFT, and RIGHT SHIFT are obtained at the cost of 7.5 gates per bit and 12 gate delays for stable sum.

It is proposed that possibly the best criterion for judging the arithmetic unit of any modern high-speed computer is its ability to compute d=(a 1 b 1 + a 2 b 2 + ... +a n b n )/ c ``accurately'' in the sense of J. H. Wilkinson. Here d, c, and a i , b i for i = 1, 2, ... , n, are assumed to be single-length numbers. However, the ability to retain each product a i b i double-length is desirable for high accuracy. For example, in fixed-point arithmetic d can be computed subject to only one rounding error in computers which possess a double-length accumulator that has the ability to sum the double-length products a i b i and to divide the double-length dividend (a 1 b 1 +a 2 b 2 + ... +a n b n ) by the single-length divisor c, yielding a properly rounded quotient d. (Equally good results can be achieved in floating-point.) Several numerical examples are given which show the remarkable improvement in the accuracy of computed results in machines which pass this test. The need for a long-word-length is stressed, along with the need for both rounded and unrounded fixed-point and floating-point arithmetic.