Search

Your search keyword '"Solomon, Paul A."' showing total 8 results
Start Over Author "Solomon, Paul A." Journal ieee transactions on electron devices
8 results on '"Solomon, Paul A."'

1. ReSta: Recovery of Accuracy During Training of Deep Learning Models in a 14-nm Technology-Based ReRAM Array

Author

Athena, Fabia Farlin, Gong, Nanbo, Muralidhar, Ramachandran, Solomon, Paul, Vogel, Eric M., Narayanan, Vijay, and Ando, Takashi

Abstract

In this article, we propose an electrical bias technique to recover the accuracy of a degraded ${\text {HfO}}_{x}$ -based resistive random access memory (ReRAM) array in deep neural network (DNN) training. We simulate degradation through the application of ${\sim } {10}^{{4}}$ pulses having high pulse amplitude, resulting in a fatigued ReRAM array that fails to converge during training. We propose a novel technique, recovery stabilization (ReSta), which can recover the array accuracy up to the level it was before the fatigue was introduced. After using the proposed controlled recovery technique, we obtain an accuracy of 98% on the reduced Modified National Institute of Standard and Technology (MNIST) classification task, approaching a floating point baseline. This work demonstrates a viable pathway to recover the performance of the fatigued ReRAM crossbar arrays in in-memory DNN training.

Published
2023
Full Text
View/download PDF

2. Investigation of thermal crosstalk between SOI FETs by the subthreshold sensing technique

Author

Shamsa, Manu, Solomon, Paul M., Jenkins, Keith A., Balandin, Alexander A., and Haensch, Wilfried

Subjects
Silicon-on-isolator -- Thermal properties, Silicon-on-isolator -- Electric properties, Field-effect transistors -- Analysis, Business, Electronics, Electronics and electrical industries
Abstract

The transient thermal crosstalk between the field-effect transistors (FETs) implemented on a silicon-on-insulator (SOI) substrate is examined. Findings reveal the achievement of a temperature resolution of ~50 mK, a time resolution of 5 ns and a temperature sensitivity of ~0.6 A/K.

Published
2008

3. Suitability of metal gate stacks for low-power and high-performance applications: Impact of carrier confinement

Author

Kumar, Arvind and Solomon, Paul Michael

Subjects
Gates (Electronics) -- Design and construction, Circuit design -- Analysis, Circuit designer, Integrated circuit design, Business, Electronics, Electronics and electrical industries
Abstract

The competitiveness of metal-gated (MG) devices is investigated using mixed-mode simulations of inverter delay chains for both low-power and high-power applications. The applications that are suitable for the in-gap MGs and valuable guidance to the industry regarding the range of work functions that would maximize performance for each application are described.

Published
2006

4. A general approach for the performance assessment of nanoscale silicon FETs

Author

Jing Wang, Solomon, Paul M., and Lundstrom, Mark

Subjects
Metal oxide semiconductor field effect transistors -- Analysis, Metal oxide semiconductor field effect transistors -- Electric properties, Field-effect transistors -- Analysis, Field-effect transistors -- Electric properties, Semiconductor device, Business, Electronics, Electronics and electrical industries
Abstract

The study stated that a general approach, the EQ approach, to assess the scaling potential of nanoscale Si FETs based on both gate control (electrostatics) and quantum confinement. The report stated that with this EQ approach, the cylindrical wire FET and the planar double-gate MOSFET have approximately equal scaling capability, while the nonplanar wire structures are significantly better where the effective mass in the confinement direction of the planar MOSFET is relatively small.

Published
2004

Catalog

Books, media, physical & digital resources
See catalog results