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Binary oxides of Hf0.5Zr0.5O2 (HZO) have attracted considerable attention of the ferroelectric research community, owing to their excellent ferroelectric properties and CMOS compatibility. In particular, HZO films of a relatively high thickness (>10 nm) are studied widely for sensor and display applications. However, one of the major constraints of HZO materials is the formation of monoclinic phases (m-phase) with increasing film thickness resulting in the degradation of its remanent polarization ( ${P}_{r}$ ). Herein, we present a stress engineering method to achieve high ferroelectricity in thick hafnia using an interlayer. In our work, we attempted to address the aforesaid limitation of HZO by inserting a dielectric interlayer and elucidated the influence of interlayer on the relatively thick HZO films. high resolution TEM (HRTEM) analysis revealed that the presence of interlayer allows the growth of the top and bottom HZO layer in an independent direction thereby preventing the loss of ferroelectricity in HZO films with higher thickness by controlling its grain size. Similarly, grain angle incidence X-ray diffraction (GIXRD) and residual stress measurements suggest that the interlayer affects the o-phase formation from the t-phase owing to the tensile stress applied to the HZO films because of the coefficient of thermal expansion (CTE) mismatch between the HZO and interlayer. In our study, an improved $2{P}_{r}$ value of 30.2 $\mu \text{C}$ /cm2 was achieved by inserting a TiO2 dielectric interlayer in a relatively thicker HZO film. We believe that this approach can be adopted in various applications such as sensors, displays, and memory devices.

In this study, we have carried out an in-depth analysis on the role of high-pressure annealing (HPA) conditions on ferroelectricity as well as the interfacial property of Hf x Zr1– x O2 (HZO) capacitors in metal–ferroelectric–metal (MFM) structure. Unlike conventional 1:1 HZO films, HZO demonstrates the highest ferroelectricity at 1:3 Hf:Zr ratio in HPA and a significantly higher maximum remanent polarization ( ${P}_{\text {r}}$ ) of $31~\mu \text{C}$ /cm2 was achieved as compared to $19~\mu \text{C}$ /cm2 obtained in rapid thermal annealing (RTA) (HZO [1:1]). To understand the influence of HPA conditions, HZO [1:3] capacitors are annealed at various temperatures (300 °C, 400 °C, 500 °C, and 600 °C) and pressures (1, 50, and 200 atm). Ferroelectricity in HZO is found to enhance with increasing HPA temperature or pressure due to higher ferroelectric phase formation as revealed by grazing incidence X-ray diffractometer (GIXRD) analysis. Transient pulse switching measurement suggests the reduction in the effective thickness of the interfacial nonferroelectric film at a high HPA temperature or pressure which was also validated by impedance analysis. Further, impedance analysis reveals a reduction in the number of oxygen vacancy defects with increasing annealing temperature or pressure implying a phase transition from the tetragonal phase of nonferroelectric layer to the ferroelectric orthorhombic phase. In addition, excellent endurance property till 109 cycles with reduced wake-up effect was observed in HZO [1:3] capacitors with increasing the HPA temperature, while higher annealing pressure is found to increase ${P}_{r}$ without affecting its endurance property. The results obtained herein can be of significant scientific importance, especially to achieve enhanced ferroelectric property with reduced wake-up effect in Zr-rich HZO ferroelectrics.

In recent years, several experimental approaches have been adopted to study and understand the mechanism and improve the ferroelectricity of fluorite-type hafnia-based ferroelectric materials. In this regard, significant efforts have been made to elucidate the role of top electrode and bottom electrode (TE and BE) materials in defining the ferroelectricity in such systems, especially in terms of induced mechanical tensile stress by these materials during the process of annealing. However, the effect of the electrode material was not investigated both at TE and BE, and despite numerous efforts, there is still a lack of accurate and systematic understanding. In this report, we have carried out a systematic investigation on the effect of TE and BE materials having different coefficient of thermal expansion (CTE), by changing the electrode material one at a time, both at the top and bottom. The influence of the TE was confirmed using [TE/Hf0.5Zr0.5O2(HZO)/TiN] structure in which the BE was fixed as TiN, and the influence of the BE was confirmed using [TiN/HZO/BE] structure by fixing TiN as the TE. As revealed by polarization versus electric field and residual stress analysis, smaller CTE of the electrode was found to result in higher tensile stress in the HZO films during the annealing process, facilitating the formation of higher ferroelectric o-phase and thereby resulting in greater ferroelectricity. Although the influence of TE and BE on the ferroelectric property of HZO films was found to show similar trends according to the CTE value of the electrodes, the influence of TE on the ferroelectric property of the HZO capacitors is found to be mainly due to the variation in the induced mechanical tensile stress; pulse switching measurement and X-ray photoelectron spectrometer (XPS) analysis suggest that in case of BE, both the induced mechanical tensile stress and the interfacial dead layer were found to play a significant part. As a result, BE was found to have a greater influence on ferroelectricity of the HZO capacitors when compared with that of TE. The highest remnant polarization of 48.2 and $58.7~\mu \text{C}$ /cm2 was obtained for W with the lowest of CTE of $4.5\times 10^{-6}/^{\circ }\text{C}$ in both the configurations. The results obtained in this article are expected to provide a new way out to optimize the interface quality and ferroelectricity in HZO-based capacitors.

Hafnia-based ferroelectric (FE) devices have attracted significant attention as nonvolatile memory devices due to their compatibility with complementary metal–oxide–semiconductor processes. Among them, the FE tunnel junction (FTJ) has been considered as the next-generation of nonvolatile memory devices owing to its neuromorphic characteristics and nondestructive read operation as well as the high-density integration. However, degradation of ferroelectricity in a thin hafnia film causes a reduced tunneling electroresistance (TER) ratio. In this work, we inserted a TiO2 layer into the metal–FE–metal capacitor to provide an asymmetric structure for FTJ operations and recorded the enhanced remnant polarization with enhanced ferroelectricity. In this study, a high $2{P}_{r}$ value of $44.4~\mu \text{C}$ /cm2 and a notable TER ratio of 11.6 were observed for 6-nm thick hafnia films with 1-nm thick TiO2 films.

Electrical and reliability characteristics of hafnia ferroelectric capacitor are influenced by a capping electrode layer which controls the type of stress and the amount of oxygen vacancy inside hafnia. Here, we present the impact of metal nitride and metal oxide electrode on the ferroelectricity of a Hf0.5Zr0.5O2 (HZO) capacitor. For comparison, we employed two different top electrodes (RuO2 and TiN) with hafnia ferroelectric layer, forming RuO2/HZO/TiN and TiN/HZO/TiN capacitors. The RuO2 top electrode provides additional oxygen to the HZO film, lowering the amount of oxygen vacancies in the film. From material analysis, we found that the top RuO2/HZO interface exhibits less oxygen vacancy in comparison to the top TiN/HZO interface. In addition, for RuO2/HZO/TiN, due to different thermal expansion coefficient between top and bottom electrodes, the HZO film experiences significant tensile stress, resulting in the high o-phase formation and remnant polarization ( $\sim 20~\mu \text{C}$ /cm2) as compared with that of TiN/HZO/TiN capacitor ( $\sim 13~\mu \text{C}$ /cm2). This article suggests an efficient solution to reduce the interfacial defects and oxygen vacancies as well as to enhance o-phase formation and ferroelectricity.

In this article, we report the fabrication of Zr-rich high- ${k}$ ferroelectric hafnium zirconium oxide (HZO) capacitor with TiN as the top and bottom electrodes demonstrating an equivalent oxide thickness (EOT) of 5.7 A and remanent polarization ( ${P}_{r}$ ) of $\sim 16~\mu \text{C}$ /cm2. High- ${k}$ value and low EOT was achieved by utilizing multiphase region of HZO as well as high pressure post metallization annealing (HPPMA). Despite the high- ${k}$ value of Zr-rich HZO films, the emergence of multiphase region at higher physical thickness when annealed using rapid thermal annealing (RTA) limits its EOT value. On the contrary, multiphase emerges at a smaller physical thickness in HPPMA due to the formation of more o-phase as revealed by grazing incidence X-ray diffractometer (GIXRD). The smaller physical thickness of HPPMA together with the demonstration of significantly higher dielectric constant (>50) by HZO in the vicinity of multiphase, was therefore, found to be very effective in reducing the EOT.

This article highlights the role of HfO2 seed/dielectric insertion layers on the ferroelectric properties of hafnium zirconium oxide (HZO)-based metal-ferroelectric-metal (MFM) capacitors. Maximum remanent polarization ( ${P}_{r}$ ) of $22.1~\mu \text{C}$ /cm2 was achieved when HfO2 seed layer of critical thickness (10 A) was inserted at the bottom of HZO films. However, as the bottom HfO2 seed layer thickness increases from 10 to 200 A, the ${P}_{r}$ was found to decrease. The same critical thickness of HfO2 seed layer when inserted at top of the HZO films was found to give a maximum ${P}_{r}$ of $19.6~\mu \text{C}$ /cm2. The obtained ${P}_{r}$ in both the cases (bottom and top HfO2 seed layer) was found to be better than the reference HZO device ( $17.7~\mu \text{C}$ /cm2). Moreover, increased coercive field $({E}_{c})$ was noticed due to the HfO2 seed layer insertion (1.11 MV/cm for bottom HfO2 and 1.09 MV/cm for top HfO2) when compared with the reference device (1.04 MV/cm). Short pulse switching measurements were carried out on the as-fabricated capacitors, and an enhanced ${E}_{c}$ and interfacial capacitance was observed in case of devices with HfO2 seed layer. The crystal structures, and interfacial layer effect was keenly observed and analyzed for the HZO films with and without the seed layer using grazing incidence X-ray diffraction (GIXRD) and X-ray photoelectron spectroscopy (XPS), respectively. The HfO2 seed layer was found to result in higher o-phase formation, and facilitates the diffusion/migration of oxygen atoms from seed layer to the substrate or vice versa in the HZO capacitors giving rise to enhanced ferroelectricity.

Defects in amorphous oxide thin-film transistor (TFT) influence major transistor parameters such as the threshold voltage, mobility, and subthreshold slope. Thus, understanding these defects is crucial in securing high-reliability and high-performance devices. However, only very limited electrical analysis methods such as multifrequency ${C}$ – ${V}$ and temperature-dependent ${I}$ – ${V}$ methods have been applied to accumulation mode devices and these do not provide direct pictures of the defects during carrier transport. In this investigation, we employed the discharging current analysis method to attain quantitative information involving the defect densities of amorphous hafnium–indium–zinc–oxide (a-HIZO) TFT. We were able to estimate the number of defect sites of a-HIZO TFT as being of the order of 1018/cm 3 , although this is dependent on the Hf content. We believe that this method can be widely used to estimate the defect density of oxide TFTs.

Hf0.5Zr0.5O2 (HfZrO) thin-film ferroelectric materials have recently drawn considerable attention due to their attractive properties such as large bandgap (>5 eV), extreme thin thickness ( ${\le} 10$ nm), and good Si-compatibility. However, high crystallization temperature (600 °C–1000 °C) and relatively low remanent polarization ( ${P}_{r}$ ) compared to conventional perovskite ferroelectric materials are not suitable for flexible energy related devices, and are insufficient to overcome the barriers of conventional ferroelectric memory. In this paper, we investigated the effect of high-pressure postmetallization annealing (HPPMA) on the ferroelectric properties of the HfZrO metal–ferroelectric–metal (MFM) devices. HfZrO MFM capacitors annealed at 450 °C/50 bar shows a ${P}_{r}$ value of over 20 $\mu \text{C}$ /cm2 which is very advanced ${P}_{r}$ value. Based on the short-pulse switching technique, we quantitatively and systematically examined the improved characteristics of HfZrO prepared by HPPMA in terms of coercive field ( ${E}_{c}$ ) and possibly involved interfacial capacitance ( ${C}_{i}$ ).

A novel isolation technology using a laser-induced epitaxial growth (LEG) process is proposed to achieve monolithically stacked active silicon without additional thermal budget. The epitaxial behavior in the proposed LEG process can be completely understood by existing models regarding solidification of melted Si. Test devices for electrical characterization were fabricated based on an established 80-nm dynamic random access memory (DRAM) process. The characteristics of DRAM cell transistors with this LEG-processed active silicon are shown to be similar to those with conventional active silicon in terms of both device performances and distributions. Therefore, LEG process is believed to be a promising device isolation technology for monolithic multistack devices.

The three-dimensionally alternating integration of stackable logic devices with memory cells represents a revolutionary approach to the fabrication of extremely high density memory devices. Conventional silicon-based memory devices face impending limits if they are progressively scaled toward smaller-sized features. Here, we present a high-density memory architecture that utilizes electronically active oxide thin-film transistors (TFTs) combined with memory elements such as vertical NAND and resistive random access memory devices. High-mobility [~μsaturation of 20 cm2/(eV·s)] oxide TFTs with amorphous Hf-In-Zn-O performs fairly well as a decoder, a driver, a sense amplifier, and a latch, and the core elements that are required for 3-D logic circuits. With these logic circuit elements, memory density can be considerably increased up to tens of terabits due to the significantly reduced interconnection lines and logic circuit areas in the bottom silicon layer. This approach can serve as a useful strategy for the development of high-density memory devices.

We report the impact of high work-function (/spl Phi//sub M/) metal gate and high-/spl kappa/ dielectrics on memory properties of NAND-type charge trap Flash (CTF) memory devices. In this paper, theoretical and experimental studies show that high /spl Phi//sub M/ gate and high permittivity (high-/spl kappa/) dielectrics play a key role in eliminating electron back tunneling though the blocking dielectric during the erase operation. Techniques to improve erase efficiency of CTF memory devices with a fixed metal gate by employing various chemicals and structures are introduced and those mechanisms are discussed. Though process optimization of high /spl Phi//sub M/ gate and high-/spl kappa/ materials, enhanced CTF device characteristics such as high speed, large memory window, and good reliability characteristics of the CTF devices are obtained.