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Although smart home has received wide attention in recent years, numerous scholars focus more on energy optimization strategy than energy dispatch hardware device (named energy router). Meanwhile, this energy router should have several features, i.e., high renewable energy utilization, energy multi-port and low volume. Thus, this paper designs a nine-port energy router regarding smart home and proposes a multimode hierarchical management strategy for this energy router. First, for the multi-port demand of wind, solar, storage and utilization, this paper presents a nine-port energy router to improve the renewable energy consumption and power supply flexibility. In addition, to reduce the volume of the energy router, a non-isolated AC/DC hybrid topology is constructed through embedding the integrated power electronic converters, which achieves the miniaturization of the energy router. In order to improve the renewable energy utilization rate, the decentralized module control is proposed for the components of energy router to provide the voltage and frequency support for system, and realizes the power sharing of distributed generations (DGs). Furthermore, the power exchange control with three-mode switching is proposed to guarantee the global energy flow balance under complex conditions. Eventually, the feasibility of the energy router is verified by the simulation and experiments. [ABSTRACT FROM AUTHOR]

Lighting consumes the largest amount of energy in buildings. Recently, many studies of energy-efficient lighting systems with a variety of sensor and communication technologies have been conducted as a way to increase the cost efficiency of lighting. However, earlier studies have mostly focused on energy efficiency, whereas they have not significantly considered the occupant’s satisfaction. Therefore, this paper proposes an energy-saving lighting control system considering the occupant’s satisfaction. The proposed system improves the energy efficiency and the occupant’s satisfaction by controlling lighting control parameters considering the characteristics of space and the occupant’s behavior patterns. Moreover, this paper deployed the proposed lighting systems in a building and operated them in a real work environment to evaluate the performance. The results showed that the proposed system reduced energy consumption up to 43% by replacing the existing fluorescent lights with the proposed lighting control systems. [ABSTRACT FROM PUBLISHER]

Renewable energy is an advisable choice to reduce fuel consumption and $\rm CO_{2}$ emission. Therein, wind energy and solar energy are the most promising contributors to reach this goal. Although the hybrid wind/solar system has been widely studied, the real-time current sharing based on their maximum capacities is rarely achieved in terms of seconds. Based on this, this paper proposes an accurate current sharing and voltage regulation approach in hybrid wind/solar systems, which is based on distributed adaptive dynamic programming approach. Firstly, the equivalent wind/solar model is built, which is an indispensable preprocessing to achieve the complementary between wind energy and solar energy. Therein, the wind energy and solar energy can output relative current according to their respective capacity ratio, which ensure the maximum utilization ratio of renewable energy source. Furthermore, current sharing and voltage regulation problem is switched into optimal control problem. Under this effect, each source agent aims to obtain the optimal control variable and achieve accurate current sharing/voltage regulation. Moreover, an adaptive dynamic programming approach based on Bellman principle is proposed. It can achieve accurate current sharing and voltage regulation. Finally, the simulation results are provided to illustrate the performance of the proposed adaptive dynamic programming approach. [ABSTRACT FROM AUTHOR]

The energy consumption of consumer electronic (CE) devices during media playback is inexorably linked to the computational complexity of decoding compressed video. Reducing a CE device’s the energy consumption is therefore becoming ever more challenging with the increasing video resolutions and the complexity of the video coding algorithms. To this end, this paper proposes a framework that alters the video bit stream to reduce the decoding complexity and simultaneously limits the impact on the coding efficiency. In this context, this paper first performs an analysis to determine the tradeoff between the decoding complexity, video quality, and bit rate with respect to a reference decoder implementation on a general purpose processor architecture. Thereafter, a novel generic decoding complexity-aware video coding algorithm is proposed to generate decoding complexity–rate–distortion optimized High Efficiency Video Coding (HEVC) bit streams. The experimental results reveal that the bit streams generated by the proposed algorithm achieve 29.43% and 13.22% decoding complexity reductions for a similar video quality with minimal coding efficiency impact compared to the state-of-the-art approaches when applied to the HM16.0 and openHEVC decoder implementations, respectively. In addition, analysis of the energy consumption behavior for the same scenarios reveal up to 20% energy consumption reductions while achieving a similar video quality to that of HM 16.0 encoded HEVC bit streams. [ABSTRACT FROM PUBLISHER]

Consumer Electronics (CE) devices have started to support 360° videos in order to improve the perceived video quality by consumers. Higher compression in 360° videos not only lead to improved consumer perception, but also efficient energy and storage usage in CE devices. Consequently, efficient compression of such video content is becoming a critical design consideration of CE devices. To this end, this paper first proposes a residual weighting algorithm that utilizes the features of Weighted Craster Parabolic Projection Peak Signal-to-Noise Ratio (WCPPPSNR), to instigate the first stage of magnitude reduction of the residuals. The model parameters associated with the residual weighting algorithm are determined in the initial experimental stage. Next, the paper proposes a Quantization Parameter (QP) optimization technique which introduces the second stage of magnitude reduction for residuals with minimal impact on the overall video quality. The proposed method is tested on the Versatile Video Coding (VVC) test model with All-Intra configuration. In this context, the empirical results demonstrate that the proposed method improves the coding efficiency by 3.34% on average and outperforms the state-of-the-art techniques. [ABSTRACT FROM AUTHOR]

In recent years, new emerging display-based consumer products, such as augmented and virtual reality headsets and automotive video systems have required higher communication bandwidth due to higher bits per pixel and refresh rates. Thus, many video compression techniques have been actively studied to support the bandwidth in a limited communication environment, and the video electronics standard association (VESA) has standardized a display stream compression (DSC) that provides visually lossless video quality while preserving low power consumption and implementation cost. In this paper, we describe the detailed design of the DSC decoder and optimize a line buffer size that occupies most of the decoder’s resources in terms of power and area consumption. So our optimization method can save many resources used by the DSC decoder. The proposed decoder was functionally verified on an FPGA-based platform and synthesized with a 65 nm standard cell library. The performance analysis showed that the optimized decoder used only 62 mW for decoding per frame of FHD video by reducing power consumption by 37.0% and area by 39.9% than the original design; thus, our technology would become an attractive solution for developers of the emerging consumer products. [ABSTRACT FROM AUTHOR]

This paper describes energy management architecture for multimedia applications in battery powered devices to dynamically control the energy consumption of the device with an effort to increase the battery life. The architecture is divided into two parts, a not notification manager and a controller. The notification manager is a generic block and is implemented as part of the system software. It consists of a module that continuously monitors the battery state and sends out notifications. The controller is application specific. The notification manager issues notifications to the multimedia applications to operate under different energy modes based on an energy management algorithm proposed in the paper. The paper describes the implementation of the architecture for multimedia applications as they are the most energy consuming components in a handheld device. Experimental results provided at the end of the paper show the effectiveness of the described architecture. The notification manager also incorporates prediction and sensory modules to utilize the real world scenarios and achieve maximum energy saving. [ABSTRACT FROM AUTHOR]

Standby power refers to the electric power consumed by electronic appliances while they are in a standby mode. As the electronic appliance have become smarter, they consume more standby power. To reduce wasted electricity, techniques to save standby power have been developed in conjunction with network and communication technologies. Automatic standby power saving systems have been developed, but the proposed systems do not consider the cost reduction, user satisfaction, and personalized environment. Furthermore, to provide automation, an intelligent system for collected information is required, which increases the cost of system integration. Therefore, this paper proposes cloud based ondemand standby power management using consumer pattern racking to address these problems to deal with these issues. The proposed system offers rule based management services with three usage types determined by user preferences and living patterns. The total power consumption is measured to verify the performance of the system. The proposed system reduces the power consumption up to 9.3%1. [ABSTRACT FROM PUBLISHER]

In this paper, a novel computation and energy reduction technique for High Efficiency Video Coding (HEVC) Discrete Cosine Transform (DCT) for all Transform Unit (TU) sizes is proposed. The proposed technique reduces the computational complexity of HEVC DCT significantly at the expense of slight decrease in PSNR and slight increase in bit rate by only calculating several pre-determined low frequency coefficients of TUs and assuming that the remaining coefficients are zero. It reduced the execution time of HEVC HM software encoder up to 12.74%, and it reduced the execution time of DCT operations in HEVC HM software encoder up to 37.27%. In this paper, a low energy HEVC 2D DCT hardware for all TU sizes is also designed and implemented using Verilog HDL. The proposed hardware, in the worst case, can process 53 Ultra HD (7680x4320) video frames per second. The proposed technique reduced the energy consumption of this hardware up to 18.9%. Therefore, it can be used in portable consumer electronics products that require a real-time HEVC encoder. 1 [ABSTRACT FROM PUBLISHER]

Even though page cache layer of operating system enhances the performance of mobile devices by reducing the number of write requests issued to the underlying mobile storage, the mobile devices still suffer from the excessive write requests. This is because mobile applications frequently trigger synchronous writes with fsync() system call to guarantee the reliability of each application. Unfortunately, these synchronous writes significantly draw both performance and battery power of mobile devices. This paper proposes a novel page cache algorithm, called fsync-aware LRU (FSLRU), that adopts hybrid memory architecture, which is composed of DRAM and emerging nonvolatile memory (NVM). In particular, the proposed algorithm is designed to overcome the negative performance effect of NVM writes, which is measured on a real board. In order to improve performance and energy efficiency of mobile devices, FSLRU integrates the durability function into page cache layer and provides atomic update operations that are necessary to support strong durability. For detailed performance analyses, the proposed algorithm is implemented on a trace-driven simulator and is evaluated on a real board by replaying the results of the simulator. The evaluation results clearly present that FSLRU outperforms the conventional LRU algorithm by up to 3.2 times under three real world workloads while reducing power consumption by up to 99%1. [ABSTRACT FROM PUBLISHER]

Plug-in electric vehicles are becoming one of indispensable prosumer electronics components for smart households and therefore, their cost efficient energy scheduling is one of the main challenging issues. In the current schemas, the charging and discharging interval of the vehicles are normally announced by the owners in advance leading to the suboptimal profit gain in some situations and hence consumers dissatisfaction. In this paper, we propose an efficient charging/discharging scheduling mechanism for electric vehicles in multiple homes common parking lot for smart households prosumers. The proposed mechanism takes into account the optimal interval allocation considering the instantaneous electricity load and the vehicles request pattern. Based on the data from the vehicles, a mixed optimization model is formulated by the central scheduler which aims to maximize the profit of consumers and is then solved using an effective algorithm. The optimization results are then sent to the system controller determining the interval and energy trading patterns between the power grid and the vehicles. The proposed algorithm has low complexity and ensures the energy satisfaction for all consumers. The performance of the scheduling schema is verified through multiple simulation scenarios. [ABSTRACT FROM AUTHOR]

This paper provides a concrete implementation and comprehensive assessment of the energy-based fair queuing (EFQ) scheduling algorithm based on the Linux operating system. EFQ is an extended application of the classical fair queuing algorithm in the energy domain. It is designed to provide proportional power sharing as well as effective time-constraint compliance in energy-centric power management (PM) schemes, a type of operating system-level PM schemes that are targeted at providing a battery lifetime guarantee for energy-limited mobile systems. In this paper work, the structure of the Linux completely fair scheduler (CFS) has been effectively utilized to ease the EFQ implementation and reduce the scheduling overhead. Around 150 lines of code have been added to the Linux kernel V3.3 to achieve the EFQ-related functions and to implement the system calls that are required by the Linux user space. To assess the properties of the EFQ scheduler, a test-bench based on the POSIX threads has been developed and the benchmarks of an open-source embedded suite are referred to program the threads under test. The EFQ algorithm is assessed from two aspects, energy management and real-time scheduling. Experimental results on energy management show that EFQ is more effective than the CFS scheduler in managing energy and it can achieve a proportional share of the system power regardless of on which device the energy is spent. Experimental results on real-time scheduling demonstrate that EFQ can achieve strict time-constraint compliance and a robust response time upon the increase of energy estimation error and active tasks. [ABSTRACT FROM PUBLISHER]

Unpredictable battery lifetime arising from multitasking can have a significant negative effect on availability for mobile devices. In practice, some applications are prioritized and required to remain in operation for certain duration. This paper suggests a battery lifetime guaranteeing scheme for prioritized applications in multitasking mobile systems. The proposed approach profiles and analyzes the battery usage pattern of each task dynamically, and preserves the energy budget for operation of prioritized tasks for a guaranteed time. In addition, this paper proposes an energyconstrained scheduler that limits the energy consumption of tasks while preserving scheduling patterns, which translates to the QoS. The suggested scheme is implemented in a commercial smartphone and evaluated. The evaluation showed that the proposed scheme successfully provides guaranteed operation time for prioritized tasks. [ABSTRACT FROM AUTHOR]

Management of resource consumption in residential areas should take into account advances in the concept of Community Energy Management Systems, in which communities are involved in the monitoring and coordination of resource consumption. This paper presents a monitoring environment enabling the provision of monitoring and negotiation rules among residential users in order to minimize dispersion in total power consumption. It establishes mechanisms of detection of inconsistencies based on Linear Temporal Logic rules and mechanisms based on publication-subscription for transfer of quota among neighbors. The system is implemented and validated in a home environment. [ABSTRACT FROM PUBLISHER]

With advanced technology such as the Internet of Things, traditional consumer electronics are progressing not only toward personal devices but also sharable appliances that provide more coordinated management and intelligence. Under these conditions, the concept of consumer electronics as a service (CEaaS) has been introduced. In this paper, a framework for CEaaS is described. Specifically, an architecture and operational technology are suggested for a clustered energy storage system (ESS) that is shared among multiple households as a case of CEaaS. In multi-dwelling units that are common in urban areas, a clustered ESS installed in a shared space is considered because it is difficult to have sufficient space to install and operate an ESS at home. To operate a clustered ESS that is shared and virtually integrated among individual houses, the proposed architecture is designed in two phases: benefit maximization for all households, and benefit rebalancing for each household. Simulations show that clustered ESS operation based on the proposed architecture outperforms a conventional individual ESS operation in various conditions considering the characteristics of the household and appliances. [ABSTRACT FROM PUBLISHER]

The micro-electronics industry has been boosting the capabilities of multimedia mobile devices, but the battery, which is the only power source of most mobile devices, is experiencing relatively slow development. Therefore, determining how to optimize the energy consumption of mobile devices under a predefined performance requirement has become a critical issue. The video decoder, as one of the main energyconsuming multimedia applications, is the target application of this manuscript. This paper presents control algorithms for power regulation under the limited battery capacities of multimedia hand-held devices while executing a decoder application and maintaining a reasonable quality of user experience. A control system, which includes a real-time closedloop control subsystem and a power-control governor (PCG), has been implemented in the operating system of a low-cost development board. Instead of using any specific power sensor, a PMC (performance monitoring counter)-based estimator is used as the feedback signal in the closed-loop subsystem. After a theoretical system model has been obtained, classic controllers have been implemented in the development board. The control system is able to regulate the power consumption and the battery discharge rate in the presence of fluctuations in the decoder power-consumption demand. The proposed PCG can extend the battery lifetime by 15.5% and 12.8% in comparison with the conservative and ondemand governors of Linux, respectively. [ABSTRACT FROM PUBLISHER]

Since the last years of the 20th century, researchers and institutions related to electrical engineering have been trying to reduce the standby mode consumption. Even if a great number of studies have been carried out, a large part of them deals with complex structures which are out of the reach of most electronic device users or suggests improvements in the electronic circuits of the devices which will be further released. There are few solutions aiming at the mitigation of the standby mode consumption from old electronic devices or from those which are already in the market. Therefore, this paper proposes a simple and cheap solution to reduce the standby mode problem in already existing electrical equipment, preserving users? comfort and convenience. The proposed solution differs from standby killer devices for acting over many audio and video devices at the same time and for having as reactivation element the level of electrical current consumed by a television. In order to evaluate the proposed solution, two analyses were performed: an economic benefit evaluation, and its influence on entire electrical system, considering a large adoption of the proposed device. [ABSTRACT FROM PUBLISHER]

This paper presents an optimization algorithm that schedules the operations of household appliances to minimize the monthly electricity bill and maintain comfort for electricity consumers through the interaction between a home energy management system (HEMS) and consumers. In comparison with existing HEMS optimization algorithms over a single day time horizon without considering the monthly electricity bill, the novelty of the proposed method is that the monthly bill target preferred by the consumer is achieved through the optimal operation of appliances over a multi-day time horizon. A key part of the proposed approach is to relax the multi-day optimization problem by adding a penalty on the range of consumer preferred indoor temperature related to operation of the air conditioner, consequently leading to calculation of the desired monthly electricity bill. Simulation studies are illustrated with a single household and four households equipped with smart home appliances in time of use (TOU) and inclining block rate (IBR) pricing tariffs. The results demonstrate that the proposed method enables the total electricity cost and cumulative electricity consumption to successfully converge to each consumer?s target. Furthermore, the impacts of the penalty variable for the relaxed consumer thermal condition and the energy trade between households on the performance of the proposed algorithm are investigated. [ABSTRACT FROM AUTHOR]

This paper presents the design and implementation of a micro power battery state of charge monitor. The novelty of this design lies in the extreme low power consumption and accurate prediction of the battery reserve time. The average current drawn is successfully limited to 60 μA, which is significantly smaller than those in currently available devices. The proposed design predicts the reserved battery charge with an accuracy of 5% under different discharge conditions. The automated learning scheme using software is utilized. Protection of the battery against excessive current drain and usage outside the specified temperature range is incorporated. This paper details the proposed technique adopted for power reduction. The battery temperature and current sensing circuits are normally in power down mode, they go into active mode for the microcontroller to take measurements. An ON/OFF ratio of 1.153 is achieved which results in power reduction by a factor of 59.30. The average current requirement of the proposed design is reduced from 3302.79 μA to 55.69 μA with the adoption of power reduction approach. The proposed design has been tested on a NiMH, NiCd and Li-Ion battery packs and the experimental results confirm the utility of the proposed design. [ABSTRACT FROM AUTHOR]

In mobile systems, it is essential to limit the amount of energy consumption if the energy budget is low. This paper proposes a new scheme that makes use of quality scalability in scalable video coding (SVC) to limit energy usage by taking quality-of-experience (QoE) factors into account. To address the tradeoff between QoE and energy consumption, a new dynamic voltage and frequency scaling (DVFS) technique is proposed in which the fidelity level of each video segment is dynamically selected. The proposed scheme estimates the amount of energy consumption based on the analysis of the computational requirements to decode previous frames, and chooses the fidelity level to achieve the best video quality metric (VQM) value within a given energy budget. It was implemented on a recent commercial smartphone in which a new interface is provided for users to control the energy usage based on video quality. Real measurements show that it makes effective use of the remaining battery while maximizing QoE1. [ABSTRACT FROM PUBLISHER]

With the fast development of wireless communications, ZigBee and semiconductor devices, home automation networks have recently become very popular. Since typical consumer products deployed in home automation networks are often powered by tiny and limited batteries, one of the most challenging research issues is concerning energy reduction and the balancing of energy consumption across the network in order to prolong the home network lifetime for consumer devices. The introduction of clustering and sink mobility techniques into home automation networks have been shown to be an efficient way to improve the network performance and have received significant research attention. Taking inspiration from nature, this paper proposes an Ant Colony Optimization (ACO) based clustering algorithm specifically with mobile sink support for home automation networks. In this work, the network is divided into several clusters and cluster heads are selected within each cluster. Then, a mobile sink communicates with each cluster head to collect data directly through short range communications. The ACO algorithm has been utilized in this work in order to find the optimal mobility trajectory for the mobile sink. Extensive simulation results from this research show that the proposed algorithm significantly improves home network performance when using mobile sinks in terms of energy consumption and network lifetime as compared to other routing algorithms currently deployed for home automation networks. [ABSTRACT FROM AUTHOR]

Today?s mobile consumer electronics devices, such as smartphones and tablets, are required to execute a wide variety of applications efficiently. To this end modern application processors integrate both general-purpose CPU cores and specialized accelerators. Energy efficiency is the primary design goal for those processors, which has recently rekindled interest in neural network accelerators. Neural network accelerators trade the accuracy of computation for performance and energy efficiency and are suitable for errortolerant media applications such as video and audio processing. However, most existing accelerators only exploit inter-neuron parallelism and leave processing elements underutilized when the number of neurons in a layer is small. Thus, this paper proposes a novel neural network accelerator that can efficiently exploit both inter- and intra-neuron parallelism. For five applications the proposed accelerator achieves average speedups of 126% and 23% over a generalpurpose CPU and a state-of-the-art accelerator exploiting inter-neuron parallelism only, respectively. Besides, the proposed accelerator saves energy consumption by 22% over the state-of-the-art accelerator. [ABSTRACT FROM AUTHOR]

As home energy use is increasing and renewable energy systems are deployed, home energy management system (HEMS) needs to consider both energy consumption and generation simultaneously to minimize the energy cost. This paper proposes a smart HEMS architecture that considers both energy consumption and generation simultaneously. ZigBee-based energy measurement modules are used to monitor the energy consumption of home appliances and lights. A PLC-based renewable energy gateway is used to monitor the energy generation of renewable energies. The home server gathers the energy consumption and generation data, analyzes them for energy estimation, and controls the home energy use schedule to minimize the energy cost. The remote energy management server aggregates the energy data from numerous home servers, compares them, and creates useful statistical analysis information. By considering both energy consumption and generation, the proposed HEMS architecture is expected to optimize home energy use and result in home energy cost saving. [ABSTRACT FROM PUBLISHER]

As energy consumption in residential areas is rising, residential homes have deployed a photovoltaic (PV) system to save energy cost. The PV system needs to be continuously monitored to maintain its appropriate performance. In addition, it is desirable to monitor each PV module because one abnormal PV module affects the whole PV system. In this paper, the power line communication (PLC) compliant with HomePlug is adopted to monitor each PV module. The system architecture is composed of three components: PLC modem, renewable energy gateway (REG), and smart device application. The PLC modems are deployed on each PV module and monitor it. The REG aggregates and stores the monitored data from the PLC modems and the inverter. The smart device application retrieves the stored data from the REG to inform users of the status of the PV system. Users can browse and figure out the PV system performance in detail. The proposed system is installed in the field that is composed of sixteen 210W PV modules and a 3kW inverter. This scheme will maintain the performance of a PV system and contribute to enhancing home energy management system. [ABSTRACT FROM PUBLISHER]

This paper presents an automated power model generation method for smartphones. Having an accurate power model of mobile devices can help identify the sources of fast discharge of the battery and provide opportunities for optimizing battery use. However, current methods rely on either external measurement equipment or internal current sensor support. This study presents a novel method for power modeling that exploits the usage patterns stored on the phone. This method can be applied to any mobile device regardless of the manufacturer and the model of the device. A power consumption analysis tool, and an artificial usage pattern generator tool have been developed for power modeling. The proposed method is able to generate an accurate power model of various smartphones even without detailed knowledge of the phone hardware. [ABSTRACT FROM PUBLISHER]

Currently, the usefulness of many mobile systems is largely limited by the battery lifetime. In this paper, energy-based fair queuing (EFQ) is proposed as a pivotal instrument to maximize the user experience in this type of system. Energy-based fair queuing is a novel class of energy-aware scheduling algorithms that support proportional energy use, effective time-constraint compliance and a flexible trade-off between them. The combination of EFQ with lifetime-oriented power management schemes opens the door to maximize the user experience of battery-limited mobile systems. Moreover, it is suggested to merge traditional energy-efficient algorithms with EFQ to further improve the user experience. The proposed EFQ algorithm is implemented in the Linux kernel V3.3 and verified on a testbench based on an open source Linux scheduler simulator with user-specified energy loads. Simulation results show that EFQ is more effective and flexible than the Linux scheduler in maximizing the user experience of energy-limited mobile systems. [ABSTRACT FROM PUBLISHER]

This paper further enhances the previous research into reducing the standby power consumption of a PIR luminaire. Generally, although a PIR luminaire will turn on when motion is detected and turn off when the motion is no longer present, the luminaire still consumes 1 to 3 W of power when the lamp is off and plugged in. In this design the luminaire consumes 1 mW when the light is turned off. The power consumption is lower than that in the previous design. This design is not only easy to set up but also inexpensive. A more effective circuit design is used to reduce the power consumption. Furthermore, a photovoltaic array is included in this design to reduce the consumption from the local electric power company. The standby power consumption of the luminaire is 1 mW in a darkroom and less than 1 mW in a non-darkroom. When the illumination intensity is greater than 150 lx, the consumption from the local electric power company is 0 W1 [ABSTRACT FROM PUBLISHER]

With the advancement of mobile communication technology, Mobile TV has emerged and is becoming increasingly popular. However, viewing is limited with battery-powered mobile devices. To reduce the energy consumption, burst transmission has been proposed for mobile devices. The optimal burst scheduling problem for energy saving has been proven to be NP-complete. This paper proposes a sub-optimal burst scheduling algorithm called Regulated Period Scheduling (RPS) for energy saving in Mobile TV networks. Simulation results demonstrate that the resulting energy saving of the proposed algorithm is about 10% greater than the state of the art algorithm can achieve while maintaining very low computation complexity. [ABSTRACT FROM PUBLISHER]

Perceptual Noise Substitution (PNS) is an important tool used in the Advanced Audio Coding (AAC) standard. The common PNS decoders use the Newton- Raphson method, which applies iterations to calculate the adjustment coefficient of the noise. This method is suitable for software AAC decoders, whereas for many portable consumer devices, hardware AAC decoders are preferred to reduce the power consumption. This paper proposes a low complexity PNS decoding algorithm based on partition and linear interpolation method. The proposed algorithm is optimized for hardware implementation, and consumes only 24-31% computations of the Newton-Raphson method, thus reduces the max clock frequency of the decoder and its power consumption. Also the proposed algorithm has nearly the same subjective perception with the Newton-Raphson method. [ABSTRACT FROM AUTHOR]

Flash memory is widely used in mobile consumer electronics devices due to its good properties such as small size, shock resistance, and low-power consumption. However, the cost of flash memory is still high to accommodate ever-growing mobile applications and multimedia contents. Using MLC (multilevel cell) technologies is an efficient solution to extend the storage capacity, but it degrades the performance of flash memory significantly compared to the original storage based on SLC (single-level cell) technologies. To bridge the characteristics of the two technologies, this paper presents a new buffer cache management scheme that uses both MLC and SLC together and considers their heterogeneous characteristics. By allocating cache space based on the characteristics of each storage media as well as I/O operation types and reference history of buffered blocks, the proposed scheme improves the I/O performance of mobile systems by 24% on average and up to 180% compared to the CLOCK algorithm. Moreover, it guarantees high reliability of file data by adopting recently emerging non-volatile RAMs in a certain portion of the buffer cache. [ABSTRACT FROM AUTHOR]

The NAND flash-based hybrid storage that consists of a hard disk and flash cache has been widely used in mobile PCs, such as laptop/desktop computers, that require large storage capacity, energy efficiency, and better performance. In particular, in such consumer devices, energy saving is a major concern under limited battery capacity. Although a disk can be spun down during idle time for energy saving, it has been observed that there are frequent read and write requests generated by background applications, even while there is no user activity. In the hybrid storage, the flash cache is used for reducing disk activities and prolonging disk spin-down time. During the spin-down time, write requests can be temporarily stored in the flash cache, whereas read requests should be carefully handled to avoid frequent disk spin-ups. This paper presents Best-effort Energy Saving Techniques (BEST) that make the best use of the hybrid storage to provide low energy consumption, even under many background applications. In addition, the proposed techniques ensure the lifetime of the hybrid storage by considering the limited block erase and load/unload cycles of the flash memory and hard disk, respectively. Evaluation results demonstrate that the proposed techniques achieve considerable energy saving under various workloads, compared with previous studies. [ABSTRACT FROM PUBLISHER]

It is becoming crucial to manage devices intelligently to reduce the power consumption of mobile embedded systems. Power-aware system management relies on techniques of collecting and analyzing information on the status of Input/Output (I/O) devices or processors while the system is running applications. However, the overhead of collecting information using software while the system is running is so huge that performance of the system may be severely degraded. Therefore, designing a Power Management Unit (PMU) that collects information and analyzes the information with some hardware support is very important. In this paper, we propose a novel PMU design that collects and analyzes access patterns to I/O devices while an application is being executed. We also propose a predictive power-aware management scheme which is carried out based on the collected information. Experiments with various applications have been conducted to show the effectiveness of our approach. [ABSTRACT FROM AUTHOR]

This paper proposes a CMOS motion detector which consumes extremely low power. CMOS Image sensor pixels in this motion detector senses image and image data are converted into just one-bit by using clocked comparators. Because using one-bit data makes additional processing units simple, total power consumption of this CMOS motion detector can be reduced. That is, internal memory which is composed of the clocked gating schemes based on the flip -flop and XOR function which compares a current image with a previous one in order to detect a difference are main features for the simple structure. However one-bit data process has a critical problem that it is hard to detect a motion when image inclines to white or block. For solving this problem, Reference Voltage Controller which makes about the same proportion of white and block is implemented. We have made a test module of the proposed CMOS motion detector and tested it by using FPGA. According to the measurement result, total power consumption is about 32 μW at 3.3 V. Therefore, this motion detector can be useful for portable battery-operated devices. [ABSTRACT FROM AUTHOR]

The practical applications of wireless sensor networks require the sensor devices to be high in computation ability, low in power consumption, small in size, as well as competitive in cost. In addition, there are other particular attributes which require special consideration in sensor device design. These include, for example, the capabilities in protecting the embedded program from foreign intrusion and supporting efficient air-programming, which are very common requirements in many large-scale applications. In this paper, we describe the system architecture and design methodology of an ASCI-based sensor network device to meet those attributes for a class of applications. Compared with existing works, the unique features of the sensor device include: (1) a module- based extensible processor and co-processor cooperation architecture is designed with application-specific components to accelerate the signal collection, processing, and networking via hardware-software co-design to balance computation efficiency and design flexibility; (2) a program protection mechanism is developed based on unresemble coder algorithm to protect the program data from being read out by system intruders so as to improve the security of the sensor device; (3) an air- programming component is proposed to enable an efficient remote programming which is a very common requirement in network deployment and maintenance. In this paper, we present the design, implementation, and evaluation of the prototype sensor device based on a general configurable FPGA platform for developing next-generation sensor devices. Initial results of the first version of prototype chip will also be introduced. [ABSTRACT FROM AUTHOR]

DVB-H is a mobile digital video broadcasting technology based on DVB-T with the advantages of time-slicing and multiprotocol encapsulation-forward error correction (MPE-FEC) to reduce the power consumption and enhance the stability of receiver. The encapsulated data is compatible with the Internet Protocol which makes the integration of broadcast and telecommunication much easier. Therefore, digital content can be transmitted by adding encapsulation for each layer. In this paper, we developed a portable middleware for DVB-H clients. It could parse the Transport Stream according to the IP Data Casting (IPDC) protocol stack to achieve interactive multimedia services. Moreover, channel information contained in Electronic Service Guide (ESG) could also be decoded Several applications were developed on our middleware to demonstrate its feasibility as an interactive multimedia platform. [ABSTRACT FROM AUTHOR]

The 802.16e power management helps to increase the lifetime of Mobile Subscriber Stations (MSSs) by reducing their energy consumption, but this reduction results in Medium Access Control (MAC) Service Data Unit (SDU) response delay. Hence, both energy consumption and MAC SDU response delay are important performance metrics; however, they have a trade-off relationship. To guarantee the delay constraints of delay-sensitive applications, operating parameters in sleep-mode operation such as minimum sleep interval, Tmin, and maximum sleep interval, Tmax, should be considered seriously. Especially, large Tmax, results in high MAC SDU response delay. However, in the IEEE 802.16e standard, this point is not given enough attention. In this paper, we first propose a numerical model to determine Tmax based on MAC SDU response delay. Then, we propose a Delay -Guaranteed Energy Saving (DGES) algorithm to minimize energy consumption with a given MAC SDU response delay by finding the optimal Tmax under a fixed Tmin. Our proposed numerical model and DGES algorithm are verified by simulation results. [ABSTRACT FROM AUTHOR]

This paper proposes a novel energy-efficient coverage-time optimized dynamic clustering scheme for two- tiered wireless sensor networks (WSNs) used in an outdoor monitoring application of home networking systems. The coverage-time is defined as the time until one of cluster heads (CH5) runs out of energy in clustering-based WSNs, thereby resulting in an incomplete coverage. DC-CTO scheme regulates cluster radii for balanced energy consumption among CHs to maximize coverage-time. There are several advantages of using the DC-CTO scheme. The first advantage is balanced energy consumption among CHs under NLP-based computations. The second advantage is minimized energy consumption in each CH to extend coverage-time. The last one is the guarantee of perfect coverage. If there is no area which is uncontrolled by a CH in a networked sensing field, we call it a perfect coverage. If there is an incomplete coverage, the event in the area cannot be identified. Therefore perfect coverage is important to robust monitoring systems. The novelty of DC-CTO scheme is demonstrated by various simulation-based performance evaluations. [ABSTRACT FROM AUTHOR]

The FFT (fast Fourier transform) processor is the most speed and power consumption critical part in the orthogonal frequency division multiplexing (OFDM) communication system. In this paper, a low power consumption and small area FFT processor architecture suitable for OFDM demodulators is proposed. In order to meet the requirements of high-speed data throughput and low power and small area consumption, distributed memory architecture is developed to meet the requirement of non-stopping and high-speed data throughput. One clock-cycle mixed radix-2/4 butterfly architecture is proposed for OFDM Meanwhile, due to the two radix-2 and radix-4 butterflies share in the two complex multipliers, the FFT processor with the proposed radix-2/4 butterfly can make the 64% power consumption reduction and the 35% gate count reduction, respectively. Performance analysis shows that the proposed FFT architecture can meet the requirement of OFDM demodulators in DVB-T and other high speed wireless applications. [ABSTRACT FROM AUTHOR]

The paper proposes an adaptive reception (AR) scheme for S-DMB systems. Layered streams are generated by adopting Scalable Video Coding (SVC) technique to transmit video data hierarchically over broadcasting channel(s). Depending on the terminal's type, the minimum amount of data frames are adaptively received by employing a frame selection control at the receiver. We quantitatively investigate the benefits in terms of power consumption and available viewing time with a case of S-DMB phones. [ABSTRACT FROM AUTHOR]

Recently, the more regulations of energy conservation have been emphasized, the more home appliance manufactures have made competitive efforts to improve the energy efficiency of their products. However, there have been no correlation analysis between energy-efficient home appliances and cloud technologies. While cloud services have been rapidly adopted in many service areas to guarantee a high return of investment (ROI) for service providers, Previous studies on power saving have been conducted to reduce the standby power consumption for home appliances, like a set-top box (STB), which can be worked as a thin client for cloud services, or have only shown power models of a virtual machine (VM) on the cloud side without considering the power consumption states of its corresponding thin clients As a result, this paper proposes a power-saving control framework (PSCF) that consumes low power levels for both on the cloud side and on a STB efficiently for providing cloud services. The experimental result shows that the proposed framework outperforms the experiment not applied with any other power saving method for cloud services in terms of power efficiency. [ABSTRACT FROM PUBLISHER]

Linear interpolation is frequently used in digital signal processing applications to reconstruct signals, e.g., image, and audio processing, for which the multiplier and divider are two power- and area-hungry operators. Since most natural world phenomena are not exactly representable in linear forms, it is inefficient to use multiplier-based linear interpolation (MBLI) for accurate linear curve fitting. In this paper, area- and power-efficient adder-based stepwise linear interpolation (ABSI) is proposed to emulate the behavior of conventional linear interpolation. As a test vehicle for system demonstrations and performance evaluations, a general purpose display controller for applying an interpolationbased image/video scaling engine and overdrive for multimedia displays such as televisions, monitors, and projectors, was designed. Compared with a scaling engine using conventional MBLI, a scaling engine using the proposed ABSI has a similar scaling quality in terms of the peak signalto- noise ratio (PSNR), while reducing the area and power consumption by 45% and 44%, respectively. Furthermore, as compared with the compression/decompression of an overdrive using conventional MBLI, the data compression/decompression of the overdrive with the proposed ABSI shows a comparable compression/ decompression quality while reducing the area and power consumption by 46% and 45%, respectively. [ABSTRACT FROM PUBLISHER]

A set-top box (STB) increases its energy efficiency with active standby and passive standby modes. Compared to the active standby mode, the passive standby mode saves more power by turning off more STB functions, but it results in longer activation latency. For an energyefficient STB, in this paper, power saving with the passive standby is studied. The STB operates the passive standby mode when it is not in use, and the passive standby mode is switched to the active standby mode before a user turns on the STB in order to reduce the activation latency. To do that, the passive standby uses activity logs, which are represented in a bitmap form, to find a user pattern and to predict the next user activity. In the presented power saving method with the passive standby, recent activities is reflected with more weights to quickly find a new user pattern, instead of waiting until activity logs for a new user pattern are accumulated. The method is evaluated via simulations and discussed1. [ABSTRACT FROM PUBLISHER]

Because NAND flash memory shows a number of remarkable advantages such as non-volatility, high access performance, low power consumption, shock resistance, and small size, it has become the dominant data storage device for consumer electronics. However, NAND flash memory exhibits very different physical characteristics from hard disks so that existing buffer management schemes designed for hard disks perform badly when they are deployed on NAND flash-based consumer electronics directly. In this paper, an energy-aware buffer management scheme is proposed for NAND flash-based consumer electronics. The proposed scheme introduces a Low Cost First strategy for selecting a victim page and a clustering algorithm for grouping dirty data. Experimental results show that the proposed scheme performs better than existing buffer management schemes in terms of the buffer hit ratio, the number of write operations, and the energy consumption. [ABSTRACT FROM AUTHOR]

While energy consumption is widely considered the primary challenge of wireless networked devices, energy harvesting emerges as a promising way of powering the Internet of Things (IoT). In the Medium Access Control (MAC) layer of the communication stack, energy harvesting introduces spatial and temporal uncertainty in the availability of energy. In this context, this paper focuses on the design and implementation of the MAC layer of wireless embedded systems that are powered by energy harvesting; providing novel protocol features and practical experiences to designers of consumer electronics who opt for tailoring their own protocol solutions instead of using the standards. [ABSTRACT FROM AUTHOR]

Many consumer products in the home environment are managed by the Wireless Sensor Networks (WSNs). However, the energy hole problem in the WSNs which with logical ring topology and uniformly distributed sensors is usually caused by the energy exhaustion of the sensors which distributed in the first radius range of the sink. This paper firstly analyzed the energy consumption model of the sensor, the data transmission model of the sensor, and the energy consumption distribution model of the WSNs. Then, a WSN Energy Hole Alleviating (WSNEHA) algorithm, which is based on the data forwarding and router selection strategy, is proposed. The WSNEHPA adopts the data forwarding and routing selection strategy to balance the energy consumption of the sensors in the first radius range of the sink. Experimental results demonstrate that WSNEHPA can efficiently balance the energy consumption of the sensors in the first radius range of the sink, and that the lifetime of the WSNs can be extended efficiently. [ABSTRACT FROM AUTHOR]

Phase-change memory (PCM) is the best candidate for the storage device of next-generation mobile consumer electronics. PCM has the potential to replace NAND flash memory, due to its non-volatility, in-place programmability, and low power consumption. Even though the lifetime of PCM is longer than that of flash memory, wear leveling is still required to cope with the non-uniformity of storage workload or malicious attack. In this paper, a novel wear-leveling algorithm for PCM storage is proposed, where more physical pages are allocated to frequently updated logical pages, to balance the wear counts of PCM cells. In comparison with the previous techniques, the proposed algorithm improved the lifetime of PCM by at maximum 14 times and on average 8 times. [ABSTRACT FROM AUTHOR]

Disparity estimation is a common task in stereo vision and usually requires a high computational effort. High resolution disparity maps are necessary to provide a good image quality on autostereoscopic displays which deliver stereo content without the need for 3D glasses. In this paper, an FPGA architecture for a disparity estimation algorithm is proposed, that is capable of processing high-definition content in real-time. The resulting architecture is efficient in terms of power consumption and can be easily scaled to support higher resolutions. [ABSTRACT FROM AUTHOR]

NAND flash memory is a popular storage device for consumer electronics and it is exploited to be swap space for extending the limited main memory of consumer electronics. Due to the out-of-place update scheme provided by NAND flash memory to solve its erase-before-write hardware constraint, garbage collection should be performed to reclaim garbage in terms of invalid pages and obtain free space in terms of free blocks. The garbage collection, which consists of a series of copy operations and erase operations, is energy-consuming. In order to reduce the energy consumption, a swap-aware garbage collection algorithm for NAND flash-based consumer electronics is proposed in this paper. The proposed algorithm focuses on reducing the garbage collection overhead and improving the endurance of NAND flash memory. Experimental results show that the proposed algorithm is superior to the existing garbage collection algorithms in terms of the number of copy operations, the number of erase operations, the degree of wear-leveling, and energy consumption. [ABSTRACT FROM AUTHOR]

The emerging High Efficiency Video Coding (HEVC) standard attempts to improve the coding efficiency by a factor of two over H.264/AVC using new compression tools with high computational complexity. The increased computational complexity makes the real-time execution with reasonable computing power become one of the critical concerns for the commercialization of HEVC. A large number of prediction modes are the main causes of the increased complexity of HEVC. Thus, a fast decision of a prediction mode needs to be effectively used to reduce the computational complexity. To take advantage of large amounts of previous works and to find a guide for application to HEVC, this paper presents a survey of these efforts for the previous standards, especially for H.264/AVC, and examines the possibility of the previous algorithms to be applicable for HEVC. To this end, previous algorithms are categorized and then the effectiveness of each category for HEVC is evaluated. For this evaluation, a previous algorithm is modified for HEVC when it is not applicable to HEVC directly. Simulation results show that most previous algorithms with slight modification, in general, improve the encoding speed with a relatively small degradation of the compression efficiency. Among them, hierarchical mode decision is especially effective whereas mode pre-decision using motion or spatial homogeneity often results in inaccurate results. [ABSTRACT FROM AUTHOR]

Recently, IEEE802.11ac, which can support ultra high speed data communications up to 1Gbps with low power consumption, has been drawing much attention in the consumer electronic field. In the IEEE802.11ac system, one of the critical implementation issues is to find the optimum architecture of demodulator satisfying the speed requirement. A Viterbi decoder is an essential part for error correction in the demodulator and has a design problem with respect to hardware costs as well as decoding speed. Among various functional blocks in the Viterbi decoder, both hardware complexity and decoding speed highly depend on the architecture of ACS. Because of a feed-back structure, it is very difficult for the ACS to perform its task at a high data rate at low power. Substantial previous works have been presented in order to enhance the decoding speed or to reduce the hardware costs. However, the approaches are insufficient to meet the high-speed and low-cost requirements of a high-level soft decision (up to 8 bits) Viterbi decoder for IEEE802.11ac systems. In this paper, therefore, we propose a cost-efficient high-level soft decision Viterbi decoder with a multi-stage pipelined ACS for IEEE802.11ac systems. From the implementation and verification results under 0.13μm CMOS technology, we find that the proposed architecture can meet the required data rate of IEEE802.11ac and reduce the hardware complexity by about 70% and 90% compared with conventional single-stage pipelined ACS and look-ahead ACS structures, respectively. [ABSTRACT FROM AUTHOR]