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In this paper, the broadband Green’s function with low wavenumber extraction (BBGFL) is applied to modeling of traces connecting vias in arbitrarily shaped power/ground planes of printed circuit boards (PCBs). The proposed modeling method is a hybrid technique based on mode decomposition: BBGFL is used to fast compute the vias in power/ground planes, MoM is used to calculate the impedance matrix of the traces, and a physical circuit model is then applied to combine the vias and traces in the power/ground planes. The present method is compared to the method of moments (MoM) and the commercial tool HFSS. Results show that the results of the present technique are in good agreement with MoM and HFSS on the radiated emissions from PCBs. BBGFL is several hundred times faster than HFSS in CPU time for broadband simulations. The technique provides a fast broadband solution for system-level modeling of high-speed interconnects with vias and traces in electronic design automation design and applications. [ABSTRACT FROM AUTHOR]

In this paper, a novel termination (“match”) scheme is introduced with absorbing material for high-frequency measurements. Through the absorption of electromagnetic waves, absorbing material makes an equivalent absorbing boundary condition at the interface, which creates an equivalent termination condition. The absorbing termination can be used to facilitate on-demand match condition in high-frequency measurements. The proposed technique is particularly useful when resistive termination is difficult to implement or too expensive to apply. For example, the soldering process (soldering-on soldering-off) is time-consuming, hard to control on the precise soldering position, and easy to break the printed circuit board soldering pads. It is useful for various applications, including via crosstalk measurements in socket, package breakout via array, or other dense/fine structures. The absorbing termination method provides an innovative termination solution for RF/microwave measurements. [ABSTRACT FROM PUBLISHER]

In this paper, bond via array (BVA) wirebond is used to achieve compact vertical integration and improve the electrical performance for system in package (SiP). Two techniques are presented. In the first technique, BVA wirebonds are utilized to integrate some passive or active components vertically onto other components. This significantly reduces the horizontal footprint of the entire SiP. In terms of electrical performance, this vertical integration provides much lower parasitic inductance than conventional 2-D horizontal integration design because of shorter interconnection. For example, the proposed technology can significantly reduce power delivery network impedance compared to a conventional design. In the second technique, we propose BVA wirebond wires as an electromagnetic interference (EMI) shield between different domains within SiP. This provides a lower cost solution for EMI shielding, particularly when regions within a package need to be shielded. [ABSTRACT FROM PUBLISHER]

A new technology is developed for the mitigation of stub effects in high-speed interconnects. This technology substantially reduces the stub effects for high-speed signaling. It dampens reflected signals on stubs, thus reducing intersymbol interference and harmful coupling, and correcting timing jitter, all typically induced by the stub’s reflected signals. This paper shows two applications for high-speed digital system designs, the mitigation of via stub effects and that of empty connector effects, respectively. However, it is notable that the present method is suitable for reflection suppression for arbitrary types of stubs to improve the signal integrity. [ABSTRACT FROM PUBLISHER]