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Low-temperature Cu–Cu bonding utilizing pillar and concave on silicon substrate with and without polymer layer is successfully implemented at 200 °C under atmospheric pressure. Finite-element method (FEM) simulations on stress and deformation generated during bonding process are also presented in order to discuss their influence on bonding result of several pillar diameters and of concave sidewall angles originating from the manufacturing process. The alteration of parameters in FEM simulations would also be investigated to enhance the bonding outcome. The parameters include the diameter of pillar, the sidewall angle of concave, the shape of the concave opening, the addition of extra polymer layer under Cu concave layer, the bonding temperature, and the pitch of the pillar–concave structure. The implementation of Cu–Cu bonding using pillar–concave structure could have a prospective effect on existing packaging methods in semiconductor industry with benefits of applicability to various sorts of substrates and low bonding temperature. [ABSTRACT FROM PUBLISHER]

Although chip-level heterogeneous integration has high yield for production, low-throughput issue of chip-to-wafer bonding is necessary to be improved. Due to the uneven topography and small chip size, handling issue and alignment accuracy are important factors that impact the difficulty in heterogeneous integration. Self-assembly technology has a high potential to be applied in 3-D heterogeneous integration. By using hydrophobic film to define the stacking area, hydrophilic chips can be assembled to realize alignment process on these areas through wafer surface tension in a very short time. With this concept, double-self-assembly technology is accomplished to resolve both handling and alignment issues for uneven-topography-chip integration. In this paper, different chip sizes of $\mu $ -pillar are simulated to investigate the optimal water volume for double-self-assembly process. High alignment accuracy of misalignment measurement can be accomplished with the optimal water volume. Furthermore, microstructure of Cu/In bonded structures and corresponding electrical analyses are evaluated, while various reliability tests are investigated for bonding quality. Excellent results verify that the double-self-assembly technology could be applied to 3-D heterogeneous integration for uneven-topography-chip integration. [ABSTRACT FROM AUTHOR]